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2444 commits

Author SHA1 Message Date
bunnei dd1aab5446 gl_rasterizer: Implement a more accurate fermi 2D copy. 
- This is a blit, use the blit registers.
 2019-02-06 21:54:21 -05:00
Frederic L d0ac624403 gl_shader_disk_cache: Check LZ4 size limit 
Co-Authored-By: ReinUsesLisp <reinuseslisp@airmail.cc>
 2019-02-06 22:23:41 -03:00
Frederic L 9f0b247cf6 gl_shader_disk_cache: Consider compressed size zero as an error 
Co-Authored-By: ReinUsesLisp <reinuseslisp@airmail.cc>
 2019-02-06 22:23:41 -03:00
ReinUsesLisp e6a2245304 gl_shader_disk_cache: Use unordered containers 2019-02-06 22:23:41 -03:00
ReinUsesLisp e147ed4fc0 gl_shader_cache: Fixup GLSL unique identifiers 2019-02-06 22:23:40 -03:00
ReinUsesLisp eb73247433 gl_shader_cache: Link loading screen with disk shader cache load 2019-02-06 22:23:40 -03:00
ReinUsesLisp df0f31f44e gl_shader_cache: Set GL_PROGRAM_SEPARABLE to dumped shaders 
i965 (and probably all mesa drivers) require GL_PROGRAM_SEPARABLE when using
glProgramBinary. This is probably required by the standard but it's ignored by
permisive proprietary drivers.
 2019-02-06 22:23:40 -03:00
ReinUsesLisp 7fefec585c gl_shader_disk_cache: Pass core system as argument and guard against games without title ids 2019-02-06 22:23:40 -03:00
ReinUsesLisp 2bc6a699dc gl_shader_disk_cache: Guard reads and writes against failure 2019-02-06 22:23:40 -03:00
ReinUsesLisp 750abcc23d gl_shader_disk_cache: Address miscellaneous feedback 2019-02-06 22:23:40 -03:00
ReinUsesLisp 8ee3666a3c gl_shader_disk_cache: Pass return values returning instead of by parameters 2019-02-06 22:23:40 -03:00
ReinUsesLisp ed956569a4 gl_shader_disk_cache: Compress program binaries using LZ4 2019-02-06 22:23:39 -03:00
ReinUsesLisp f087639e4a gl_shader_disk_cache: Compress GLSL code using LZ4 2019-02-06 22:23:39 -03:00
ReinUsesLisp cfb20c4c9d gl_shader_disk_cache: Save GLSL and entries into the precompiled file 2019-02-06 22:23:39 -03:00
ReinUsesLisp e78da8dc1f settings: Hide shader cache behind a setting 2019-02-06 22:20:57 -03:00
ReinUsesLisp be4641c43f gl_shader_disk_cache: Invalidate shader cache changes with CMake hash 2019-02-06 22:20:57 -03:00
ReinUsesLisp a3703f5767 gl_shader_cache: Refactor to support disk shader cache 2019-02-06 22:20:57 -03:00
ReinUsesLisp 4039086226 gl_shader_disk_cache: Add transferable cache invalidation 2019-02-06 22:20:57 -03:00
ReinUsesLisp a1faed9950 gl_shader_disk_cache: Add precompiled load 2019-02-06 22:20:57 -03:00
ReinUsesLisp 57fb15d2a3 gl_shader_disk_cache: Add precompiled save 2019-02-06 22:20:57 -03:00
ReinUsesLisp 3435cd8d5e gl_shader_disk_cache: Add transferable load 2019-02-06 22:20:57 -03:00
ReinUsesLisp b1efceec89 gl_shader_disk_cache: Add transferable stores 2019-02-06 22:20:57 -03:00
ReinUsesLisp 98be5a4928 gl_shader_disk_cache: Add ShaderDiskCacheOpenGL class and helpers 2019-02-06 22:20:57 -03:00
ReinUsesLisp 145c3ac89e gl_shader_disk_cache: Add file and move BaseBindings declaration 2019-02-06 22:20:57 -03:00
ReinUsesLisp c2c5260fd7 gl_shader_decompiler: Remove name entries 2019-02-06 22:20:57 -03:00
ReinUsesLisp 8b11368671 gl_shader_util: Add parameter to handle retrievable programs 2019-02-06 22:20:57 -03:00
ReinUsesLisp 0ed5d728ca rasterizer_interface: Add disk cache entry for the rasterizer 2019-02-06 22:20:57 -03:00
ReinUsesLisp 049050856f shader_decode: Implement LDG and basic cbuf tracking 2019-02-06 22:20:57 -03:00
bunnei 10ab714fe0
Merge pull request #2042 from ReinUsesLisp/nouveau-tex 
maxwell_3d: Allow texture handles with TIC id zero
 2019-02-06 20:19:20 -05:00
bunnei 40ac058557
Merge pull request #2071 from ReinUsesLisp/dsa-texture 
gl_rasterizer: Use DSA for textures and move swizzling to texture state
 2019-02-06 20:17:59 -05:00
bunnei 7aa7d8f4ff
Merge pull request #2085 from ReinUsesLisp/cube-minus-one 
video_core/texture: Fix BitField size for depth_minus_one
 2019-02-05 17:15:26 -05:00
bunnei 72c70d6808
Merge pull request #2081 from ReinUsesLisp/lmem-64 
shader_ir/memory: Add LD_L 64 bits loads
 2019-02-05 09:17:48 -05:00
ReinUsesLisp b5e685b297 video_core/texture: Fix BitField size for depth_minus_one 2019-02-05 04:32:06 -03:00
bunnei bb4549a73d
Merge pull request #2082 from FernandoS27/txq-stl 
Fix TXQ not using the component mask.
 2019-02-04 20:22:32 -05:00
Mat M a568cd805b
Update src/video_core/engines/shader_bytecode.h 
Co-Authored-By: FernandoS27 <fsahmkow27@gmail.com>
 2019-02-03 21:27:26 -04:00
Fernando Sahmkow 0306c50339 Fix TXQ not using the component mask. 2019-02-03 18:17:18 -04:00
ReinUsesLisp dfa7be5ddf shader_ir/memory: Add ST_L 64 and 128 bits stores 2019-02-03 19:08:10 -03:00
ReinUsesLisp 2bdbb90af7 video_core: Assert on invalid GPU to CPU address queries 2019-02-03 04:58:40 -03:00
ReinUsesLisp 04e68e9738 maxwell_3d: Allow sampler handles with TSC id zero 2019-02-03 04:58:40 -03:00
ReinUsesLisp 390721a561 maxwell_3d: Allow texture handles with TIC id zero 
Also remove "enabled" field from Tegra::Texture::FullTextureInfo because
it would become unused.
 2019-02-03 04:58:24 -03:00
ReinUsesLisp e01a9de35f memory_manager: Check for reserved page status 2019-02-03 04:58:24 -03:00
ReinUsesLisp f61c1ed246 shader_ir/memory: Add LD_L 128 bits loads 2019-02-03 00:35:34 -03:00
ReinUsesLisp 9feb68085d shader_bytecode: Rename BytesN enums to BitsN 2019-02-03 00:25:40 -03:00
ReinUsesLisp 0be835132c shader_ir/memory: Add LD_L 64 bits loads 2019-02-03 00:25:40 -03:00
bunnei eceab45dac
Merge pull request #2074 from ReinUsesLisp/shader-ir-unify-offset 
shader_ir: Unify constant buffer offset values
 2019-02-01 13:24:04 -05:00
bunnei 2d226ff8ac
Merge pull request #2067 from ReinUsesLisp/workaround-fb 
gl_rasterizer: Workaround invalid zeta clears
 2019-02-01 12:50:09 -05:00
ReinUsesLisp 26f8a700a7 rasterizer_interface: Remove unused AccelerateFill operation 2019-02-01 03:02:22 -03:00
ReinUsesLisp 13222f94c0 video_core: Remove unused Fill surface type 2019-02-01 02:57:47 -03:00
ReinUsesLisp 3e80b08944 gl_rasterizer_cache: Fixup test clause 2019-01-30 19:10:35 -03:00
Mat M 911587fb8d gl_rasterizer_cache: Guard clause swizzle testing 
Co-Authored-By: ReinUsesLisp <reinuseslisp@airmail.cc>
 2019-01-30 19:10:35 -03:00