2018-12-20 22:09:21 +00:00
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// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <map>
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#include <set>
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#include <string>
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#include <tuple>
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#include <variant>
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#include <vector>
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/engines/shader_bytecode.h"
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#include "video_core/engines/shader_header.h"
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namespace VideoCommon::Shader {
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class OperationNode;
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class ConditionalNode;
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class GprNode;
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class ImmediateNode;
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class InternalFlagNode;
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class PredicateNode;
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class AbufNode; ///< Attribute buffer
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class CbufNode; ///< Constant buffer
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class LmemNode; ///< Local memory
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class GmemNode; ///< Global memory
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class CommentNode;
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using ProgramCode = std::vector<u64>;
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using NodeData =
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std::variant<OperationNode, ConditionalNode, GprNode, ImmediateNode, InternalFlagNode,
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PredicateNode, AbufNode, CbufNode, LmemNode, GmemNode, CommentNode>;
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using Node = const NodeData*;
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using BasicBlock = std::vector<Node>;
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constexpr u32 MAX_PROGRAM_LENGTH = 0x1000;
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constexpr u32 RZ = 0xff;
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enum class OperationCode {
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Assign, /// (float& dest, float src) -> void
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AssignComposite, /// (MetaComponents, float4 src, float&[4] dst) -> void
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Composite, /// (float[4] values) -> float4
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Select, /// (MetaArithmetic, bool pred, float a, float b) -> float
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FAdd, /// (MetaArithmetic, float a, float b) -> float
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FMul, /// (MetaArithmetic, float a, float b) -> float
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FDiv, /// (MetaArithmetic, float a, float b) -> float
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FFma, /// (MetaArithmetic, float a, float b, float c) -> float
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FNegate, /// (MetaArithmetic, float a) -> float
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FAbsolute, /// (MetaArithmetic, float a) -> float
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FClamp, /// (MetaArithmetic, float value, float min, float max) -> float
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FMin, /// (MetaArithmetic, float a, float b) -> float
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FMax, /// (MetaArithmetic, float a, float b) -> float
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FCos, /// (MetaArithmetic, float a) -> float
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FSin, /// (MetaArithmetic, float a) -> float
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FExp2, /// (MetaArithmetic, float a) -> float
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FLog2, /// (MetaArithmetic, float a) -> float
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FInverseSqrt, /// (MetaArithmetic, float a) -> float
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FSqrt, /// (MetaArithmetic, float a) -> float
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FRoundEven, /// (MetaArithmetic, float a) -> float
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FFloor, /// (MetaArithmetic, float a) -> float
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FCeil, /// (MetaArithmetic, float a) -> float
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FTrunc, /// (MetaArithmetic, float a) -> float
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FCastInteger, /// (MetaArithmetic, int a) -> float
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FCastUInteger, /// (MetaArithmetic, uint a) -> float
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IAdd, /// (MetaArithmetic, int a, int b) -> int
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IMul, /// (MetaArithmetic, int a, int b) -> int
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IDiv, /// (MetaArithmetic, int a, int b) -> int
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INegate, /// (MetaArithmetic, int a) -> int
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IAbsolute, /// (MetaArithmetic, int a) -> int
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IMin, /// (MetaArithmetic, int a, int b) -> int
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IMax, /// (MetaArithmetic, int a, int b) -> int
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ICastFloat, /// (MetaArithmetic, float a) -> int
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ICastUnsigned, /// (MetaArithmetic, uint a) -> int
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ILogicalShiftLeft, /// (MetaArithmetic, int a, uint b) -> int
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ILogicalShiftRight, /// (MetaArithmetic, int a, uint b) -> int
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IArithmeticShiftRight, /// (MetaArithmetic, int a, uint b) -> int
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IBitwiseAnd, /// (MetaArithmetic, int a, int b) -> int
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IBitwiseOr, /// (MetaArithmetic, int a, int b) -> int
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IBitwiseXor, /// (MetaArithmetic, int a, int b) -> int
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IBitwiseNot, /// (MetaArithmetic, int a) -> int
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IBitfieldInsert, /// (MetaArithmetic, int base, int insert, int offset, int bits) -> int
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UAdd, /// (MetaArithmetic, uint a, uint b) -> uint
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UMul, /// (MetaArithmetic, uint a, uint b) -> uint
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UDiv, /// (MetaArithmetic, uint a, uint b) -> uint
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UMin, /// (MetaArithmetic, uint a, uint b) -> uint
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UMax, /// (MetaArithmetic, uint a, uint b) -> uint
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UCastFloat, /// (MetaArithmetic, float a) -> uint
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UCastSigned, /// (MetaArithmetic, int a) -> uint
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ULogicalShiftLeft, /// (MetaArithmetic, uint a, uint b) -> uint
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ULogicalShiftRight, /// (MetaArithmetic, uint a, uint b) -> uint
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UArithmeticShiftRight, /// (MetaArithmetic, uint a, uint b) -> uint
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UBitwiseAnd, /// (MetaArithmetic, uint a, uint b) -> uint
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UBitwiseOr, /// (MetaArithmetic, uint a, uint b) -> uint
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UBitwiseXor, /// (MetaArithmetic, uint a, uint b) -> uint
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UBitwiseNot, /// (MetaArithmetic, uint a) -> int
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UBitfieldInsert, /// (MetaArithmetic, uint base, uint insert, int offset, int bits) -> uint
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HAdd, /// (MetaHalfArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
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HMul, /// (MetaHalfArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
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HAbsolute, /// (f16vec2 a) -> f16vec2
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HNegate, /// (f16vec2 a, bool first, bool second) -> f16vec2
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HMergeF32, /// (f16vec2 src) -> float
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HMergeH0, /// (f16vec2 dest, f16vec2 src) -> f16vec2
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HMergeH1, /// (f16vec2 dest, f16vec2 src) -> f16vec2
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LogicalAssign, /// (bool& dst, bool src) -> void
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LogicalAnd, /// (bool a, bool b) -> bool
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LogicalOr, /// (bool a, bool b) -> bool
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LogicalXor, /// (bool a, bool b) -> bool
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LogicalNegate, /// (bool a) -> bool
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LogicalFLessThan, /// (float a, float b) -> bool
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LogicalFEqual, /// (float a, float b) -> bool
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LogicalFLessEqual, /// (float a, float b) -> bool
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LogicalFGreaterThan, /// (float a, float b) -> bool
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LogicalFNotEqual, /// (float a, float b) -> bool
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LogicalFGreaterEqual, /// (float a, float b) -> bool
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LogicalFIsNan, /// (float a) -> bool
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LogicalILessThan, /// (int a, int b) -> bool
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LogicalIEqual, /// (int a, int b) -> bool
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LogicalILessEqual, /// (int a, int b) -> bool
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LogicalIGreaterThan, /// (int a, int b) -> bool
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LogicalINotEqual, /// (int a, int b) -> bool
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LogicalIGreaterEqual, /// (int a, int b) -> bool
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LogicalULessThan, /// (uint a, uint b) -> bool
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LogicalUEqual, /// (uint a, uint b) -> bool
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LogicalULessEqual, /// (uint a, uint b) -> bool
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LogicalUGreaterThan, /// (uint a, uint b) -> bool
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LogicalUNotEqual, /// (uint a, uint b) -> bool
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LogicalUGreaterEqual, /// (uint a, uint b) -> bool
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LogicalHLessThan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool
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LogicalHEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool
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LogicalHLessEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool
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LogicalHGreaterThan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool
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LogicalHNotEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool
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LogicalHGreaterEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool
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F4Texture, /// (MetaTexture, float[N] coords, float[M] params) -> float4
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F4TextureLod, /// (MetaTexture, float[N] coords, float[M] params) -> float4
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F4TextureGather, /// (MetaTexture, float[N] coords, float[M] params) -> float4
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F4TextureQueryDimensions, /// (MetaTexture, float a) -> float4
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F4TextureQueryLod, /// (MetaTexture, float[N] coords) -> float4
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Ipa, /// (abuf src) -> float
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Bra, /// (uint branch_target) -> void
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Ssy, /// (uint branch_target) -> void
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Pbk, /// (uint branch_target) -> void
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Sync, /// () -> void
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Brk, /// () -> void
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Exit, /// () -> void
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Kil, /// () -> void
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YNegate, /// () -> float
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Amount,
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};
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enum class InternalFlag {
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Zero = 0,
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Sign = 1,
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Carry = 2,
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Overflow = 3,
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Amount = 4,
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};
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/// Describes the behaviour of code path of a given entry point and a return point.
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enum class ExitMethod {
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Undetermined, ///< Internal value. Only occur when analyzing JMP loop.
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AlwaysReturn, ///< All code paths reach the return point.
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Conditional, ///< Code path reaches the return point or an END instruction conditionally.
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AlwaysEnd, ///< All code paths reach a END instruction.
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};
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class Sampler {
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public:
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explicit Sampler(std::size_t offset, std::size_t index, Tegra::Shader::TextureType type,
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bool is_array, bool is_shadow)
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: offset{offset}, index{index}, type{type}, is_array{is_array}, is_shadow{is_shadow} {}
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std::size_t GetOffset() const {
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return offset;
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}
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u32 GetIndex() const {
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return static_cast<u32>(index);
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}
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Tegra::Shader::TextureType GetType() const {
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return type;
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}
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bool IsArray() const {
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return is_array;
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}
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bool IsShadow() const {
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return is_shadow;
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}
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bool operator<(const Sampler& rhs) const {
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return std::tie(offset, index, type, is_array, is_shadow) <
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std::tie(rhs.offset, rhs.index, rhs.type, rhs.is_array, rhs.is_shadow);
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}
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private:
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/// Offset in TSC memory from which to read the sampler object, as specified by the sampling
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/// instruction.
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std::size_t offset{};
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std::size_t index{}; ///< Value used to index into the generated GLSL sampler array.
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Tegra::Shader::TextureType type{}; ///< The type used to sample this texture (Texture2D, etc)
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bool is_array{}; ///< Whether the texture is being sampled as an array texture or not.
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bool is_shadow{}; ///< Whether the texture is being sampled as a depth texture or not.
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};
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class ConstBuffer {
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public:
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void MarkAsUsed(u64 offset) {
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max_offset = std::max(max_offset, static_cast<u32>(offset));
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}
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void MarkAsUsedIndirect() {
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is_indirect = true;
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}
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bool IsIndirect() const {
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return is_indirect;
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}
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u32 GetSize() const {
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return max_offset + 1;
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}
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private:
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u32 max_offset{};
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bool is_indirect{};
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};
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struct MetaArithmetic {
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bool precise{};
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};
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struct MetaHalfArithmetic {
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bool precise{};
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std::array<Tegra::Shader::HalfType, 3> types = {Tegra::Shader::HalfType::H0_H1,
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Tegra::Shader::HalfType::H0_H1,
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Tegra::Shader::HalfType::H0_H1};
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bool and_comparison{};
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};
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struct MetaTexture {
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const Sampler& sampler;
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u32 coords_count{};
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};
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struct MetaComponents {
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std::array<u32, 4> components_map{};
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u32 GetSourceComponent(u32 dest_index) const {
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return components_map[dest_index];
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}
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};
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constexpr MetaArithmetic PRECISE = {true};
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constexpr MetaArithmetic NO_PRECISE = {false};
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constexpr MetaHalfArithmetic HALF_NO_PRECISE = {false};
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using Meta = std::variant<MetaArithmetic, MetaHalfArithmetic, MetaTexture, MetaComponents>;
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/// Holds any kind of operation that can be done in the IR
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class OperationNode final {
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public:
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template <typename... T>
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explicit constexpr OperationNode(OperationCode code) : code{code}, meta{} {}
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template <typename... T>
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explicit constexpr OperationNode(OperationCode code, Meta&& meta)
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: code{code}, meta{std::move(meta)} {}
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template <typename... T>
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explicit constexpr OperationNode(OperationCode code, const T*... operands)
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: OperationNode(code, {}, operands...) {}
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template <typename... T>
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explicit constexpr OperationNode(OperationCode code, Meta&& meta, const T*... operands_)
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: code{code}, meta{std::move(meta)} {
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auto operands_list = {operands_...};
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for (auto& operand : operands_list) {
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operands.push_back(operand);
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}
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}
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explicit OperationNode(OperationCode code, Meta&& meta, std::vector<Node>&& operands)
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: code{code}, meta{meta}, operands{std::move(operands)} {}
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explicit OperationNode(OperationCode code, std::vector<Node>&& operands)
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: code{code}, meta{}, operands{std::move(operands)} {}
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OperationCode GetCode() const {
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return code;
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}
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const Meta& GetMeta() const {
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return meta;
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}
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std::size_t GetOperandsCount() const {
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return operands.size();
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}
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Node operator[](std::size_t operand_index) const {
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return operands.at(operand_index);
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}
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private:
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const OperationCode code;
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const Meta meta;
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std::vector<Node> operands;
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};
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/// Encloses inside any kind of node that returns a boolean conditionally-executed code
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class ConditionalNode final {
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public:
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explicit ConditionalNode(Node condition, std::vector<Node>&& code)
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: condition{condition}, code{std::move(code)} {}
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Node GetCondition() const {
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return condition;
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}
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const std::vector<Node>& GetCode() const {
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return code;
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}
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private:
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const Node condition; ///< Condition to be satisfied
|
|
|
|
std::vector<Node> code; ///< Code to execute
|
|
|
|
};
|
|
|
|
|
|
|
|
/// A general purpose register
|
|
|
|
class GprNode final {
|
|
|
|
public:
|
|
|
|
explicit constexpr GprNode(Tegra::Shader::Register index) : index{index} {}
|
|
|
|
|
|
|
|
u32 GetIndex() const {
|
|
|
|
return static_cast<u32>(index);
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
|
|
|
const Tegra::Shader::Register index;
|
|
|
|
};
|
|
|
|
|
|
|
|
/// A 32-bits value that represents an immediate value
|
|
|
|
class ImmediateNode final {
|
|
|
|
public:
|
|
|
|
explicit constexpr ImmediateNode(u32 value) : value{value} {}
|
|
|
|
|
|
|
|
u32 GetValue() const {
|
|
|
|
return value;
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
|
|
|
const u32 value;
|
|
|
|
};
|
|
|
|
|
|
|
|
/// One of Maxwell's internal flags
|
|
|
|
class InternalFlagNode final {
|
|
|
|
public:
|
|
|
|
explicit constexpr InternalFlagNode(InternalFlag flag) : flag{flag} {}
|
|
|
|
|
|
|
|
InternalFlag GetFlag() const {
|
|
|
|
return flag;
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
|
|
|
const InternalFlag flag;
|
|
|
|
};
|
|
|
|
|
|
|
|
/// A predicate register, it can be negated without aditional nodes
|
|
|
|
class PredicateNode final {
|
|
|
|
public:
|
|
|
|
explicit constexpr PredicateNode(Tegra::Shader::Pred index, bool negated)
|
|
|
|
: index{index}, negated{negated} {}
|
|
|
|
|
|
|
|
Tegra::Shader::Pred GetIndex() const {
|
|
|
|
return index;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool IsNegated() const {
|
|
|
|
return negated;
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
|
|
|
const Tegra::Shader::Pred index;
|
|
|
|
const bool negated;
|
|
|
|
};
|
|
|
|
|
|
|
|
/// Attribute buffer memory (known as attributes or varyings in GLSL terms)
|
|
|
|
class AbufNode final {
|
|
|
|
public:
|
|
|
|
explicit constexpr AbufNode(Tegra::Shader::Attribute::Index index, u32 element,
|
|
|
|
const Tegra::Shader::IpaMode& input_mode, Node buffer = {})
|
|
|
|
: input_mode{input_mode}, index{index}, element{element}, buffer{buffer} {}
|
|
|
|
|
|
|
|
explicit constexpr AbufNode(Tegra::Shader::Attribute::Index index, u32 element,
|
|
|
|
Node buffer = {})
|
|
|
|
: input_mode{}, index{index}, element{element}, buffer{buffer} {}
|
|
|
|
|
|
|
|
Tegra::Shader::IpaMode GetInputMode() const {
|
|
|
|
return input_mode;
|
|
|
|
}
|
|
|
|
|
|
|
|
Tegra::Shader::Attribute::Index GetIndex() const {
|
|
|
|
return index;
|
|
|
|
}
|
|
|
|
|
|
|
|
u32 GetElement() const {
|
|
|
|
return element;
|
|
|
|
}
|
|
|
|
|
|
|
|
Node GetBuffer() const {
|
|
|
|
return buffer;
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
|
|
|
const Tegra::Shader::IpaMode input_mode;
|
|
|
|
const Node buffer;
|
|
|
|
const Tegra::Shader::Attribute::Index index;
|
|
|
|
const u32 element;
|
|
|
|
};
|
|
|
|
|
|
|
|
/// Constant buffer node, usually mapped to uniform buffers in GLSL
|
|
|
|
class CbufNode final {
|
|
|
|
public:
|
|
|
|
explicit constexpr CbufNode(u32 index, Node offset) : index{index}, offset{offset} {}
|
|
|
|
|
|
|
|
u32 GetIndex() const {
|
|
|
|
return index;
|
|
|
|
}
|
|
|
|
|
|
|
|
Node GetOffset() const {
|
|
|
|
return offset;
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
|
|
|
const u32 index;
|
|
|
|
const Node offset;
|
|
|
|
};
|
|
|
|
|
|
|
|
/// Local memory node
|
|
|
|
class LmemNode final {
|
|
|
|
public:
|
|
|
|
explicit constexpr LmemNode(Node address) : address{address} {}
|
|
|
|
|
|
|
|
Node GetAddress() const {
|
|
|
|
return address;
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
|
|
|
const Node address;
|
|
|
|
};
|
|
|
|
|
|
|
|
/// Global memory node
|
|
|
|
class GmemNode final {
|
|
|
|
public:
|
|
|
|
explicit GmemNode(Node address) : address{address} {}
|
|
|
|
|
|
|
|
Node GetAddress() const {
|
|
|
|
return address;
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
|
|
|
const Node address;
|
|
|
|
};
|
|
|
|
|
|
|
|
/// Commentary, can be dropped
|
|
|
|
class CommentNode final {
|
|
|
|
public:
|
|
|
|
explicit CommentNode(const std::string& text) : text{text} {}
|
|
|
|
|
|
|
|
const std::string& GetText() const {
|
|
|
|
return text;
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
|
|
|
const std::string text;
|
|
|
|
};
|
|
|
|
|
|
|
|
class ShaderIR final {
|
|
|
|
public:
|
|
|
|
explicit ShaderIR(const ProgramCode& program_code, u32 main_offset)
|
|
|
|
: program_code{program_code}, main_offset{main_offset} {
|
|
|
|
|
|
|
|
Decode();
|
|
|
|
}
|
|
|
|
|
|
|
|
const std::map<u32, BasicBlock>& GetBasicBlocks() const {
|
|
|
|
return basic_blocks;
|
|
|
|
}
|
|
|
|
|
|
|
|
const std::set<u32>& GetRegisters() const {
|
|
|
|
return used_registers;
|
|
|
|
}
|
|
|
|
|
|
|
|
const std::set<Tegra::Shader::Pred>& GetPredicates() const {
|
|
|
|
return used_predicates;
|
|
|
|
}
|
|
|
|
|
|
|
|
const std::map<Tegra::Shader::Attribute::Index, std::set<Tegra::Shader::IpaMode>>&
|
|
|
|
GetInputAttributes() const {
|
|
|
|
return used_input_attributes;
|
|
|
|
}
|
|
|
|
|
|
|
|
const std::set<Tegra::Shader::Attribute::Index>& GetOutputAttributes() const {
|
|
|
|
return used_output_attributes;
|
|
|
|
}
|
|
|
|
|
|
|
|
const std::map<u32, ConstBuffer>& GetConstantBuffers() const {
|
|
|
|
return used_cbufs;
|
|
|
|
}
|
|
|
|
|
|
|
|
const std::set<Sampler>& GetSamplers() const {
|
|
|
|
return used_samplers;
|
|
|
|
}
|
|
|
|
|
|
|
|
const std::array<bool, Tegra::Engines::Maxwell3D::Regs::NumClipDistances>& GetClipDistances()
|
|
|
|
const {
|
|
|
|
return used_clip_distances;
|
|
|
|
}
|
|
|
|
|
|
|
|
std::size_t GetLength() const {
|
|
|
|
return static_cast<std::size_t>(coverage_end * sizeof(u64));
|
|
|
|
}
|
|
|
|
|
|
|
|
const Tegra::Shader::Header& GetHeader() const {
|
|
|
|
return header;
|
|
|
|
}
|
|
|
|
|
|
|
|
private:
|
|
|
|
void Decode();
|
|
|
|
|
|
|
|
ExitMethod Scan(u32 begin, u32 end, std::set<u32>& labels);
|
|
|
|
|
|
|
|
BasicBlock DecodeRange(u32 begin, u32 end);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Decodes a single instruction from Tegra to IR.
|
|
|
|
* @param bb Basic block where the nodes will be written to.
|
|
|
|
* @param pc Program counter. Offset to decode.
|
|
|
|
* @return Next address to decode.
|
|
|
|
*/
|
|
|
|
u32 DecodeInstr(BasicBlock& bb, u32 pc);
|
|
|
|
|
|
|
|
u32 DecodeArithmetic(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeArithmeticImmediate(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeBfe(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeBfi(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeShift(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeArithmeticInteger(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeArithmeticIntegerImmediate(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeArithmeticHalf(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeArithmeticHalfImmediate(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeFfma(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeHfma2(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeConversion(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeMemory(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeFloatSetPredicate(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeIntegerSetPredicate(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeHalfSetPredicate(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodePredicateSetRegister(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodePredicateSetPredicate(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeRegisterSetPredicate(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeFloatSet(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeIntegerSet(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeHalfSet(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeXmad(BasicBlock& bb, u32 pc);
|
|
|
|
u32 DecodeOther(BasicBlock& bb, u32 pc);
|
|
|
|
|
|
|
|
/// Internalizes node's data and returns a managed pointer to a clone of that node
|
|
|
|
Node StoreNode(NodeData&& node_data);
|
|
|
|
|
|
|
|
/// Creates a conditional node
|
|
|
|
Node Conditional(Node condition, std::vector<Node>&& code);
|
|
|
|
/// Creates a commentary
|
|
|
|
Node Comment(const std::string& text);
|
2018-12-21 01:36:17 +00:00
|
|
|
/// Creates an u32 immediate
|
|
|
|
Node Immediate(u32 value);
|
|
|
|
/// Creates a s32 immediate
|
|
|
|
Node Immediate(s32 value) {
|
|
|
|
return Immediate(static_cast<u32>(value));
|
|
|
|
}
|
|
|
|
/// Creates a f32 immediate
|
|
|
|
Node Immediate(f32 value) {
|
|
|
|
// TODO(Rodrigo): Replace this with bit_cast when C++20 releases
|
|
|
|
return Immediate(*reinterpret_cast<const u32*>(&value));
|
|
|
|
}
|
|
|
|
|
2018-12-21 01:41:31 +00:00
|
|
|
/// Generates a node for a passed register.
|
|
|
|
Node GetRegister(Tegra::Shader::Register reg);
|
2018-12-21 01:36:17 +00:00
|
|
|
/// Generates a node representing a 19-bit immediate value
|
|
|
|
Node GetImmediate19(Tegra::Shader::Instruction instr);
|
|
|
|
/// Generates a node representing a 32-bit immediate value
|
|
|
|
Node GetImmediate32(Tegra::Shader::Instruction instr);
|
2018-12-21 01:42:47 +00:00
|
|
|
/// Generates a node representing a constant buffer
|
|
|
|
Node GetConstBuffer(u64 index, u64 offset);
|
|
|
|
/// Generates a node representing a constant buffer with a variadic offset
|
|
|
|
Node GetConstBufferIndirect(u64 index, u64 offset, Node node);
|
2018-12-20 22:09:21 +00:00
|
|
|
/// Generates a node for a passed predicate. It can be optionally negated
|
|
|
|
Node GetPredicate(u64 pred, bool negated = false);
|
2018-12-21 01:36:17 +00:00
|
|
|
/// Generates a predicate node for an immediate true or false value
|
|
|
|
Node GetPredicate(bool immediate);
|
2018-12-21 01:45:34 +00:00
|
|
|
/// Generates a node representing an input atttribute. Keeps track of used attributes.
|
|
|
|
Node GetInputAttribute(Tegra::Shader::Attribute::Index index, u64 element,
|
|
|
|
const Tegra::Shader::IpaMode& input_mode, Node buffer = {});
|
|
|
|
/// Generates a node representing an output atttribute. Keeps track of used attributes.
|
|
|
|
Node GetOutputAttribute(Tegra::Shader::Attribute::Index index, u64 element, Node buffer);
|
2018-12-21 01:49:59 +00:00
|
|
|
/// Generates a node representing an internal flag
|
|
|
|
Node GetInternalFlag(InternalFlag flag, bool negated = false);
|
2018-12-21 01:51:38 +00:00
|
|
|
/// Generates a node representing a local memory address
|
|
|
|
Node GetLocalMemory(Node address);
|
|
|
|
|
2018-12-21 01:53:43 +00:00
|
|
|
/// Sets a register. src value must be a number-evaluated node.
|
|
|
|
void SetRegister(BasicBlock& bb, Tegra::Shader::Register dest, Node src);
|
|
|
|
/// Sets a predicate. src value must be a bool-evaluated node
|
|
|
|
void SetPredicate(BasicBlock& bb, u64 dest, Node src);
|
|
|
|
/// Sets an internal flag. src value must be a bool-evaluated node
|
|
|
|
void SetInternalFlag(BasicBlock& bb, InternalFlag flag, Node value);
|
|
|
|
/// Sets a local memory address. address and value must be a number-evaluated node
|
|
|
|
void SetLocalMemory(BasicBlock& bb, Node address, Node value);
|
2018-12-20 22:09:21 +00:00
|
|
|
|
|
|
|
template <typename... T>
|
|
|
|
inline Node Operation(OperationCode code, const T*... operands) {
|
|
|
|
return StoreNode(OperationNode(code, operands...));
|
|
|
|
}
|
|
|
|
|
|
|
|
template <typename... T>
|
|
|
|
inline Node Operation(OperationCode code, Meta&& meta, const T*... operands) {
|
|
|
|
return StoreNode(OperationNode(code, std::move(meta), operands...));
|
|
|
|
}
|
|
|
|
|
|
|
|
template <typename... T>
|
|
|
|
inline Node Operation(OperationCode code, std::vector<Node>&& operands) {
|
|
|
|
return StoreNode(OperationNode(code, std::move(operands)));
|
|
|
|
}
|
|
|
|
|
|
|
|
template <typename... T>
|
|
|
|
inline Node Operation(OperationCode code, Meta&& meta, std::vector<Node>&& operands) {
|
|
|
|
return StoreNode(OperationNode(code, std::move(meta), std::move(operands)));
|
|
|
|
}
|
|
|
|
|
|
|
|
template <typename... T>
|
|
|
|
inline Node SignedOperation(OperationCode code, bool is_signed, const T*... operands) {
|
|
|
|
return StoreNode(OperationNode(SignedToUnsignedCode(code, is_signed), operands...));
|
|
|
|
}
|
|
|
|
|
|
|
|
template <typename... T>
|
|
|
|
inline Node SignedOperation(OperationCode code, bool is_signed, Meta&& meta,
|
|
|
|
const T*... operands) {
|
|
|
|
return StoreNode(
|
|
|
|
OperationNode(SignedToUnsignedCode(code, is_signed), std::move(meta), operands...));
|
|
|
|
}
|
|
|
|
|
|
|
|
static OperationCode SignedToUnsignedCode(OperationCode operation_code, bool is_signed);
|
|
|
|
|
|
|
|
const ProgramCode& program_code;
|
|
|
|
const u32 main_offset;
|
|
|
|
|
|
|
|
u32 coverage_begin{};
|
|
|
|
u32 coverage_end{};
|
|
|
|
std::map<std::pair<u32, u32>, ExitMethod> exit_method_map;
|
|
|
|
|
|
|
|
std::map<u32, BasicBlock> basic_blocks;
|
|
|
|
|
|
|
|
std::vector<std::unique_ptr<NodeData>> stored_nodes;
|
|
|
|
|
|
|
|
std::set<u32> used_registers;
|
|
|
|
std::set<Tegra::Shader::Pred> used_predicates;
|
|
|
|
std::map<Tegra::Shader::Attribute::Index, std::set<Tegra::Shader::IpaMode>>
|
|
|
|
used_input_attributes;
|
|
|
|
std::set<Tegra::Shader::Attribute::Index> used_output_attributes;
|
|
|
|
std::map<u32, ConstBuffer> used_cbufs;
|
|
|
|
std::set<Sampler> used_samplers;
|
|
|
|
std::array<bool, Tegra::Engines::Maxwell3D::Regs::NumClipDistances> used_clip_distances{};
|
|
|
|
|
|
|
|
Tegra::Shader::Header header;
|
|
|
|
};
|
|
|
|
|
|
|
|
} // namespace VideoCommon::Shader
|