dd4a1672a7
Currently there's only a single dummy implementation, which will be split in a following commit.
180 lines
6 KiB
C++
180 lines
6 KiB
C++
// Copyright 2015 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <atomic>
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#include <cmath>
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#include <cstring>
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#include <unordered_map>
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#include <utility>
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#include <boost/range/algorithm/fill.hpp>
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#include "common/bit_field.h"
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#include "common/hash.h"
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#include "common/logging/log.h"
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#include "common/microprofile.h"
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#include "video_core/pica.h"
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#include "video_core/pica_state.h"
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#include "video_core/shader/shader.h"
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#include "video_core/shader/shader_interpreter.h"
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#ifdef ARCHITECTURE_x86_64
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#include "video_core/shader/shader_jit_x64.h"
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#endif // ARCHITECTURE_x86_64
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#include "video_core/video_core.h"
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namespace Pica {
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namespace Shader {
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OutputVertex OutputRegisters::ToVertex(const Regs::ShaderConfig& config) const {
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// Setup output data
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OutputVertex ret;
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// TODO(neobrain): Under some circumstances, up to 16 attributes may be output. We need to
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// figure out what those circumstances are and enable the remaining outputs then.
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unsigned index = 0;
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for (unsigned i = 0; i < 7; ++i) {
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if (index >= g_state.regs.vs_output_total)
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break;
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if ((config.output_mask & (1 << i)) == 0)
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continue;
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const auto& output_register_map = g_state.regs.vs_output_attributes[index];
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u32 semantics[4] = {output_register_map.map_x, output_register_map.map_y,
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output_register_map.map_z, output_register_map.map_w};
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for (unsigned comp = 0; comp < 4; ++comp) {
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float24* out = ((float24*)&ret) + semantics[comp];
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if (semantics[comp] != Regs::VSOutputAttributes::INVALID) {
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*out = value[i][comp];
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} else {
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// Zero output so that attributes which aren't output won't have denormals in them,
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// which would slow us down later.
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memset(out, 0, sizeof(*out));
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}
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}
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index++;
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}
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// The hardware takes the absolute and saturates vertex colors like this, *before* doing
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// interpolation
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for (unsigned i = 0; i < 4; ++i) {
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ret.color[i] = float24::FromFloat32(std::fmin(std::fabs(ret.color[i].ToFloat32()), 1.0f));
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}
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LOG_TRACE(HW_GPU, "Output vertex: pos(%.2f, %.2f, %.2f, %.2f), quat(%.2f, %.2f, %.2f, %.2f), "
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"col(%.2f, %.2f, %.2f, %.2f), tc0(%.2f, %.2f), view(%.2f, %.2f, %.2f)",
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ret.pos.x.ToFloat32(), ret.pos.y.ToFloat32(), ret.pos.z.ToFloat32(),
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ret.pos.w.ToFloat32(), ret.quat.x.ToFloat32(), ret.quat.y.ToFloat32(),
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ret.quat.z.ToFloat32(), ret.quat.w.ToFloat32(), ret.color.x.ToFloat32(),
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ret.color.y.ToFloat32(), ret.color.z.ToFloat32(), ret.color.w.ToFloat32(),
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ret.tc0.u().ToFloat32(), ret.tc0.v().ToFloat32(), ret.view.x.ToFloat32(),
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ret.view.y.ToFloat32(), ret.view.z.ToFloat32());
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return ret;
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}
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void UnitState::LoadInputVertex(const InputVertex& input, int num_attributes) {
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// Setup input register table
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const auto& attribute_register_map = g_state.regs.vs.input_register_map;
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for (int i = 0; i < num_attributes; i++)
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registers.input[attribute_register_map.GetRegisterForAttribute(i)] = input.attr[i];
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conditional_code[0] = false;
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conditional_code[1] = false;
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}
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class MergedShaderEngine : public ShaderEngine {
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public:
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void SetupBatch(const ShaderSetup* setup) override;
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void Run(UnitState& state, unsigned int entry_point) const override;
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DebugData<true> ProduceDebugInfo(const InputVertex& input, int num_attributes,
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unsigned int entry_point) const override;
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private:
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const ShaderSetup* setup = nullptr;
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};
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#ifdef ARCHITECTURE_x86_64
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static std::unordered_map<u64, std::unique_ptr<JitShader>> shader_map;
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static const JitShader* jit_shader;
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#endif // ARCHITECTURE_x86_64
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void ClearCache() {
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#ifdef ARCHITECTURE_x86_64
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shader_map.clear();
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#endif // ARCHITECTURE_x86_64
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}
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void MergedShaderEngine::SetupBatch(const ShaderSetup* setup_) {
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setup = setup_;
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if (setup == nullptr)
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return;
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#ifdef ARCHITECTURE_x86_64
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if (VideoCore::g_shader_jit_enabled) {
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u64 code_hash = Common::ComputeHash64(&setup->program_code, sizeof(setup->program_code));
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u64 swizzle_hash = Common::ComputeHash64(&setup->swizzle_data, sizeof(setup->swizzle_data));
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u64 cache_key = code_hash ^ swizzle_hash;
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auto iter = shader_map.find(cache_key);
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if (iter != shader_map.end()) {
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jit_shader = iter->second.get();
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} else {
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auto shader = std::make_unique<JitShader>();
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shader->Compile();
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jit_shader = shader.get();
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shader_map[cache_key] = std::move(shader);
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}
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}
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#endif // ARCHITECTURE_x86_64
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}
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MICROPROFILE_DEFINE(GPU_Shader, "GPU", "Shader", MP_RGB(50, 50, 240));
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void MergedShaderEngine::Run(UnitState& state, unsigned int entry_point) const {
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ASSERT(setup != nullptr);
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ASSERT(entry_point < 1024);
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MICROPROFILE_SCOPE(GPU_Shader);
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#ifdef ARCHITECTURE_x86_64
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if (VideoCore::g_shader_jit_enabled) {
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jit_shader->Run(*setup, state, entry_point);
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} else {
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DebugData<false> dummy_debug_data;
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RunInterpreter(*setup, state, dummy_debug_data, entry_point);
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}
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#else
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DebugData<false> dummy_debug_data;
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RunInterpreter(*setup, state, dummy_debug_data, entry_point);
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#endif // ARCHITECTURE_x86_64
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}
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DebugData<true> MergedShaderEngine::ProduceDebugInfo(const InputVertex& input, int num_attributes,
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unsigned int entry_point) const {
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ASSERT(setup != nullptr);
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ASSERT(entry_point < 1024);
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UnitState state;
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DebugData<true> debug_data;
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// Setup input register table
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boost::fill(state.registers.input, Math::Vec4<float24>::AssignToAll(float24::Zero()));
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state.LoadInputVertex(input, num_attributes);
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RunInterpreter(*setup, state, debug_data, entry_point);
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return debug_data;
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}
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ShaderEngine* GetEngine() {
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static MergedShaderEngine merged_engine;
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return &merged_engine;
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}
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} // namespace Shader
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} // namespace Pica
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