7ff5851608
StorageAtomicExchangeU64 is failing test seemingly due to failure storing 64-bit result into the register
352 lines
13 KiB
C++
352 lines
13 KiB
C++
// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "shader_recompiler/backend/glasm/emit_context.h"
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#include "shader_recompiler/backend/glasm/emit_glasm_instructions.h"
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#include "shader_recompiler/frontend/ir/value.h"
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namespace Shader::Backend::GLASM {
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namespace {
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void StorageOp(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset,
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std::string_view then_expr, std::string_view else_expr = {}) {
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// Operate on bindless SSBO, call the expression with bounds checking
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// address = c[binding].xy
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// length = c[binding].z
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const u32 sb_binding{binding.U32()};
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ctx.Add("PK64.U DC,c[{}];" // pointer = address
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"CVT.U64.U32 DC.z,{};" // offset = uint64_t(offset)
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"ADD.U64 DC.x,DC.x,DC.z;" // pointer += offset
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"SLT.U.CC RC.x,{},c[{}].z;", // cc = offset < length
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sb_binding, offset, offset, sb_binding);
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if (else_expr.empty()) {
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ctx.Add("IF NE.x;{}ENDIF;", then_expr);
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} else {
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ctx.Add("IF NE.x;{}ELSE;{}ENDIF;", then_expr, else_expr);
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}
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}
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template <typename ValueType>
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void Atom(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset,
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ValueType value, std::string_view operation, std::string_view size) {
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const Register ret{ctx.reg_alloc.Define(inst)};
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StorageOp(ctx, binding, offset,
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fmt::format("ATOM.{}.{} {},{},DC.x;", operation, size, ret, value));
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}
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} // namespace
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void EmitSharedAtomicIAdd32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.ADD.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicSMin32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarS32 value) {
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ctx.Add("ATOMS.MIN.S32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicUMin32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.MIN.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicSMax32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarS32 value) {
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ctx.Add("ATOMS.MAX.S32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicUMax32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.MAX.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicInc32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.IWRAP.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicDec32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.DWRAP.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicAnd32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.AND.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicOr32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.OR.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicXor32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.XOR.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicExchange32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.EXCH.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicExchange64(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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Register value) {
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ctx.LongAdd("ATOMS.EXCH.U64 {}.x,{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitStorageAtomicIAdd32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "ADD", "U32");
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}
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void EmitStorageAtomicSMin32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarS32 value) {
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Atom(ctx, inst, binding, offset, value, "MIN", "S32");
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}
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void EmitStorageAtomicUMin32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "MIN", "U32");
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}
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void EmitStorageAtomicSMax32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarS32 value) {
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Atom(ctx, inst, binding, offset, value, "MAX", "S32");
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}
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void EmitStorageAtomicUMax32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "MAX", "U32");
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}
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void EmitStorageAtomicInc32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "IWRAP", "U32");
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}
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void EmitStorageAtomicDec32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "DWRAP", "U32");
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}
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void EmitStorageAtomicAnd32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "AND", "U32");
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}
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void EmitStorageAtomicOr32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "OR", "U32");
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}
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void EmitStorageAtomicXor32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "XOR", "U32");
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}
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void EmitStorageAtomicExchange32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "EXCH", "U32");
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}
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void EmitStorageAtomicIAdd64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "ADD", "U64");
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}
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void EmitStorageAtomicSMin64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "MIN", "S64");
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}
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void EmitStorageAtomicUMin64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "MIN", "U64");
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}
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void EmitStorageAtomicSMax64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "MAX", "S64");
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}
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void EmitStorageAtomicUMax64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "MAX", "U64");
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}
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void EmitStorageAtomicAnd64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "AND", "U64");
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}
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void EmitStorageAtomicOr64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "OR", "U64");
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}
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void EmitStorageAtomicXor64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "XOR", "U64");
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}
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void EmitStorageAtomicExchange64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "EXCH", "U64");
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}
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void EmitStorageAtomicAddF32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarF32 value) {
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Atom(ctx, inst, binding, offset, value, "ADD", "F32");
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}
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void EmitStorageAtomicAddF16x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "ADD", "F16x2");
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}
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void EmitStorageAtomicAddF32x2([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
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[[maybe_unused]] const IR::Value& binding,
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[[maybe_unused]] ScalarU32 offset, [[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitStorageAtomicMinF16x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "MIN", "F16x2");
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}
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void EmitStorageAtomicMinF32x2([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
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[[maybe_unused]] const IR::Value& binding,
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[[maybe_unused]] ScalarU32 offset, [[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitStorageAtomicMaxF16x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "MAX", "F16x2");
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}
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void EmitStorageAtomicMaxF32x2([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
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[[maybe_unused]] const IR::Value& binding,
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[[maybe_unused]] ScalarU32 offset, [[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicIAdd32(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicSMin32(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicUMin32(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicSMax32(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicUMax32(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicInc32(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicDec32(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicAnd32(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicOr32(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicXor32(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicExchange32(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicIAdd64(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicSMin64(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicUMin64(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicSMax64(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicUMax64(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicInc64(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicDec64(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicAnd64(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicOr64(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicXor64(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicExchange64(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicAddF32(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicAddF16x2(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicAddF32x2(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicMinF16x2(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicMinF32x2(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicMaxF16x2(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitGlobalAtomicMaxF32x2(EmitContext&) {
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throw NotImplementedException("GLASM instruction");
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}
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} // namespace Shader::Backend::GLASM
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