587 lines
17 KiB
C++
587 lines
17 KiB
C++
/* arminit.c -- ARMulator initialization: ARM6 Instruction Emulator.
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Copyright (C) 1994 Advanced RISC Machines Ltd.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "common/platform.h"
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#if EMU_PLATFORM == PLATFORM_LINUX
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#include <unistd.h>
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#elif EMU_PLATFORM == PLATFORM_WINDOWS
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#include <windows.h>
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#endif
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#include <math.h>
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#include "core/arm/interpreter/armdefs.h"
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#include "core/arm/interpreter/armemu.h"
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/***************************************************************************\
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* Definitions for the emulator architecture *
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\***************************************************************************/
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void ARMul_EmulateInit (void);
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ARMul_State *ARMul_NewState (ARMul_State * state);
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void ARMul_Reset (ARMul_State * state);
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ARMword ARMul_DoCycle (ARMul_State * state);
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unsigned ARMul_DoCoPro (ARMul_State * state);
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ARMword ARMul_DoProg (ARMul_State * state);
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ARMword ARMul_DoInstr (ARMul_State * state);
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void ARMul_Abort (ARMul_State * state, ARMword address);
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unsigned ARMul_MultTable[32] =
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{ 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
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10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 16
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};
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ARMword ARMul_ImmedTable[4096]; /* immediate DP LHS values */
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char ARMul_BitList[256]; /* number of bits in a byte table */
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//chy 2006-02-22 add test debugmode
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extern int debugmode;
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extern int remote_interrupt( void );
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void arm_dyncom_Abort(ARMul_State * state, ARMword vector)
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{
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ARMul_Abort(state, vector);
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}
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/* ahe-ykl : the following code to initialize user mode
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code is architecture dependent and probably model dependant. */
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//#include "skyeye_arch.h"
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//#include "skyeye_pref.h"
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//#include "skyeye_exec_info.h"
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//#include "bank_defs.h"
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#include "armcpu.h"
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//#include "skyeye_callback.h"
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//void arm_user_mode_init(generic_arch_t * arch_instance)
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//{
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// sky_pref_t *pref = get_skyeye_pref();
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//
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// if (pref->user_mode_sim)
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// {
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// sky_exec_info_t *info = get_skyeye_exec_info();
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// info->arch_page_size = 0x1000;
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// info->arch_stack_top = 0x1ffffff0;// + 0x401fe7 - 0xff0; /* arbitrary value */
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// /* stack initial address specific to architecture may be placed here */
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//
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// /* we need to mmap the stack space, if we are using skyeye space */
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// if (info->mmap_access)
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// {
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// /* get system stack size */
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// size_t stacksize = 0;
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// pthread_attr_t attr;
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// pthread_attr_init(&attr);
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// pthread_attr_getstacksize(&attr, &stacksize);
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// if (stacksize > info->arch_stack_top)
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// {
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// printf("arch_stack_top is too low\n");
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// stacksize = info->arch_stack_top;
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// }
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//
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// /* Note: Skyeye is occupating 0x400000 to 0x600000 */
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// /* We do a mmap */
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// void* ret = mmap( (info->arch_stack_top) - stacksize,
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// stacksize + 0x1000 , PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
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// if (ret == MAP_FAILED){
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// /* ideally, we should find an empty space until it works */
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// printf("mmap error, stack couldn't be mapped: errno %d\n", errno);
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// exit(-1);
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// } else {
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// memset(ret, '\0', stacksize);
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// //printf("stack top has been defined at %x size %x\n", (uint32_t) ret + stacksize, stacksize);
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// //info->arch_stack_top = (uint32_t) ret + stacksize;
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// }
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// }
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//
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// exec_stack_init();
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//
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// ARM_CPU_State* cpu = get_current_cpu();
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// arm_core_t* core = &cpu->core[0];
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//
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// uint32_t sp = info->initial_sp;
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//
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// core->Cpsr = 0x10; /* User mode */
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// /* FIXME: may need to add thumb */
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// core->Reg[13] = sp;
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// core->Reg[10] = info->start_data;
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// core->Reg[0] = 0;
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// bus_read(32, sp + 4, &(core->Reg[1]));
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// bus_read(32, sp + 8, &(core->Reg[2]));
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// }
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//
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//}
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/***************************************************************************\
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* Call this routine once to set up the emulator's tables. *
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\***************************************************************************/
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void
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ARMul_EmulateInit (void)
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{
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unsigned int i, j;
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for (i = 0; i < 4096; i++) { /* the values of 12 bit dp rhs's */
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ARMul_ImmedTable[i] = ROTATER (i & 0xffL, (i >> 7L) & 0x1eL);
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}
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for (i = 0; i < 256; ARMul_BitList[i++] = 0); /* how many bits in LSM */
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for (j = 1; j < 256; j <<= 1)
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for (i = 0; i < 256; i++)
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if ((i & j) > 0)
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ARMul_BitList[i]++;
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for (i = 0; i < 256; i++)
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ARMul_BitList[i] *= 4; /* you always need 4 times these values */
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}
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/***************************************************************************\
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* Returns a new instantiation of the ARMulator's state *
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\***************************************************************************/
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ARMul_State *
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ARMul_NewState (ARMul_State *state)
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{
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unsigned i, j;
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memset (state, 0, sizeof (ARMul_State));
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state->Emulate = RUN;
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for (i = 0; i < 16; i++) {
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state->Reg[i] = 0;
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for (j = 0; j < 7; j++)
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state->RegBank[j][i] = 0;
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}
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for (i = 0; i < 7; i++)
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state->Spsr[i] = 0;
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state->Mode = 0;
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state->CallDebug = FALSE;
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state->Debug = FALSE;
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state->VectorCatch = 0;
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state->Aborted = FALSE;
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state->Reseted = FALSE;
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state->Inted = 3;
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state->LastInted = 3;
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state->CommandLine = NULL;
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state->EventSet = 0;
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state->Now = 0;
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state->EventPtr =
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(struct EventNode **) malloc ((unsigned) EVENTLISTSIZE *
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sizeof (struct EventNode *));
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#if DIFF_STATE
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state->state_log = fopen("/data/state.log", "w");
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printf("create pc log file.\n");
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#endif
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if (state->EventPtr == NULL) {
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printf ("SKYEYE: ARMul_NewState malloc state->EventPtr error\n");
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exit(-1);
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}
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for (i = 0; i < EVENTLISTSIZE; i++)
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*(state->EventPtr + i) = NULL;
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#if SAVE_LOG
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state->state_log = fopen("/tmp/state.log", "w");
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printf("create pc log file.\n");
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#else
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#if DIFF_LOG
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state->state_log = fopen("/tmp/state.log", "r");
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printf("loaded pc log file.\n");
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#endif
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#endif
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#ifdef ARM61
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state->prog32Sig = LOW;
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state->data32Sig = LOW;
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#else
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state->prog32Sig = HIGH;
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state->data32Sig = HIGH;
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#endif
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state->lateabtSig = HIGH;
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state->bigendSig = LOW;
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//chy:2003-08-19
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state->LastTime = 0;
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state->CP14R0_CCD = -1;
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/* ahe-ykl: common function for interpret and dyncom */
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//sky_pref_t *pref = get_skyeye_pref();
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//if (pref->user_mode_sim)
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// register_callback(arm_user_mode_init, Bootmach_callback);
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memset(&state->exclusive_tag_array[0], 0xFF, sizeof(state->exclusive_tag_array[0]) * 128);
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state->exclusive_access_state = 0;
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//state->cpu = (cpu_config_t *) malloc (sizeof (cpu_config_t));
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//state->mem_bank = (mem_config_t *) malloc (sizeof (mem_config_t));
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return (state);
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}
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/***************************************************************************\
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* Call this routine to set ARMulator to model a certain processor *
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\***************************************************************************/
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void
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ARMul_SelectProcessor (ARMul_State * state, unsigned properties)
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{
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if (properties & ARM_Fix26_Prop) {
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state->prog32Sig = LOW;
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state->data32Sig = LOW;
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}
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else {
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state->prog32Sig = HIGH;
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state->data32Sig = HIGH;
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}
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/* 2004-05-09 chy
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below line sould be in skyeye_mach_XXX.c 's XXX_mach_init function
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*/
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// state->lateabtSig = HIGH;
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state->is_v4 =
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(properties & (ARM_v4_Prop | ARM_v5_Prop)) ? HIGH : LOW;
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state->is_v5 = (properties & ARM_v5_Prop) ? HIGH : LOW;
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state->is_v5e = (properties & ARM_v5e_Prop) ? HIGH : LOW;
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state->is_XScale = (properties & ARM_XScale_Prop) ? HIGH : LOW;
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state->is_iWMMXt = (properties & ARM_iWMMXt_Prop) ? HIGH : LOW;
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/* state->is_v6 = LOW */;
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/* jeff.du 2010-08-05 */
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state->is_v6 = (properties & ARM_v6_Prop) ? HIGH : LOW;
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state->is_ep9312 = (properties & ARM_ep9312_Prop) ? HIGH : LOW;
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//chy 2005-09-19
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state->is_pxa27x = (properties & ARM_PXA27X_Prop) ? HIGH : LOW;
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/* shenoubang 2012-3-11 */
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state->is_v7 = (properties & ARM_v7_Prop) ? HIGH : LOW;
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/* Only initialse the coprocessor support once we
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know what kind of chip we are dealing with. */
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ARMul_CoProInit (state);
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}
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/***************************************************************************\
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* Call this routine to set up the initial machine state (or perform a RESET *
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\***************************************************************************/
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void
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ARMul_Reset (ARMul_State * state)
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{
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//fprintf(stderr,"armul_reset 0: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
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state->NextInstr = 0;
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if (state->prog32Sig) {
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state->Reg[15] = 0;
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state->Cpsr = INTBITS | SVC32MODE;
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state->Mode = SVC32MODE;
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}
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else {
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state->Reg[15] = R15INTBITS | SVC26MODE;
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state->Cpsr = INTBITS | SVC26MODE;
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state->Mode = SVC26MODE;
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}
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//fprintf(stderr,"armul_reset 1: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
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ARMul_CPSRAltered (state);
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state->Bank = SVCBANK;
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FLUSHPIPE;
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state->EndCondition = 0;
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state->ErrorCode = 0;
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//fprintf(stderr,"armul_reset 2: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
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state->NresetSig = HIGH;
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state->NfiqSig = HIGH;
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state->NirqSig = HIGH;
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state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
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state->abortSig = LOW;
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state->AbortAddr = 1;
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state->NumInstrs = 0;
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state->NumNcycles = 0;
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state->NumScycles = 0;
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state->NumIcycles = 0;
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state->NumCcycles = 0;
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state->NumFcycles = 0;
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//fprintf(stderr,"armul_reset 3: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
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mmu_reset (state);
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//fprintf(stderr,"armul_reset 4: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
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//mem_reset (state); /* move to memory/ram.c */
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//fprintf(stderr,"armul_reset 5: state-> Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
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/*remove later. walimis 03.7.17 */
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//io_reset(state);
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//lcd_disable(state);
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/*ywc 2005-04-07 move from ARMul_NewState , because skyeye_config.no_dbct will
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*be configured in skyeye_option_init and it is called after ARMul_NewState*/
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state->tea_break_ok = 0;
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state->tea_break_addr = 0;
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state->tea_pc = 0;
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#ifdef DBCT
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if (!skyeye_config.no_dbct) {
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//teawater add for arm2x86 2005.02.14-------------------------------------------
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if (arm2x86_init (state)) {
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printf ("SKYEYE: arm2x86_init error\n");
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skyeye_exit (-1);
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}
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//AJ2D--------------------------------------------------------------------------
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}
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#endif
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}
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/***************************************************************************\
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* Emulate the execution of an entire program. Start the correct emulator *
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* (Emulate26 for a 26 bit ARM and Emulate32 for a 32 bit ARM), return the *
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* address of the last instruction that is executed. *
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\***************************************************************************/
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//teawater add DBCT_TEST_SPEED 2005.10.04---------------------------------------
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#ifdef DBCT_TEST_SPEED
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static ARMul_State *dbct_test_speed_state = NULL;
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static void
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dbct_test_speed_sig(int signo)
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{
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printf("\n0x%llx %llu\n", dbct_test_speed_state->instr_count, dbct_test_speed_state->instr_count);
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skyeye_exit(0);
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}
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#endif //DBCT_TEST_SPEED
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//AJ2D--------------------------------------------------------------------------
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ARMword
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ARMul_DoProg (ARMul_State * state)
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{
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ARMword pc = 0;
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/*
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* 2007-01-24 removed the term-io functions by Anthony Lee,
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* moved to "device/uart/skyeye_uart_stdio.c".
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*/
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//teawater add DBCT_TEST_SPEED 2005.10.04---------------------------------------
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#ifdef DBCT_TEST_SPEED
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{
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if (!dbct_test_speed_state) {
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//init timer
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struct itimerval value;
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struct sigaction act;
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dbct_test_speed_state = state;
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state->instr_count = 0;
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act.sa_handler = dbct_test_speed_sig;
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act.sa_flags = SA_RESTART;
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//cygwin don't support ITIMER_VIRTUAL or ITIMER_PROF
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#ifndef __CYGWIN__
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if (sigaction(SIGVTALRM, &act, NULL) == -1) {
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#else
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if (sigaction(SIGALRM, &act, NULL) == -1) {
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#endif //__CYGWIN__
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fprintf(stderr, "init timer error.\n");
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skyeye_exit(-1);
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}
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if (skyeye_config.dbct_test_speed_sec) {
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value.it_value.tv_sec = skyeye_config.dbct_test_speed_sec;
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}
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else {
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value.it_value.tv_sec = DBCT_TEST_SPEED_SEC;
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}
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printf("dbct_test_speed_sec = %ld\n", value.it_value.tv_sec);
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value.it_value.tv_usec = 0;
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value.it_interval.tv_sec = 0;
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value.it_interval.tv_usec = 0;
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#ifndef __CYGWIN__
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if (setitimer(ITIMER_VIRTUAL, &value, NULL) == -1) {
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#else
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if (setitimer(ITIMER_REAL, &value, NULL) == -1) {
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#endif //__CYGWIN__
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fprintf(stderr, "init timer error.\n");
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skyeye_exit(-1);
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}
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}
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}
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#endif //DBCT_TEST_SPEED
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//AJ2D--------------------------------------------------------------------------
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state->Emulate = RUN;
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while (state->Emulate != STOP) {
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state->Emulate = RUN;
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/*ywc 2005-03-31 */
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if (state->prog32Sig && ARMul_MODE32BIT) {
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#ifdef DBCT
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if (skyeye_config.no_dbct) {
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pc = ARMul_Emulate32 (state);
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}
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else {
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pc = ARMul_Emulate32_dbct (state);
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}
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#else
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pc = ARMul_Emulate32 (state);
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#endif
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}
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else {
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_dbg_assert_msg_(ARM11, false, "Unsupported ARM 26-bit Mode!");
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}
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//chy 2006-02-22, should test debugmode first
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//chy 2006-04-14, put below codes in ARMul_Emulate
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#if 0
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if(debugmode)
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if(remote_interrupt())
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state->Emulate = STOP;
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#endif
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}
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/*
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* 2007-01-24 removed the term-io functions by Anthony Lee,
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* moved to "device/uart/skyeye_uart_stdio.c".
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*/
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return (pc);
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}
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/***************************************************************************\
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* Emulate the execution of one instruction. Start the correct emulator *
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* (Emulate26 for a 26 bit ARM and Emulate32 for a 32 bit ARM), return the *
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* address of the instruction that is executed. *
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\***************************************************************************/
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ARMword
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ARMul_DoInstr (ARMul_State * state)
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{
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ARMword pc = 0;
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state->Emulate = ONCE;
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/*ywc 2005-03-31 */
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if (state->prog32Sig && ARMul_MODE32BIT) {
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#ifdef DBCT
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if (skyeye_config.no_dbct) {
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pc = ARMul_Emulate32 (state);
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}
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else {
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//teawater add compile switch for DBCT GDB RSP function 2005.10.21--------------
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#ifndef DBCT_GDBRSP
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printf("DBCT GDBRSP function switch is off.\n");
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printf("To use this function, open \"#define DBCT_GDBRSP\" in arch/arm/common/armdefs.h & recompile skyeye.\n");
|
|
skyeye_exit(-1);
|
|
#endif //DBCT_GDBRSP
|
|
//AJ2D--------------------------------------------------------------------------
|
|
pc = ARMul_Emulate32_dbct (state);
|
|
}
|
|
#else
|
|
pc = ARMul_Emulate32 (state);
|
|
#endif
|
|
}
|
|
|
|
else {
|
|
_dbg_assert_msg_(ARM11, false, "Unsupported ARM 26-bit Mode!");
|
|
}
|
|
|
|
return (pc);
|
|
}
|
|
|
|
/***************************************************************************\
|
|
* This routine causes an Abort to occur, including selecting the correct *
|
|
* mode, register bank, and the saving of registers. Call with the *
|
|
* appropriate vector's memory address (0,4,8 ....) *
|
|
\***************************************************************************/
|
|
|
|
void
|
|
ARMul_Abort (ARMul_State * state, ARMword vector)
|
|
{
|
|
ARMword temp;
|
|
int isize = INSN_SIZE;
|
|
int esize = (TFLAG ? 0 : 4);
|
|
int e2size = (TFLAG ? -4 : 0);
|
|
|
|
state->Aborted = FALSE;
|
|
|
|
if (state->prog32Sig)
|
|
if (ARMul_MODE26BIT)
|
|
temp = R15PC;
|
|
else
|
|
temp = state->Reg[15];
|
|
else
|
|
temp = R15PC | ECC | ER15INT | EMODE;
|
|
|
|
switch (vector) {
|
|
case ARMul_ResetV: /* RESET */
|
|
SETABORT (INTBITS, state->prog32Sig ? SVC32MODE : SVC26MODE,
|
|
0);
|
|
break;
|
|
case ARMul_UndefinedInstrV: /* Undefined Instruction */
|
|
SETABORT (IBIT, state->prog32Sig ? UNDEF32MODE : SVC26MODE,
|
|
isize);
|
|
break;
|
|
case ARMul_SWIV: /* Software Interrupt */
|
|
// Modified SETABORT that doesn't branch to a SVC vector as we are implementing this in HLE
|
|
// Instead of doing normal routine, backup R15 by one instruction (this is what PC will get
|
|
// set to, making it the next instruction after the SVC call), and skip setting the LR.
|
|
SETABORT_SKIPBRANCH (IBIT, state->prog32Sig ? SVC32MODE : SVC26MODE,
|
|
isize);
|
|
state->Reg[15] -= 4;
|
|
return;
|
|
case ARMul_PrefetchAbortV: /* Prefetch Abort */
|
|
state->AbortAddr = 1;
|
|
SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE,
|
|
esize);
|
|
break;
|
|
case ARMul_DataAbortV: /* Data Abort */
|
|
SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE,
|
|
e2size);
|
|
break;
|
|
case ARMul_AddrExceptnV: /* Address Exception */
|
|
SETABORT (IBIT, SVC26MODE, isize);
|
|
break;
|
|
case ARMul_IRQV: /* IRQ */
|
|
//chy 2003-09-02 the if sentence seems no use
|
|
#if 0
|
|
if (!state->is_XScale || !state->CPRead[13] (state, 0, &temp)
|
|
|| (temp & ARMul_CP13_R0_IRQ))
|
|
#endif
|
|
SETABORT (IBIT,
|
|
state->prog32Sig ? IRQ32MODE : IRQ26MODE,
|
|
esize);
|
|
break;
|
|
case ARMul_FIQV: /* FIQ */
|
|
//chy 2003-09-02 the if sentence seems no use
|
|
#if 0
|
|
if (!state->is_XScale || !state->CPRead[13] (state, 0, &temp)
|
|
|| (temp & ARMul_CP13_R0_FIQ))
|
|
#endif
|
|
SETABORT (INTBITS,
|
|
state->prog32Sig ? FIQ32MODE : FIQ26MODE,
|
|
esize);
|
|
break;
|
|
}
|
|
|
|
if (ARMul_MODE32BIT) {
|
|
if (state->mmu.control & CONTROL_VECTOR)
|
|
vector += 0xffff0000; //for v4 high exception address
|
|
if (state->vector_remap_flag)
|
|
vector += state->vector_remap_addr; /* support some remap function in LPC processor */
|
|
ARMul_SetR15 (state, vector);
|
|
}
|
|
else
|
|
ARMul_SetR15 (state, R15CCINTMODE | vector);
|
|
}
|