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Author SHA1 Message Date
ReinUsesLisp c8a48aacc0
video_core: Unify ProgramType and ShaderStage into ShaderType 2019-11-22 21:28:48 -03:00
ReinUsesLisp 287ae2b9e8
gl_shader_cache: Specialize local memory size for compute shaders 
Local memory size in compute shaders was stubbed with an arbitary size.
This commit specializes local memory size from guest GPU parameters.
 2019-11-22 21:28:48 -03:00
ReinUsesLisp 4f5d8e4342
gl_shader_cache: Specialize shader workgroup 
Drop the usage of ARB_compute_variable_group_size and specialize compute
shaders instead. This permits compute to run on AMD and Intel
proprietary drivers.
 2019-11-22 21:28:47 -03:00
ReinUsesLisp 80eacdf89b
texture_cache: Use a table instead of switch for texture formats 
Use a large flat array to look up texture formats. This allows us to
properly implement formats with different component types. It should
also be faster.
 2019-11-14 20:57:10 -03:00
Fernando Sahmkow cd0f5dfc17 Shader_IR: Implement TXD instruction. 2019-11-14 11:15:27 -04:00
Fernando Sahmkow f3d1b370aa Shader_IR: Implement FLO instruction. 2019-11-14 11:15:27 -04:00
Fernando Sahmkow 95137a04e1 Shader_Bytecode: Add encodings for FLO, SHF and TXD 2019-11-14 11:15:26 -04:00
Fernando Sahmkow b6f6733131
Merge pull request #3081 from ReinUsesLisp/fswzadd-shuffles 
shader: Implement FSWZADD and reimplement SHFL
 2019-11-14 10:27:27 -04:00
ReinUsesLisp 7990220df7
maxwell_3d: Fix stencil_back_func_mask offset 
stencil_back_func_mask and stencil_back_mask were misplaced. This commit
addresses that issue.
 2019-11-13 16:35:17 -03:00
ReinUsesLisp 096f339a2a video_core: Silence implicit conversion warnings 2019-11-08 22:48:50 +00:00
ReinUsesLisp 56e237d1f9
shader_ir/warp: Implement FSWZADD 2019-11-07 20:08:41 -03:00
bunnei 21e07df7b7
Merge pull request #2914 from FernandoS27/fermi-fix 
Fermi2D: limit blit area to only available area
 2019-11-05 20:45:24 -05:00
bunnei 1bdae0fe29 common_func: Use std::array for INSERT_PADDING_* macros. 
- Zero initialization here is useful for determinism.
 2019-11-03 22:22:41 -05:00
Rodrigo Locatti 658489ebf7
Merge pull request #3050 from FernandoS27/fix-tld4 
shader_ir: Fix TLD4 and add bindless variant
 2019-10-30 18:37:17 +00:00
Fernando Sahmkow 9293c3a0f2 Shader_IR: Fix TLD4 and add Bindless Variant. 
This commit fixes an issue where not all 4 results of tld4 were being
written, the color component was defaulted to red, among other things.
It also implements the bindless variant.
 2019-10-30 12:02:03 -04:00
ReinUsesLisp fa31e5b868
maxwell_3d/kepler_compute: Remove unused arguments in GetTexture 2019-10-28 00:23:42 -03:00
ReinUsesLisp 538ddd220e
video_core/textures: Remove unused index entry in FullTextureInfo 2019-10-28 00:14:38 -03:00
ReinUsesLisp 961fe4d19b
maxwell_3d: Remove unused method GetStageTextures 2019-10-28 00:14:29 -03:00
ReinUsesLisp 3e469cecc1
maxwell_3d: Silence implicit conversion warnings 
While we are at it, unify types for dirty reg pointers.
 2019-10-27 15:22:17 -03:00
Fernando Sahmkow be856a38d6 Shader_IR: Address Feedback. 2019-10-26 15:38:30 -04:00
Fernando Sahmkow e3afd6595a Shader_IR: Clang format 2019-10-25 09:01:32 -04:00
ReinUsesLisp ec85648af3 gl_shader_disk_cache: Store and load fast BRX 2019-10-25 09:01:31 -04:00
Fernando Sahmkow 33fcec3502 Shader_IR: allow lookup of texture samplers within the shader_ir for instructions that don't provide it 2019-10-25 09:01:30 -04:00
Fernando Sahmkow 1a58f45d76 VideoCore: Unify const buffer accessing along engines and provide ConstBufferLocker class to shaders. 2019-10-25 09:01:29 -04:00
Lioncash 7fdf991097 shader_bytecode: Make Matcher constexpr capable 
Greatly shrinks the amount of generated code for GetDecodeTable().

Collapses an assembly output of 9000+ lines down to ~3621 with Clang,
and 6513 down to ~2616 with GCC, given it's now allowed to construct all
the entries as a sequence of constant data.
 2019-10-24 01:10:10 -04:00
ReinUsesLisp e3107788e6
maxwell_3d: Reduce FlushMMEInlineDraw logging to Trace 2019-10-20 03:43:17 -03:00
Fernando Sahmkow c0eb1aecfd Fermi2D: Use a different formula for delimiting blit areas. 2019-10-17 18:21:01 -04:00
Fernando Sahmkow 57a46c69f1 Fermi2D: limit blit area to only available area 
Normaly OpenGL does not care if the areas exceed the texture regions but
other backends such as Vulkan do care about the limits of this areas.
This PR crops the areas of the blit in order that they don't surpass the
limits of the textures. This should help Vulkan and faulty OpenGL
drivers
 2019-10-17 10:38:44 -04:00
Lioncash c9c75f9587 maxwell_3d: Silence truncation warnings 
A trivial warning caused by not using size_t as the argument types
instead of u32.
 2019-10-15 17:51:35 -04:00
ReinUsesLisp fe7f20e659 maxwell_3d: Add dirty flags for depth bounds values 
This is useful in Vulkan where we want to update depth bounds without
caring if it's enabled or disabled through vkCmdSetDepthBounds.
 2019-10-05 04:07:47 +00:00
bunnei 376f1a4432
Merge pull request #2869 from ReinUsesLisp/suld 
shader/image: Implement SULD and fix SUATOM
 2019-09-23 21:47:03 -04:00
David 9d69206cd0
Merge pull request #2870 from FernandoS27/multi-draw 
Implement a MME Draw commands Inliner and correct host instance drawing
 2019-09-22 23:13:02 +10:00
Fernando Sahmkow 68f5aff64f Maxwell3D: Corrections and refactors to MME instance refactor 2019-09-22 07:23:13 -04:00
FearlessTobi 01fc969a5f Fix clang-format 2019-09-22 02:21:56 +02:00
FearlessTobi 366e900376 fermi_2d: Lower surface copy log severity to DEBUG 2019-09-22 02:18:57 +02:00
Rodrigo Locatti 9286976948
Merge pull request #2878 from FernandoS27/icmp 
shader_ir: Implement ICMP
 2019-09-21 18:06:07 -03:00
ReinUsesLisp 44000971e2
gl_shader_decompiler: Use uint for images and fix SUATOM 
In the process remove implementation of SUATOM.MIN and SUATOM.MAX as
these require a distinction between U32 and S32. These have to be
implemented with imageCompSwap loop.
 2019-09-21 17:33:52 -03:00
ReinUsesLisp 675f23aedc
shader/image: Implement SULD and remove irrelevant code 
* Implement SULD as float.
* Remove conditional declaration of GL_ARB_shader_viewport_layer_array.
 2019-09-21 17:32:48 -03:00
ReinUsesLisp 4de0f1e1c8
shader_bytecode: Add SULD encoding 2019-09-21 17:31:46 -03:00
Fernando Sahmkow 527b841c15 Shader_IR: ICMP corrections and fixes 2019-09-21 14:28:03 -04:00
David Marcec 01a4afee42 Mark DrawArrays as LOG_TRACE 
There's no reason to clog logs with DrawArray.
 2019-09-21 15:43:58 +10:00
Fernando Sahmkow 4b81d19a1a Shader_IR: Implement ICMP. 2019-09-19 20:56:29 -04:00
Fernando Sahmkow 7761e44d18 Rasterizer: Refactor and simplify DrawBatch Interface. 2019-09-19 11:41:33 -04:00
Fernando Sahmkow 7606da5611 VideoCore: Corrections to the MME Inliner and removal of hacky instance management. 2019-09-19 11:41:29 -04:00
Fernando Sahmkow ba02d564f8 Video Core: initial Implementation of InstanceDraw Packaging 2019-09-19 11:41:27 -04:00
ReinUsesLisp 0526bf1895 shader_ir/warp: Implement SHFL 2019-09-17 17:44:07 -03:00
Fernando Sahmkow 393cc3ef2f
Merge pull request #2851 from ReinUsesLisp/srgb 
renderer_opengl: Fix sRGB blits
 2019-09-15 10:38:10 -04:00
Fernando Sahmkow b8b1747704
Merge pull request #2824 from ReinUsesLisp/mme 
Revert "Revert #2466" and stub FirmwareCall 4
 2019-09-15 06:17:04 -04:00
Rodrigo Locatti 193bfefce4
maxwell_3d: Update firmware 4 call stub commentary 2019-09-14 22:51:18 -03:00
ReinUsesLisp 36abf67e79 shader/image: Implement SUATOM and fix SUST 2019-09-10 20:22:31 -03:00
ReinUsesLisp 78574746bd renderer_opengl: Fix sRGB blits 
Removes the sRGB hack of tracking if a frame used an sRGB rendertarget
to apply at least once to blit the final texture as sRGB. Instead of
doing this apply sRGB if the presented image has sRGB.

Also enable sRGB by default on Maxwell3D registers as some games seem to
assume this.
 2019-09-10 19:31:42 -03:00
bunnei 34b2c60f95
Merge pull request #2823 from ReinUsesLisp/shr-clamp 
shader/shift: Implement SHR wrapped and clamped variants
 2019-09-10 11:56:17 -04:00
bunnei c7ec7bc1f5
Merge pull request #2810 from ReinUsesLisp/mme-opt 
maxwell_3d: Avoid moving macro_params
 2019-09-10 11:55:45 -04:00
ReinUsesLisp 6170337001 gl_rasterizer: Implement image bindings 2019-09-05 20:35:51 -03:00
ReinUsesLisp 3a450c1395 kepler_compute: Implement texture queries 2019-09-05 20:35:51 -03:00
ReinUsesLisp 5f309b88db Revert "Revert #2466" and stub FirmwareCall 4 2019-09-04 01:55:45 -03:00
ReinUsesLisp 77ef4fa907 shader/shift: Implement SHR wrapped and clamped variants 
Nvidia defaults to wrapped shifts, but this is undefined behaviour on
OpenGL's spec. Explicitly mask/clamp according to what the guest shader
requires.
 2019-09-04 01:55:24 -03:00
ReinUsesLisp 701dedcfad maxwell_3d: Avoid moving macro_params 2019-09-04 01:55:01 -03:00
bunnei 81fbc5370d
Merge pull request #2812 from ReinUsesLisp/f2i-selector 
shader_ir/conversion: Implement F2I and F2F F16 selector
 2019-09-03 22:35:33 -04:00
bunnei d4f33b822b
Merge pull request #2811 from ReinUsesLisp/fsetp-fix 
float_set_predicate: Add missing negation bit for the second operand
 2019-09-03 22:34:34 -04:00
bunnei 137d165672
Merge pull request #2826 from ReinUsesLisp/macro-binding 
maxwell_3d: Fix macro binding cursor
 2019-09-03 22:32:42 -04:00
bunnei 50b5bb44a0
Merge pull request #2765 from FernandoS27/dma-fix 
MaxwellDMA: Fixes, corrections and relaxations.
 2019-09-01 13:13:05 -04:00
ReinUsesLisp 52a41f482f maxwell_3d: Fix macro binding cursor 2019-09-01 05:01:11 -03:00
Rodrigo Locatti 4d4f9cc104 video_core: Silent miscellaneous warnings (#2820) 
* texture_cache/surface_params: Remove unused local variable

* rasterizer_interface: Add missing documentation commentary

* maxwell_dma: Remove unused rasterizer reference

* video_core/gpu: Sort member declaration order to silent -Wreorder warning

* fermi_2d: Remove unused MemoryManager reference

* video_core: Silent unused variable warnings

* buffer_cache: Silent -Wreorder warnings

* kepler_memory: Remove unused MemoryManager reference

* gl_texture_cache: Add missing override

* buffer_cache: Add missing include

* shader/decode: Remove unused variables
 2019-08-30 14:08:00 -04:00
ReinUsesLisp e3534700d7 shader_ir/conversion: Split int and float selector and implement F2F H1 2019-08-28 16:09:33 -03:00
ReinUsesLisp b13fbc25b8 shader_ir/conversion: Implement F2I F16 Ra.H1 2019-08-27 23:40:40 -03:00
ReinUsesLisp 6207751b00 float_set_predicate: Add missing negation bit for the second operand 2019-08-27 21:57:43 -03:00
ReinUsesLisp 4e35177e23 shader_ir: Implement VOTE 
Implement VOTE using Nvidia's intrinsics. Documentation about these can
be found here
https://developer.nvidia.com/reading-between-threads-shader-intrinsics

Instead of using portable ARB instructions I opted to use Nvidia
intrinsics because these are the closest we have to how Tegra X1
hardware renders.

To stub VOTE on non-Nvidia drivers (including nouveau) this commit
simulates a GPU with a warp size of one, returning what is meaningful
for the instruction being emulated:

* anyThreadNV(value) -> value
* allThreadsNV(value) -> value
* allThreadsEqualNV(value) -> true

ballotARB, also known as "uint64_t(activeThreadsNV())", emits

VOTE.ANY Rd, PT, PT;

on nouveau's compiler. This doesn't match exactly to Nvidia's code

VOTE.ALL Rd, PT, PT;

Which is emulated with activeThreadsNV() by this commit. In theory this
shouldn't really matter since .ANY, .ALL and .EQ affect the predicates
(set to PT on those cases) and not the registers.
 2019-08-21 14:50:38 -03:00
bunnei cedc1aab4a
Merge pull request #2753 from FernandoS27/float-convert 
Shader_Ir: Implement F16 Variants of F2F, F2I, I2F.
 2019-08-21 10:27:57 -04:00
ReinUsesLisp 2ff8044806 shader_ir: Implement NOP 2019-08-04 03:02:55 -03:00
bunnei 52f54c728d
Merge pull request #2592 from FernandoS27/sync1 
Implement GPU Synchronization Mechanisms & Correct NVFlinger
 2019-07-26 14:26:44 -04:00
Fernando Sahmkow a452ff983d MaxwellDMA: Fixes, corrections and relaxations. 
This commit fixes offsets on Linear -> Tiled copies, corrects z pos
fortiled->linear copies, corrects bytes_per_pixel calculation in tiled
-> linear copies and relaxes some limitations set by latest dma fixes
refactors.
 2019-07-25 20:41:42 -04:00
bunnei 31e8a61527
Merge pull request #2743 from FernandoS27/surpress-assert 
Downgrade and suppress a series of GPU asserts and debug messages.
 2019-07-25 12:34:36 -04:00
bunnei 9be9600bdc
Merge pull request #2704 from FernandoS27/conditional 
maxwell3d: Implement Conditional Rendering
 2019-07-24 17:07:57 -04:00
bunnei f601f25bcc
Merge pull request #2734 from ReinUsesLisp/compute-shaders 
gl_rasterizer: Implement compute shaders
 2019-07-22 11:12:55 -04:00
bunnei 27e10e0442
Merge pull request #2735 from FernandoS27/pipeline-rework 
Rework Dirty Flags in GPU Pipeline, Optimize CBData and Redo Clearing mechanism
 2019-07-21 00:59:52 -04:00
Fernando Sahmkow 11f4e739bd Shader_Ir: Implement F16 Variants of F2F, F2I, I2F. 
This commit takes care of implementing the F16 Variants of the 
conversion instructions and makes sure conversions are done.
 2019-07-20 17:38:25 -04:00
Fernando Sahmkow 7a35178ee2 Maxwell3D: Reorganize and address feedback 2019-07-20 10:18:35 -04:00
ReinUsesLisp 6c4985edc9 shader/half_set_predicate: Implement missing HSETP2 variants 2019-07-19 22:20:47 -03:00
Fernando Sahmkow 3a3fee5abf MaxwellDMA/KeplerCopy: Downgrade DMA log message to Trace. 
This log was just to know which games used DMA. It's no longer 
important.
 2019-07-18 08:31:38 -04:00
Fernando Sahmkow 4be61013a1 GL_State: Feedback and fixes 2019-07-17 17:29:56 -04:00
Fernando Sahmkow 5ad889f6fd Maxwell3D: Address Feedback 2019-07-17 17:29:55 -04:00
Fernando Sahmkow 8cdbfe69b1 GL_Rasterizer: Corrections to Clearing. 2019-07-17 17:29:54 -04:00
Fernando Sahmkow 0ff4a5fa39 Maxwell3D: Correct marking dirtiness on CB upload 2019-07-17 17:29:53 -04:00
Fernando Sahmkow fec32fed18 GL_Rasterizer: Rework RenderTarget/DepthBuffer clearing 2019-07-17 17:29:52 -04:00
Fernando Sahmkow a081dea8ab Maxwell3D: Implement State Dirty Flags. 2019-07-17 17:29:51 -04:00
Fernando Sahmkow 0d3db58657 Maxwell3D: Rework CBData Upload 2019-07-17 17:29:50 -04:00
Fernando Sahmkow f2e7b29c14 Maxwell3D: Rework the dirty system to be more consistant and scaleable 2019-07-17 17:29:49 -04:00
Fernando Sahmkow e42bcf2314 maxwell3d: Implement Conditional Rendering 
Conditional Rendering takes care of conditionaly clearing or drawing
depending on a set of queries. This PR implements the query checks to
stablish if things can be rendered or not.
 2019-07-17 17:13:19 -04:00
ReinUsesLisp 725ba6cf63 gl_rasterizer: Implement compute shaders 2019-07-15 17:38:25 -03:00
Fernando Sahmkow 1bdb59fc6e
Merge pull request #2695 from ReinUsesLisp/layer-viewport 
gl_shader_decompiler: Implement gl_ViewportIndex and gl_Layer in vertex shaders
 2019-07-15 16:28:07 -04:00
bunnei 3477b92289
Merge pull request #2675 from ReinUsesLisp/opengl-buffer-cache 
buffer_cache: Implement a generic buffer cache and its OpenGL backend
 2019-07-14 19:03:43 -04:00
Fernando Sahmkow 0ec9da2f9f
Merge pull request #2692 from ReinUsesLisp/tlds-f16 
shader/texture: Add F16 support for TLDS
 2019-07-14 08:44:38 -04:00
Fernando Sahmkow 8a6fc529a9 shader_ir: Implement BRX & BRA.CC 2019-07-09 08:14:37 -04:00
ReinUsesLisp c9d886c84e gl_shader_decompiler: Implement gl_ViewportIndex and gl_Layer in vertex shaders 
This commit implements gl_ViewportIndex and gl_Layer in vertex and
geometry shaders. In the case it's used in a vertex shader, it requires
ARB_shader_viewport_layer_array. This extension is available on AMD and
Nvidia devices (mesa and proprietary drivers), but not available on
Intel on any platform. At the moment of writing this description I don't
know if this is a hardware limitation or a driver limitation.

In the case that ARB_shader_viewport_layer_array is not available,
writes to these registers on a vertex shader are ignored, with the
appropriate logging.
 2019-07-07 20:42:55 -03:00
ReinUsesLisp d0966b9f7c shader/texture: Add F16 support for TLDS 2019-07-07 16:05:56 -03:00
ReinUsesLisp 7ecf64257a gl_rasterizer: Minor style changes 2019-07-06 00:37:55 -03:00
Fernando Sahmkow 82b829625b video_core: Implement GPU side Syncpoints 2019-07-05 15:49:11 -04:00
ReinUsesLisp 4d63f97945 shader_bytecode: Include missing <array> 2019-06-24 01:51:02 -03:00
Fernando Sahmkow 082740d34d surface: Correct format S8Z24 2019-06-20 21:38:34 -03:00