Commit graph

347 commits

Author SHA1 Message Date
Lioncash 1622068198 Merge pull request #728 from lioncash/vars
dyncom: Remove an unnecessary variable in the interpreter
2015-05-07 21:09:03 -04:00
Lioncash ae0c38a333 Remove unnecessary dyncom header files 2015-05-07 20:45:28 -04:00
Lioncash 31dc8b8890 dyncom: Remove an unnecessary variable in the interpreter
All this was doing was needlessly aliasing a variable.
2015-05-07 19:34:04 -04:00
Yuri Kunde Schlesner e1fbac3ca1 Common: Remove common.h 2015-05-07 15:45:22 -03:00
Yuri Kunde Schlesner c0eaa662d4 Clean-up includes 2015-05-06 23:45:06 -03:00
Yuri Kunde Schlesner ecff2351a1 HLE: Clean up SVC dispatch mechanism 2015-05-06 00:24:39 -03:00
bunnei bab5abaf46 Dyncom: Move cream cache to ARMul_State. 2015-05-01 18:27:04 -04:00
Lioncash 8b2b620a5e dyncom: Remove more unused/unnecessary code
Gets rid of a sizeable amount of stuff in armdefs.
2015-04-20 16:30:34 -04:00
Lioncash d66a12c6f6 dyncom: Remove unused/unnecessary VFP cruft 2015-04-17 20:46:05 -04:00
Emmanuel Gil Peyrot 2e860bd59c Core_ARM11: Replace debug prints with our own logging functions in vfpsingle. 2015-04-14 21:34:36 +02:00
Emmanuel Gil Peyrot bdcf28e3bc Headers: Add some forgotten overrides, thanks clang! 2015-04-14 21:18:25 +02:00
Lioncash a6c9e453b2 dyncom: Remove unnecessary enum and typedef
Also fixes descriptions in the process.
2015-04-07 08:05:41 -04:00
Lioncash 29a4b6c7ed vfp: Make the FPSID values match the MPCore 2015-04-06 16:09:35 -04:00
Lioncash f9cc6d6484 vfp: Get rid of the VFP_OFFSET macro 2015-04-06 16:09:28 -04:00
bunnei 14dcd98653 Merge pull request #685 from lioncash/cpregs
dyncom: Set the MPCore CP15 register reset values on initialization.
2015-04-06 15:06:07 -04:00
Lioncash 8004d35ea1 core: Migrate 3DS-specific CP15 register setting into Init 2015-04-06 13:01:19 -04:00
Lioncash c3ffe8f9c3 arm_interface: Support retrieval/storage to CP15 registers 2015-04-06 12:57:49 -04:00
Lioncash b7b8b67620 Move CP15 enum definitions into their own enum.
Also gets rid of preprocessor mumbo-jumbo
2015-04-06 12:48:35 -04:00
Lioncash 23dd2ca8a6 dyncom: Properly return the value of the user RO thread register 2015-04-06 09:26:04 -04:00
Lioncash e628ed4810 dyncom: Set CP15 reset values on initialization 2015-04-06 09:16:42 -04:00
Lioncash bb7dac022e dyncom: Suppress uninitialized variable warnings
The switch cases will always be hit, but this makes compilers stop complaining.
2015-04-05 23:49:06 -04:00
Lioncash 490df716f3 dyncom: Move CP15 register writing into its own function.
Also implements writing to the rest of the ARM11 MPCore CP15 register set.
2015-04-02 00:20:52 -04:00
Lioncash 5e5954c63b dyncom: Move CP15 register reading into its own function.
Keeps everything contained. Added all supported readable registers in an ARM11 MPCore.
2015-04-02 00:19:11 -04:00
Lioncash de6eba0288 dyncom: Migrate InAPrivilegedMode to armsupp
It's a generic helper function, so it should be here anyway.
2015-03-26 09:22:02 -04:00
bunnei b3d4a10e29 Merge pull request #674 from lioncash/sys-instrs
dyncom: Implement RFE and SRS.
2015-03-24 23:21:44 -04:00
Lioncash a80d93685a dyncom: Implement SRS 2015-03-24 12:44:31 -04:00
Lioncash cde671795c dyncom: Implement RFE 2015-03-24 11:34:48 -04:00
Lioncash 2df10d2284 dyncom: Remove unused/unnecessary macros and macro constants 2015-03-24 09:55:56 -04:00
Lioncash f23f2a9a42 armmmu: Remove unnecessary enum values
We don't need to care about XScale or Intel specific ARM stuff.
2015-03-20 19:35:32 -04:00
bunnei 1981aa3d7e Merge pull request #659 from lioncash/setend
Implement SETEND.
2015-03-19 21:37:43 -04:00
Lioncash 9fdb311d6e dyncom: Make Load/Store instructions support big endian 2015-03-17 15:13:32 -04:00
Lioncash 8cf81643a9 arm_interface: Get rid of GetTicks.
Removes a TODO.
2015-03-16 12:18:37 -04:00
Lioncash f280806214 dyncom: Implement SETEND 2015-03-14 23:08:36 -04:00
Lioncash e34ba68e1f dyncom: Minor cleanup
Assemblers will exit with an error when trying to assemble instructions with disallowed registers.
2015-03-10 08:13:58 -04:00
Lioncash 386dbab5ea dyncom: Fix an indexing bug in STM
Previously it would write the contents of register 13 for the case where the link register (r14) is supposed to be written.
2015-03-08 22:03:11 -04:00
Lioncash 36dab56c31 dyncom: General cleanup of STM 2015-03-08 22:03:06 -04:00
Lioncash e37425b380 dyncom: Increment addr when accessing LR in LDM 2015-03-08 21:46:57 -04:00
Tony Wasserka 93e32bce72 Merge pull request #538 from yuriks/perf-stat
Add profiling infrastructure and widget
2015-03-07 15:30:40 +01:00
Lioncash 4b89cf9e43 vfp: Get rid of warnings 2015-03-03 19:13:01 -05:00
Yuri Kunde Schlesner cd1fbfcf1b Add profiling infrastructure and widget 2015-03-01 21:47:13 -03:00
bunnei d362eb2669 Merge pull request #620 from lioncash/bkpt
arm_disasm: Show conditional code for BKPT instructions.
2015-02-27 22:53:33 -05:00
Lioncash 9ed3488925 arm_disasm: Show conditional code for BKPT instructions.
Changed cond_to_str to take a uint32, since unsigned numbers are only ever passed to it, and this can be a source of warnings for some compilers (also indexing an array without bounds checking a signed number is kind of iffy).
2015-02-27 21:59:30 -05:00
Lioncash 1a70782cda arm_disasm: Remove unused variable
Also declared an array as static, as it's only used in this translation unit.
2015-02-27 21:31:36 -05:00
Lioncash 8812d2fbdb arm: The CP15 Main ID register is not writeable 2015-02-26 09:28:31 -05:00
Lioncash 1bb400be1b arm: Remove unnecessary booleans
We don't care about any of these.
2015-02-25 10:55:50 -05:00
Kevin Hartman 05c098a9e7 Cleaned up unaligned access. 2015-02-21 17:25:31 -08:00
bunnei 8e731b129d Merge pull request #582 from lioncash/warnings
vfpinstr: Fix trivial signed/unsigned mismatch warnings
2015-02-17 23:57:54 -05:00
bunnei 60f9cd6a4a Merge pull request #579 from lioncash/bkpt
dyncom: Support conditional BKPT instructions
2015-02-17 23:54:01 -05:00
Lioncash 4f910bb1a1 vfpinstr: Fix trivial signed/unsigned mismatch warnings 2015-02-17 18:53:50 -05:00
Lioncash a7120662e6 dyncom: Support conditional BKPT instructions 2015-02-17 01:37:22 -05:00