Add Documentation Headers to all the GPU Engines
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@ -21,6 +21,12 @@ class RasterizerInterface;
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namespace Tegra::Engines {
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namespace Tegra::Engines {
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/**
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* This Engine is known as G80_2D. Documentation can be found in:
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* https://github.com/envytools/envytools/blob/master/rnndb/graph/g80_2d.xml
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* https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/nouveau/nv50/nv50_2d.xml.h
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*/
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#define FERMI2D_REG_INDEX(field_name) \
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#define FERMI2D_REG_INDEX(field_name) \
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(offsetof(Tegra::Engines::Fermi2D::Regs, field_name) / sizeof(u32))
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(offsetof(Tegra::Engines::Fermi2D::Regs, field_name) / sizeof(u32))
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@ -27,6 +27,12 @@ class RasterizerInterface;
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namespace Tegra::Engines {
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namespace Tegra::Engines {
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/**
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* This Engine is known as GK104_Compute. Documentation can be found in:
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* https://github.com/envytools/envytools/blob/master/rnndb/graph/gk104_compute.xml
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* https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/nouveau/nvc0/nve4_compute.xml.h
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*/
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#define KEPLER_COMPUTE_REG_INDEX(field_name) \
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#define KEPLER_COMPUTE_REG_INDEX(field_name) \
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(offsetof(Tegra::Engines::KeplerCompute::Regs, field_name) / sizeof(u32))
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(offsetof(Tegra::Engines::KeplerCompute::Regs, field_name) / sizeof(u32))
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@ -23,6 +23,12 @@ class MemoryManager;
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namespace Tegra::Engines {
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namespace Tegra::Engines {
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/**
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* This Engine is known as P2MF. Documentation can be found in:
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* https://github.com/envytools/envytools/blob/master/rnndb/graph/gk104_p2mf.xml
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* https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/nouveau/nvc0/nve4_p2mf.xml.h
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*/
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#define KEPLERMEMORY_REG_INDEX(field_name) \
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#define KEPLERMEMORY_REG_INDEX(field_name) \
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(offsetof(Tegra::Engines::KeplerMemory::Regs, field_name) / sizeof(u32))
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(offsetof(Tegra::Engines::KeplerMemory::Regs, field_name) / sizeof(u32))
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@ -33,6 +33,12 @@ class RasterizerInterface;
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namespace Tegra::Engines {
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namespace Tegra::Engines {
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/**
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* This Engine is known as GF100_3D. Documentation can be found in:
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* https://github.com/envytools/envytools/blob/master/rnndb/graph/gf100_3d.xml
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* https://cgit.freedesktop.org/mesa/mesa/tree/src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h
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*/
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#define MAXWELL3D_REG_INDEX(field_name) \
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#define MAXWELL3D_REG_INDEX(field_name) \
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(offsetof(Tegra::Engines::Maxwell3D::Regs, field_name) / sizeof(u32))
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(offsetof(Tegra::Engines::Maxwell3D::Regs, field_name) / sizeof(u32))
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@ -25,6 +25,11 @@ class RasterizerInterface;
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namespace Tegra::Engines {
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namespace Tegra::Engines {
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/**
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* This Engine is known as GK104_Copy. Documentation can be found in:
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* https://github.com/envytools/envytools/blob/master/rnndb/fifo/gk104_copy.xml
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*/
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class MaxwellDMA final {
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class MaxwellDMA final {
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public:
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public:
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explicit MaxwellDMA(Core::System& system, VideoCore::RasterizerInterface& rasterizer,
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explicit MaxwellDMA(Core::System& system, VideoCore::RasterizerInterface& rasterizer,
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