shader_decode: implement ATOM operation for S32 and U32
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93cac0d294
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972485ff18
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@ -363,10 +363,13 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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break;
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break;
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}
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}
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case OpCode::Id::ATOM: {
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case OpCode::Id::ATOM: {
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UNIMPLEMENTED_IF_MSG(instr.atom.operation != GlobalAtomicOp::Add, "operation={}",
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UNIMPLEMENTED_IF_MSG(instr.atom.operation == GlobalAtomicOp::Inc ||
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static_cast<int>(instr.atom.operation.Value()));
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instr.atom.operation == GlobalAtomicOp::Dec ||
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UNIMPLEMENTED_IF_MSG(instr.atom.type != GlobalAtomicType::S32, "type={}",
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instr.atom.operation == GlobalAtomicOp::SafeAdd,
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static_cast<int>(instr.atom.type.Value()));
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"operation={}", static_cast<int>(instr.atom.operation.Value()));
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UNIMPLEMENTED_IF_MSG(instr.atom.type == GlobalAtomicType::S64 ||
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instr.atom.type == GlobalAtomicType::U64,
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"type={}", static_cast<int>(instr.atom.type.Value()));
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const auto [real_address, base_address, descriptor] =
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const auto [real_address, base_address, descriptor] =
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TrackGlobalMemory(bb, instr, true, true);
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TrackGlobalMemory(bb, instr, true, true);
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@ -375,9 +378,39 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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break;
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break;
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}
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}
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const bool is_signed =
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instr.atoms.type == AtomicType::S32 || instr.atoms.type == AtomicType::S64;
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Node gmem = MakeNode<GmemNode>(real_address, base_address, descriptor);
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Node gmem = MakeNode<GmemNode>(real_address, base_address, descriptor);
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Node value =
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Node data = GetRegister(instr.gpr20);
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Operation(OperationCode::AtomicIAdd, std::move(gmem), GetRegister(instr.gpr20));
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Node value = [&]() {
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switch (instr.atoms.operation) {
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case AtomicOp::Add:
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return SignedOperation(OperationCode::AtomicIAdd, is_signed, std::move(gmem),
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std::move(data));
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case AtomicOp::Min:
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return SignedOperation(OperationCode::AtomicIMin, is_signed, std::move(gmem),
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std::move(data));
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case AtomicOp::Max:
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return SignedOperation(OperationCode::AtomicIMax, is_signed, std::move(gmem),
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std::move(data));
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case AtomicOp::And:
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return SignedOperation(OperationCode::AtomicIAnd, is_signed, std::move(gmem),
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std::move(data));
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case AtomicOp::Or:
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return SignedOperation(OperationCode::AtomicIOr, is_signed, std::move(gmem),
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std::move(data));
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case AtomicOp::Xor:
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return SignedOperation(OperationCode::AtomicIXor, is_signed, std::move(gmem),
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std::move(data));
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case AtomicOp::Exch:
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return SignedOperation(OperationCode::AtomicIExchange, is_signed, std::move(gmem),
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std::move(data));
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default:
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UNREACHABLE();
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return Immediate(0);
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}
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}();
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SetRegister(bb, instr.gpr0, std::move(value));
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SetRegister(bb, instr.gpr0, std::move(value));
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break;
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break;
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}
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}
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