GPU: Store shader constbuffer bindings in the GPU state.
This commit is contained in:
parent
66dae22790
commit
88698c156f
|
@ -43,6 +43,26 @@ void Maxwell3D::WriteReg(u32 method, u32 value) {
|
|||
ASSERT_MSG(regs.code_address.CodeAddress() == 0, "Unexpected CODE_ADDRESS register value.");
|
||||
break;
|
||||
}
|
||||
case MAXWELL3D_REG_INDEX(cb_bind[0].raw_config): {
|
||||
ProcessCBBind(Regs::ShaderType::Vertex);
|
||||
break;
|
||||
}
|
||||
case MAXWELL3D_REG_INDEX(cb_bind[1].raw_config): {
|
||||
ProcessCBBind(Regs::ShaderType::TesselationControl);
|
||||
break;
|
||||
}
|
||||
case MAXWELL3D_REG_INDEX(cb_bind[2].raw_config): {
|
||||
ProcessCBBind(Regs::ShaderType::TesselationEval);
|
||||
break;
|
||||
}
|
||||
case MAXWELL3D_REG_INDEX(cb_bind[3].raw_config): {
|
||||
ProcessCBBind(Regs::ShaderType::Geometry);
|
||||
break;
|
||||
}
|
||||
case MAXWELL3D_REG_INDEX(cb_bind[4].raw_config): {
|
||||
ProcessCBBind(Regs::ShaderType::Fragment);
|
||||
break;
|
||||
}
|
||||
case MAXWELL3D_REG_INDEX(draw.vertex_end_gl): {
|
||||
DrawArrays();
|
||||
break;
|
||||
|
@ -95,11 +115,10 @@ void Maxwell3D::SetShader(const std::vector<u32>& parameters) {
|
|||
auto shader_type = static_cast<Regs::ShaderType>(parameters[3]);
|
||||
GPUVAddr cb_address = parameters[4] << 8;
|
||||
|
||||
auto& shader = state.shaders[static_cast<size_t>(shader_program)];
|
||||
auto& shader = state.shader_programs[static_cast<size_t>(shader_program)];
|
||||
shader.program = shader_program;
|
||||
shader.type = shader_type;
|
||||
shader.address = address;
|
||||
shader.cb_address = cb_address;
|
||||
|
||||
// Perform the same operations as the real macro code.
|
||||
// TODO(Subv): Early exit if register 0xD1C + shader_program contains the same as params[1].
|
||||
|
@ -118,6 +137,21 @@ void Maxwell3D::SetShader(const std::vector<u32>& parameters) {
|
|||
// shader. It's likely that these are the constants for the shader.
|
||||
regs.cb_bind[static_cast<size_t>(shader_type)].valid.Assign(1);
|
||||
regs.cb_bind[static_cast<size_t>(shader_type)].index.Assign(1);
|
||||
|
||||
ProcessCBBind(shader_type);
|
||||
}
|
||||
|
||||
void Maxwell3D::ProcessCBBind(Regs::ShaderType stage) {
|
||||
// Bind the buffer currently in CB_ADDRESS to the specified index in the desired shader stage.
|
||||
auto& shader = state.shader_stages[static_cast<size_t>(stage)];
|
||||
auto& bind_data = regs.cb_bind[static_cast<size_t>(stage)];
|
||||
|
||||
auto& buffer = shader.const_buffers[bind_data.index];
|
||||
|
||||
buffer.enabled = bind_data.valid.Value() != 0;
|
||||
buffer.index = bind_data.index;
|
||||
buffer.address = regs.const_buffer.BufferAddress();
|
||||
buffer.size = regs.const_buffer.cb_size;
|
||||
}
|
||||
|
||||
} // namespace Engines
|
||||
|
|
|
@ -39,6 +39,8 @@ public:
|
|||
static constexpr size_t NumVertexArrays = 32;
|
||||
static constexpr size_t MaxShaderProgram = 6;
|
||||
static constexpr size_t MaxShaderType = 5;
|
||||
// Maximum number of const buffers per shader stage.
|
||||
static constexpr size_t MaxConstBuffers = 16;
|
||||
|
||||
enum class QueryMode : u32 {
|
||||
Write = 0,
|
||||
|
@ -146,12 +148,18 @@ public:
|
|||
u32 cb_address_low;
|
||||
u32 cb_pos;
|
||||
u32 cb_data[NumCBData];
|
||||
|
||||
GPUVAddr BufferAddress() const {
|
||||
return static_cast<GPUVAddr>(
|
||||
(static_cast<GPUVAddr>(cb_address_high) << 32) | cb_address_low);
|
||||
}
|
||||
} const_buffer;
|
||||
|
||||
INSERT_PADDING_WORDS(0x10);
|
||||
|
||||
struct {
|
||||
union {
|
||||
u32 raw_config;
|
||||
BitField<0, 1, u32> valid;
|
||||
BitField<4, 5, u32> index;
|
||||
};
|
||||
|
@ -167,14 +175,25 @@ public:
|
|||
static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32), "Maxwell3D Regs has wrong size");
|
||||
|
||||
struct State {
|
||||
struct ShaderInfo {
|
||||
struct ConstBufferInfo {
|
||||
GPUVAddr address;
|
||||
u32 index;
|
||||
u32 size;
|
||||
bool enabled;
|
||||
};
|
||||
|
||||
struct ShaderProgramInfo {
|
||||
Regs::ShaderType type;
|
||||
Regs::ShaderProgram program;
|
||||
GPUVAddr address;
|
||||
GPUVAddr cb_address;
|
||||
};
|
||||
|
||||
std::array<ShaderInfo, Regs::MaxShaderProgram> shaders;
|
||||
struct ShaderStageInfo {
|
||||
std::array<ConstBufferInfo, Regs::MaxConstBuffers> const_buffers;
|
||||
};
|
||||
|
||||
std::array<ShaderStageInfo, Regs::MaxShaderType> shader_stages;
|
||||
std::array<ShaderProgramInfo, Regs::MaxShaderProgram> shader_programs;
|
||||
};
|
||||
|
||||
State state{};
|
||||
|
@ -185,6 +204,9 @@ private:
|
|||
/// Handles a write to the QUERY_GET register.
|
||||
void ProcessQueryGet();
|
||||
|
||||
/// Handles a write to the CB_BIND register.
|
||||
void ProcessCBBind(Regs::ShaderType stage);
|
||||
|
||||
/// Handles a write to the VERTEX_END_GL register, triggering a draw.
|
||||
void DrawArrays();
|
||||
|
||||
|
|
Loading…
Reference in a new issue