shader: Refactor atomic_operations_global_memory
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427951d6fe
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7a9dc78398
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@ -154,69 +154,61 @@ void StoreResult(TranslatorVisitor& v, IR::Reg dest_reg, const IR::Value& result
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break;
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}
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}
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IR::Value ApplyAtomOp(TranslatorVisitor& v, IR::Reg operand_reg, const IR::U64& offset,
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AtomSize size, AtomOp op) {
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switch (size) {
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case AtomSize::U32:
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case AtomSize::S32:
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return ApplyIntegerAtomOp(v.ir, offset, v.X(operand_reg), op, size == AtomSize::S32);
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case AtomSize::U64:
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case AtomSize::S64:
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return ApplyIntegerAtomOp(v.ir, offset, v.L(operand_reg), op, size == AtomSize::S64);
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case AtomSize::F32:
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return ApplyFpAtomOp(v.ir, offset, v.F(operand_reg), op, size);
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case AtomSize::F16x2: {
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return ApplyFpAtomOp(v.ir, offset, v.ir.UnpackFloat2x16(v.X(operand_reg)), op, size);
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}
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default:
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throw NotImplementedException("Atom Size {}", size);
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}
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}
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void GlobalAtomic(TranslatorVisitor& v, IR::Reg dest_reg, IR::Reg operand_reg,
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const IR::U64& offset, AtomSize size, AtomOp op, bool write_dest) {
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IR::Value result;
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if (AtomOpNotApplicable(size, op)) {
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result = LoadGlobal(v.ir, offset, size);
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} else {
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result = ApplyAtomOp(v, operand_reg, offset, size, op);
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}
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if (write_dest) {
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StoreResult(v, dest_reg, result, size);
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}
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}
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} // Anonymous namespace
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void TranslatorVisitor::ATOM(u64 insn) {
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union {
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u64 raw;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<8, 8, IR::Reg> addr_reg;
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BitField<20, 8, IR::Reg> src_reg_b;
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BitField<20, 8, IR::Reg> operand_reg;
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BitField<49, 3, AtomSize> size;
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BitField<52, 4, AtomOp> op;
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} const atom{insn};
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const bool size_64{atom.size == AtomSize::U64 || atom.size == AtomSize::S64};
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const bool is_signed{atom.size == AtomSize::S32 || atom.size == AtomSize::S64};
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const bool is_integer{atom.size != AtomSize::F32 && atom.size != AtomSize::F16x2};
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const IR::U64 offset{AtomOffset(*this, insn)};
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IR::Value result;
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if (AtomOpNotApplicable(atom.size, atom.op)) {
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result = LoadGlobal(ir, offset, atom.size);
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} else if (!is_integer) {
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if (atom.size == AtomSize::F32) {
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result = ApplyFpAtomOp(ir, offset, F(atom.src_reg_b), atom.op, atom.size);
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} else {
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const IR::Value src_b{ir.UnpackFloat2x16(X(atom.src_reg_b))};
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result = ApplyFpAtomOp(ir, offset, src_b, atom.op, atom.size);
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}
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} else if (size_64) {
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result = ApplyIntegerAtomOp(ir, offset, L(atom.src_reg_b), atom.op, is_signed);
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} else {
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result = ApplyIntegerAtomOp(ir, offset, X(atom.src_reg_b), atom.op, is_signed);
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}
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StoreResult(*this, atom.dest_reg, result, atom.size);
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GlobalAtomic(*this, atom.dest_reg, atom.operand_reg, offset, atom.size, atom.op, true);
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}
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void TranslatorVisitor::RED(u64 insn) {
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union {
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u64 raw;
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BitField<0, 8, IR::Reg> src_reg_b;
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BitField<8, 8, IR::Reg> addr_reg;
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BitField<0, 8, IR::Reg> operand_reg;
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BitField<20, 3, AtomSize> size;
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BitField<23, 3, AtomOp> op;
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} const red{insn};
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if (AtomOpNotApplicable(red.size, red.op)) {
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return;
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}
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const bool size_64{red.size == AtomSize::U64 || red.size == AtomSize::S64};
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const bool is_signed{red.size == AtomSize::S32 || red.size == AtomSize::S64};
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const bool is_integer{red.size != AtomSize::F32 && red.size != AtomSize::F16x2};
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const IR::U64 offset{AtomOffset(*this, insn)};
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if (!is_integer) {
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if (red.size == AtomSize::F32) {
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ApplyFpAtomOp(ir, offset, F(red.src_reg_b), red.op, red.size);
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} else {
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const IR::Value src_b{ir.UnpackFloat2x16(X(red.src_reg_b))};
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ApplyFpAtomOp(ir, offset, src_b, red.op, red.size);
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}
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} else if (size_64) {
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ApplyIntegerAtomOp(ir, offset, L(red.src_reg_b), red.op, is_signed);
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} else {
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ApplyIntegerAtomOp(ir, offset, X(red.src_reg_b), red.op, is_signed);
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}
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GlobalAtomic(*this, IR::Reg::RZ, red.operand_reg, offset, red.size, red.op, true);
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}
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} // namespace Shader::Maxwell
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