glasm: Initial GLASM fp64 support
This commit is contained in:
parent
9f851e3832
commit
4502595bc2
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@ -29,6 +29,13 @@ public:
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code += '\n';
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code += '\n';
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}
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}
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template <typename... Args>
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void LongAdd(const char* format_str, IR::Inst& inst, Args&&... args) {
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code += fmt::format(format_str, reg_alloc.LongDefine(inst), std::forward<Args>(args)...);
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// TODO: Remove this
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code += '\n';
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}
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template <typename... Args>
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template <typename... Args>
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void Add(const char* format_str, Args&&... args) {
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void Add(const char* format_str, Args&&... args) {
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code += fmt::format(format_str, std::forward<Args>(args)...);
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code += fmt::format(format_str, std::forward<Args>(args)...);
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@ -42,7 +42,11 @@ template <bool scalar>
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struct RegWrapper {
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struct RegWrapper {
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RegWrapper(EmitContext& ctx, Value value)
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RegWrapper(EmitContext& ctx, Value value)
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: reg_alloc{ctx.reg_alloc}, allocated{value.type != Type::Register} {
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: reg_alloc{ctx.reg_alloc}, allocated{value.type != Type::Register} {
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reg = allocated ? reg_alloc.AllocReg() : Register{value};
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if (allocated) {
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reg = value.type == Type::F64 ? reg_alloc.AllocLongReg() : reg_alloc.AllocReg();
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} else {
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reg = Register{value};
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}
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switch (value.type) {
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switch (value.type) {
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case Type::Register:
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case Type::Register:
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break;
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break;
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@ -55,6 +59,9 @@ struct RegWrapper {
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case Type::F32:
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case Type::F32:
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ctx.Add("MOV.F {}.x,{};", reg, value.imm_f32);
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ctx.Add("MOV.F {}.x,{};", reg, value.imm_f32);
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break;
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break;
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case Type::F64:
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ctx.Add("MOV.F64 {}.x,{};", reg, value.imm_f64);
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break;
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}
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}
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}
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}
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~RegWrapper() {
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~RegWrapper() {
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@ -162,10 +169,12 @@ std::string EmitGLASM(const Profile&, IR::Program& program, Bindings&) {
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for (size_t index = 0; index < ctx.reg_alloc.NumUsedRegisters(); ++index) {
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for (size_t index = 0; index < ctx.reg_alloc.NumUsedRegisters(); ++index) {
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header += fmt::format("R{},", index);
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header += fmt::format("R{},", index);
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}
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}
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header += "RC;";
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header += "RC;"
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if (!program.info.storage_buffers_descriptors.empty()) {
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"LONG TEMP ";
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header += "LONG TEMP LC;";
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for (size_t index = 0; index < ctx.reg_alloc.NumUsedLongRegisters(); ++index) {
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header += fmt::format("D{},", index);
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}
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}
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header += "DC;";
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ctx.code.insert(0, header);
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ctx.code.insert(0, header);
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ctx.code += "END";
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ctx.code += "END";
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return ctx.code;
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return ctx.code;
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@ -72,4 +72,12 @@ void EmitUnpackHalf2x16(EmitContext& ctx, IR::Inst& inst, Register value) {
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ctx.Add("UP2H {}.xy,{}.x;", inst, value);
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ctx.Add("UP2H {}.xy,{}.x;", inst, value);
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}
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}
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void EmitPackDouble2x32(EmitContext& ctx, IR::Inst& inst, Register value) {
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ctx.LongAdd("PK64 {}.x,{};", inst, value);
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}
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void EmitUnpackDouble2x32(EmitContext& ctx, IR::Inst& inst, Register value) {
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ctx.Add("UP64 {}.xy,{}.x;", inst, value);
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}
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} // namespace Shader::Backend::GLASM
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} // namespace Shader::Backend::GLASM
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@ -10,7 +10,8 @@
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namespace Shader::Backend::GLASM {
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namespace Shader::Backend::GLASM {
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void EmitFPAbs16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
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void EmitFPAbs16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
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[[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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throw NotImplementedException("GLASM instruction");
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}
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}
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@ -18,8 +19,8 @@ void EmitFPAbs32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
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ctx.Add("MOV.F {}.x,|{}|;", inst, value);
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ctx.Add("MOV.F {}.x,|{}|;", inst, value);
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}
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}
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void EmitFPAbs64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
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void EmitFPAbs64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value) {
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throw NotImplementedException("GLASM instruction");
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ctx.LongAdd("MOV.F64 {}.x,|{}|;", inst, value);
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}
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}
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void EmitFPAdd16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
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void EmitFPAdd16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
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@ -31,9 +32,8 @@ void EmitFPAdd32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b) {
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ctx.Add("ADD.F {}.x,{},{};", inst, a, b);
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ctx.Add("ADD.F {}.x,{},{};", inst, a, b);
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}
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}
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void EmitFPAdd64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
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void EmitFPAdd64(EmitContext& ctx, IR::Inst& inst, ScalarF64 a, ScalarF64 b) {
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[[maybe_unused]] Register a, [[maybe_unused]] Register b) {
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ctx.LongAdd("ADD.F64 {}.x,{},{};", inst, a, b);
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throw NotImplementedException("GLASM instruction");
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}
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}
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void EmitFPFma16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
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void EmitFPFma16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
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@ -94,8 +94,8 @@ void EmitFPNeg32(EmitContext& ctx, IR::Inst& inst, ScalarRegister value) {
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ctx.Add("MOV.F {}.x,-{};", inst, value);
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ctx.Add("MOV.F {}.x,-{};", inst, value);
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}
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}
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void EmitFPNeg64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
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void EmitFPNeg64(EmitContext& ctx, IR::Inst& inst, Register value) {
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throw NotImplementedException("GLASM instruction");
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ctx.LongAdd("MOV.F64 {}.x,-{};", inst, value);
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}
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}
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void EmitFPSin([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] ScalarF32 value) {
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void EmitFPSin([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] ScalarF32 value) {
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@ -202,20 +202,20 @@ void EmitPackFloat2x16(EmitContext& ctx, Register value);
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void EmitUnpackFloat2x16(EmitContext& ctx, Register value);
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void EmitUnpackFloat2x16(EmitContext& ctx, Register value);
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void EmitPackHalf2x16(EmitContext& ctx, IR::Inst& inst, Register value);
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void EmitPackHalf2x16(EmitContext& ctx, IR::Inst& inst, Register value);
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void EmitUnpackHalf2x16(EmitContext& ctx, IR::Inst& inst, Register value);
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void EmitUnpackHalf2x16(EmitContext& ctx, IR::Inst& inst, Register value);
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void EmitPackDouble2x32(EmitContext& ctx, Register value);
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void EmitPackDouble2x32(EmitContext& ctx, IR::Inst& inst, Register value);
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void EmitUnpackDouble2x32(EmitContext& ctx, Register value);
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void EmitUnpackDouble2x32(EmitContext& ctx, IR::Inst& inst, Register value);
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void EmitGetZeroFromOp(EmitContext& ctx);
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void EmitGetZeroFromOp(EmitContext& ctx);
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void EmitGetSignFromOp(EmitContext& ctx);
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void EmitGetSignFromOp(EmitContext& ctx);
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void EmitGetCarryFromOp(EmitContext& ctx);
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void EmitGetCarryFromOp(EmitContext& ctx);
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void EmitGetOverflowFromOp(EmitContext& ctx);
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void EmitGetOverflowFromOp(EmitContext& ctx);
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void EmitGetSparseFromOp(EmitContext& ctx);
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void EmitGetSparseFromOp(EmitContext& ctx);
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void EmitGetInBoundsFromOp(EmitContext& ctx);
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void EmitGetInBoundsFromOp(EmitContext& ctx);
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void EmitFPAbs16(EmitContext& ctx, Register value);
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void EmitFPAbs16(EmitContext& ctx, IR::Inst& inst, Register value);
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void EmitFPAbs32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value);
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void EmitFPAbs32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value);
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void EmitFPAbs64(EmitContext& ctx, Register value);
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void EmitFPAbs64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value);
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void EmitFPAdd16(EmitContext& ctx, IR::Inst& inst, Register a, Register b);
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void EmitFPAdd16(EmitContext& ctx, IR::Inst& inst, Register a, Register b);
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void EmitFPAdd32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b);
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void EmitFPAdd32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b);
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void EmitFPAdd64(EmitContext& ctx, IR::Inst& inst, Register a, Register b);
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void EmitFPAdd64(EmitContext& ctx, IR::Inst& inst, ScalarF64 a, ScalarF64 b);
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void EmitFPFma16(EmitContext& ctx, IR::Inst& inst, Register a, Register b, Register c);
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void EmitFPFma16(EmitContext& ctx, IR::Inst& inst, Register a, Register b, Register c);
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void EmitFPFma32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b, ScalarF32 c);
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void EmitFPFma32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b, ScalarF32 c);
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void EmitFPFma64(EmitContext& ctx, IR::Inst& inst, Register a, Register b, Register c);
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void EmitFPFma64(EmitContext& ctx, IR::Inst& inst, Register a, Register b, Register c);
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@ -228,7 +228,7 @@ void EmitFPMul32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b);
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void EmitFPMul64(EmitContext& ctx, IR::Inst& inst, Register a, Register b);
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void EmitFPMul64(EmitContext& ctx, IR::Inst& inst, Register a, Register b);
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void EmitFPNeg16(EmitContext& ctx, Register value);
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void EmitFPNeg16(EmitContext& ctx, Register value);
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void EmitFPNeg32(EmitContext& ctx, IR::Inst& inst, ScalarRegister value);
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void EmitFPNeg32(EmitContext& ctx, IR::Inst& inst, ScalarRegister value);
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void EmitFPNeg64(EmitContext& ctx, Register value);
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void EmitFPNeg64(EmitContext& ctx, IR::Inst& inst, Register value);
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void EmitFPSin(EmitContext& ctx, ScalarF32 value);
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void EmitFPSin(EmitContext& ctx, ScalarF32 value);
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void EmitFPCos(EmitContext& ctx, ScalarF32 value);
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void EmitFPCos(EmitContext& ctx, ScalarF32 value);
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void EmitFPExp2(EmitContext& ctx, ScalarF32 value);
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void EmitFPExp2(EmitContext& ctx, ScalarF32 value);
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@ -17,9 +17,9 @@ void StorageOp(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset,
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// address = c[binding].xy
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// address = c[binding].xy
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// length = c[binding].z
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// length = c[binding].z
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const u32 sb_binding{binding.U32()};
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const u32 sb_binding{binding.U32()};
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ctx.Add("PK64.U LC,c[{}];" // pointer = address
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ctx.Add("PK64.U DC,c[{}];" // pointer = address
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"CVT.U64.U32 LC.z,{};" // offset = uint64_t(offset)
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"CVT.U64.U32 DC.z,{};" // offset = uint64_t(offset)
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"ADD.U64 LC.x,LC.x,LC.z;" // pointer += offset
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"ADD.U64 DC.x,DC.x,DC.z;" // pointer += offset
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"SLT.U.CC RC.x,{},c[{}].z;", // cc = offset < length
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"SLT.U.CC RC.x,{},c[{}].z;", // cc = offset < length
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sb_binding, offset, offset, sb_binding);
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sb_binding, offset, offset, sb_binding);
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if (else_expr.empty()) {
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if (else_expr.empty()) {
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@ -32,13 +32,13 @@ void StorageOp(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset,
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template <typename ValueType>
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template <typename ValueType>
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void Store(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset, ValueType value,
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void Store(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset, ValueType value,
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std::string_view size) {
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std::string_view size) {
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StorageOp(ctx, binding, offset, fmt::format("STORE.{} {},LC.x;", size, value));
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StorageOp(ctx, binding, offset, fmt::format("STORE.{} {},DC.x;", size, value));
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}
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}
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void Load(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset,
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void Load(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset,
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std::string_view size) {
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std::string_view size) {
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const Register ret{ctx.reg_alloc.Define(inst)};
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const Register ret{ctx.reg_alloc.Define(inst)};
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StorageOp(ctx, binding, offset, fmt::format("STORE.{} {},LC.x;", size, ret),
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StorageOp(ctx, binding, offset, fmt::format("STORE.{} {},DC.x;", size, ret),
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fmt::format("MOV.U {},{{0,0,0,0}};", ret));
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fmt::format("MOV.U {},{{0,0,0,0}};", ret));
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}
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}
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} // Anonymous namespace
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} // Anonymous namespace
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@ -281,14 +281,6 @@ void EmitSelectF64(EmitContext& ctx, ScalarS32 cond, Register true_value, Regist
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NotImplemented();
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NotImplemented();
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}
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}
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void EmitPackDouble2x32(EmitContext& ctx, Register value) {
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NotImplemented();
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}
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void EmitUnpackDouble2x32(EmitContext& ctx, Register value) {
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NotImplemented();
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}
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void EmitGetZeroFromOp(EmitContext& ctx) {
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void EmitGetZeroFromOp(EmitContext& ctx) {
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NotImplemented();
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NotImplemented();
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}
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}
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@ -14,12 +14,11 @@
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namespace Shader::Backend::GLASM {
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namespace Shader::Backend::GLASM {
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Register RegAlloc::Define(IR::Inst& inst) {
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Register RegAlloc::Define(IR::Inst& inst) {
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const Id id{Alloc()};
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return Define(inst, false);
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inst.SetDefinition<Id>(id);
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}
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Register ret;
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ret.type = Type::Register;
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Register RegAlloc::LongDefine(IR::Inst& inst) {
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ret.id = id;
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return Define(inst, true);
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return ret;
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}
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}
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Value RegAlloc::Consume(const IR::Value& value) {
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Value RegAlloc::Consume(const IR::Value& value) {
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@ -40,6 +39,10 @@ Value RegAlloc::Consume(const IR::Value& value) {
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ret.type = Type::F32;
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ret.type = Type::F32;
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ret.imm_f32 = value.F32();
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ret.imm_f32 = value.F32();
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break;
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break;
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case IR::Type::F64:
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ret.type = Type::F64;
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ret.imm_f64 = value.F64();
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break;
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default:
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default:
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throw NotImplementedException("Immediate type {}", value.Type());
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throw NotImplementedException("Immediate type {}", value.Type());
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}
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}
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@ -49,7 +52,14 @@ Value RegAlloc::Consume(const IR::Value& value) {
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Register RegAlloc::AllocReg() {
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Register RegAlloc::AllocReg() {
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Register ret;
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Register ret;
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ret.type = Type::Register;
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ret.type = Type::Register;
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ret.id = Alloc();
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ret.id = Alloc(false);
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return ret;
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}
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Register RegAlloc::AllocLongReg() {
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Register ret;
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ret.type = Type::Register;
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ret.id = Alloc(true);
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return ret;
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return ret;
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}
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}
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@ -57,6 +67,15 @@ void RegAlloc::FreeReg(Register reg) {
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Free(reg.id);
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Free(reg.id);
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}
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}
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Register RegAlloc::Define(IR::Inst& inst, bool is_long) {
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const Id id{Alloc(is_long)};
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inst.SetDefinition<Id>(id);
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Register ret;
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ret.type = Type::Register;
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ret.id = id;
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return ret;
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}
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Value RegAlloc::Consume(IR::Inst& inst) {
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Value RegAlloc::Consume(IR::Inst& inst) {
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const Id id{inst.Definition<Id>()};
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const Id id{inst.Definition<Id>()};
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inst.DestructiveRemoveUsage();
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inst.DestructiveRemoveUsage();
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@ -69,19 +88,24 @@ Value RegAlloc::Consume(IR::Inst& inst) {
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return ret;
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return ret;
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}
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}
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Id RegAlloc::Alloc() {
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Id RegAlloc::Alloc(bool is_long) {
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size_t& num_regs{is_long ? num_used_long_registers : num_used_registers};
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std::bitset<NUM_REGS>& use{is_long ? long_register_use : register_use};
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if (num_used_registers + num_used_long_registers < NUM_REGS) {
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for (size_t reg = 0; reg < NUM_REGS; ++reg) {
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for (size_t reg = 0; reg < NUM_REGS; ++reg) {
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if (register_use[reg]) {
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if (use[reg]) {
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continue;
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continue;
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}
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}
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num_used_registers = std::max(num_used_registers, reg + 1);
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num_regs = std::max(num_regs, reg + 1);
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register_use[reg] = true;
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use[reg] = true;
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Id ret{};
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Id ret{};
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ret.index.Assign(static_cast<u32>(reg));
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ret.index.Assign(static_cast<u32>(reg));
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ret.is_long.Assign(is_long ? 1 : 0);
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ret.is_spill.Assign(0);
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ret.is_spill.Assign(0);
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ret.is_condition_code.Assign(0);
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ret.is_condition_code.Assign(0);
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||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
}
|
||||||
throw NotImplementedException("Register spilling");
|
throw NotImplementedException("Register spilling");
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -89,7 +113,11 @@ void RegAlloc::Free(Id id) {
|
||||||
if (id.is_spill != 0) {
|
if (id.is_spill != 0) {
|
||||||
throw NotImplementedException("Free spill");
|
throw NotImplementedException("Free spill");
|
||||||
}
|
}
|
||||||
|
if (id.is_long != 0) {
|
||||||
|
long_register_use[id.index] = false;
|
||||||
|
} else {
|
||||||
register_use[id.index] = false;
|
register_use[id.index] = false;
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
} // namespace Shader::Backend::GLASM
|
} // namespace Shader::Backend::GLASM
|
||||||
|
|
|
@ -27,12 +27,14 @@ enum class Type : u32 {
|
||||||
U32,
|
U32,
|
||||||
S32,
|
S32,
|
||||||
F32,
|
F32,
|
||||||
|
F64,
|
||||||
};
|
};
|
||||||
|
|
||||||
struct Id {
|
struct Id {
|
||||||
union {
|
union {
|
||||||
u32 raw;
|
u32 raw;
|
||||||
BitField<0, 30, u32> index;
|
BitField<0, 29, u32> index;
|
||||||
|
BitField<29, 1, u32> is_long;
|
||||||
BitField<30, 1, u32> is_spill;
|
BitField<30, 1, u32> is_spill;
|
||||||
BitField<31, 1, u32> is_condition_code;
|
BitField<31, 1, u32> is_condition_code;
|
||||||
};
|
};
|
||||||
|
@ -53,6 +55,7 @@ struct Value {
|
||||||
u32 imm_u32;
|
u32 imm_u32;
|
||||||
s32 imm_s32;
|
s32 imm_s32;
|
||||||
f32 imm_f32;
|
f32 imm_f32;
|
||||||
|
f64 imm_f64;
|
||||||
};
|
};
|
||||||
|
|
||||||
bool operator==(const Value& rhs) const noexcept {
|
bool operator==(const Value& rhs) const noexcept {
|
||||||
|
@ -68,6 +71,8 @@ struct Value {
|
||||||
return imm_s32 == rhs.imm_s32;
|
return imm_s32 == rhs.imm_s32;
|
||||||
case Type::F32:
|
case Type::F32:
|
||||||
return Common::BitCast<u32>(imm_f32) == Common::BitCast<u32>(rhs.imm_f32);
|
return Common::BitCast<u32>(imm_f32) == Common::BitCast<u32>(rhs.imm_f32);
|
||||||
|
case Type::F64:
|
||||||
|
return Common::BitCast<u64>(imm_f64) == Common::BitCast<u64>(rhs.imm_f64);
|
||||||
}
|
}
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
@ -80,6 +85,7 @@ struct ScalarRegister : Value {};
|
||||||
struct ScalarU32 : Value {};
|
struct ScalarU32 : Value {};
|
||||||
struct ScalarS32 : Value {};
|
struct ScalarS32 : Value {};
|
||||||
struct ScalarF32 : Value {};
|
struct ScalarF32 : Value {};
|
||||||
|
struct ScalarF64 : Value {};
|
||||||
|
|
||||||
class RegAlloc {
|
class RegAlloc {
|
||||||
public:
|
public:
|
||||||
|
@ -87,9 +93,13 @@ public:
|
||||||
|
|
||||||
Register Define(IR::Inst& inst);
|
Register Define(IR::Inst& inst);
|
||||||
|
|
||||||
|
Register LongDefine(IR::Inst& inst);
|
||||||
|
|
||||||
Value Consume(const IR::Value& value);
|
Value Consume(const IR::Value& value);
|
||||||
|
|
||||||
Register AllocReg();
|
[[nodiscard]] Register AllocReg();
|
||||||
|
|
||||||
|
[[nodiscard]] Register AllocLongReg();
|
||||||
|
|
||||||
void FreeReg(Register reg);
|
void FreeReg(Register reg);
|
||||||
|
|
||||||
|
@ -97,19 +107,27 @@ public:
|
||||||
return num_used_registers;
|
return num_used_registers;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
[[nodiscard]] size_t NumUsedLongRegisters() const noexcept {
|
||||||
|
return num_used_long_registers;
|
||||||
|
}
|
||||||
|
|
||||||
private:
|
private:
|
||||||
static constexpr size_t NUM_REGS = 4096;
|
static constexpr size_t NUM_REGS = 4096;
|
||||||
static constexpr size_t NUM_ELEMENTS = 4;
|
static constexpr size_t NUM_ELEMENTS = 4;
|
||||||
|
|
||||||
|
Register Define(IR::Inst& inst, bool is_long);
|
||||||
|
|
||||||
Value Consume(IR::Inst& inst);
|
Value Consume(IR::Inst& inst);
|
||||||
|
|
||||||
Id Alloc();
|
Id Alloc(bool is_long);
|
||||||
|
|
||||||
void Free(Id id);
|
void Free(Id id);
|
||||||
|
|
||||||
EmitContext& ctx;
|
EmitContext& ctx;
|
||||||
size_t num_used_registers{};
|
size_t num_used_registers{};
|
||||||
|
size_t num_used_long_registers{};
|
||||||
std::bitset<NUM_REGS> register_use{};
|
std::bitset<NUM_REGS> register_use{};
|
||||||
|
std::bitset<NUM_REGS> long_register_use{};
|
||||||
};
|
};
|
||||||
|
|
||||||
template <bool scalar, typename FormatContext>
|
template <bool scalar, typename FormatContext>
|
||||||
|
@ -121,11 +139,19 @@ auto FormatTo(FormatContext& ctx, Id id) {
|
||||||
throw NotImplementedException("Spill emission");
|
throw NotImplementedException("Spill emission");
|
||||||
}
|
}
|
||||||
if constexpr (scalar) {
|
if constexpr (scalar) {
|
||||||
|
if (id.is_long != 0) {
|
||||||
|
return fmt::format_to(ctx.out(), "D{}.x", id.index.Value());
|
||||||
|
} else {
|
||||||
return fmt::format_to(ctx.out(), "R{}.x", id.index.Value());
|
return fmt::format_to(ctx.out(), "R{}.x", id.index.Value());
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
if (id.is_long != 0) {
|
||||||
|
return fmt::format_to(ctx.out(), "D{}", id.index.Value());
|
||||||
} else {
|
} else {
|
||||||
return fmt::format_to(ctx.out(), "R{}", id.index.Value());
|
return fmt::format_to(ctx.out(), "R{}", id.index.Value());
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
} // namespace Shader::Backend::GLASM
|
} // namespace Shader::Backend::GLASM
|
||||||
|
|
||||||
|
@ -184,6 +210,8 @@ struct fmt::formatter<Shader::Backend::GLASM::ScalarU32> {
|
||||||
return fmt::format_to(ctx.out(), "{}", static_cast<u32>(value.imm_s32));
|
return fmt::format_to(ctx.out(), "{}", static_cast<u32>(value.imm_s32));
|
||||||
case Shader::Backend::GLASM::Type::F32:
|
case Shader::Backend::GLASM::Type::F32:
|
||||||
return fmt::format_to(ctx.out(), "{}", Common::BitCast<u32>(value.imm_f32));
|
return fmt::format_to(ctx.out(), "{}", Common::BitCast<u32>(value.imm_f32));
|
||||||
|
case Shader::Backend::GLASM::Type::F64:
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
throw Shader::InvalidArgument("Invalid value type {}", value.type);
|
throw Shader::InvalidArgument("Invalid value type {}", value.type);
|
||||||
}
|
}
|
||||||
|
@ -205,6 +233,8 @@ struct fmt::formatter<Shader::Backend::GLASM::ScalarS32> {
|
||||||
return fmt::format_to(ctx.out(), "{}", value.imm_s32);
|
return fmt::format_to(ctx.out(), "{}", value.imm_s32);
|
||||||
case Shader::Backend::GLASM::Type::F32:
|
case Shader::Backend::GLASM::Type::F32:
|
||||||
return fmt::format_to(ctx.out(), "{}", Common::BitCast<s32>(value.imm_f32));
|
return fmt::format_to(ctx.out(), "{}", Common::BitCast<s32>(value.imm_f32));
|
||||||
|
case Shader::Backend::GLASM::Type::F64:
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
throw Shader::InvalidArgument("Invalid value type {}", value.type);
|
throw Shader::InvalidArgument("Invalid value type {}", value.type);
|
||||||
}
|
}
|
||||||
|
@ -226,6 +256,29 @@ struct fmt::formatter<Shader::Backend::GLASM::ScalarF32> {
|
||||||
return fmt::format_to(ctx.out(), "{}", Common::BitCast<s32>(value.imm_s32));
|
return fmt::format_to(ctx.out(), "{}", Common::BitCast<s32>(value.imm_s32));
|
||||||
case Shader::Backend::GLASM::Type::F32:
|
case Shader::Backend::GLASM::Type::F32:
|
||||||
return fmt::format_to(ctx.out(), "{}", value.imm_f32);
|
return fmt::format_to(ctx.out(), "{}", value.imm_f32);
|
||||||
|
case Shader::Backend::GLASM::Type::F64:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
throw Shader::InvalidArgument("Invalid value type {}", value.type);
|
||||||
|
}
|
||||||
|
};
|
||||||
|
|
||||||
|
template <>
|
||||||
|
struct fmt::formatter<Shader::Backend::GLASM::ScalarF64> {
|
||||||
|
constexpr auto parse(format_parse_context& ctx) {
|
||||||
|
return ctx.begin();
|
||||||
|
}
|
||||||
|
template <typename FormatContext>
|
||||||
|
auto format(const Shader::Backend::GLASM::ScalarF64& value, FormatContext& ctx) {
|
||||||
|
switch (value.type) {
|
||||||
|
case Shader::Backend::GLASM::Type::Register:
|
||||||
|
return Shader::Backend::GLASM::FormatTo<true>(ctx, value.id);
|
||||||
|
case Shader::Backend::GLASM::Type::U32:
|
||||||
|
case Shader::Backend::GLASM::Type::S32:
|
||||||
|
case Shader::Backend::GLASM::Type::F32:
|
||||||
|
break;
|
||||||
|
case Shader::Backend::GLASM::Type::F64:
|
||||||
|
return format_to(ctx.out(), "{}", value.imm_f64);
|
||||||
}
|
}
|
||||||
throw Shader::InvalidArgument("Invalid value type {}", value.type);
|
throw Shader::InvalidArgument("Invalid value type {}", value.type);
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in a new issue