core/arm_interface: Call SVC after end of dynarmic block.
So we can modify all of dynarmic states within SVC without ExceptionalExit. Especially as the ExceptionalExit hack is dropped on upstream dynarmic.
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9110cfdefb
commit
3d2e80daed
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@ -65,9 +65,6 @@ public:
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/// Step CPU by one instruction
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virtual void Step() = 0;
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/// Exits execution from a callback, the callback must rewind the stack
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virtual void ExceptionalExit() = 0;
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/// Clear all instruction cache
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virtual void ClearInstructionCache() = 0;
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@ -78,7 +78,9 @@ public:
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}
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void CallSVC(u32 swi) override {
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Kernel::Svc::Call(parent.system, swi);
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parent.svc_called = true;
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parent.svc_swi = swi;
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parent.jit->HaltExecution();
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}
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void AddTicks(u64 ticks) override {
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@ -187,11 +189,17 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
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}
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void ARM_Dynarmic_32::Run() {
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jit->Run();
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}
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void ARM_Dynarmic_32::ExceptionalExit() {
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jit->ExceptionalExit();
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while (true) {
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jit->Run();
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if (!svc_called) {
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break;
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}
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svc_called = false;
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Kernel::Svc::Call(system, svc_swi);
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if (shutdown) {
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break;
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}
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}
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}
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void ARM_Dynarmic_32::Step() {
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@ -275,6 +283,7 @@ void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) {
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void ARM_Dynarmic_32::PrepareReschedule() {
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jit->HaltExecution();
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shutdown = true;
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}
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void ARM_Dynarmic_32::ClearInstructionCache() {
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@ -42,7 +42,6 @@ public:
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u32 GetPSTATE() const override;
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void SetPSTATE(u32 pstate) override;
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void Run() override;
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void ExceptionalExit() override;
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void Step() override;
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VAddr GetTlsAddress() const override;
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void SetTlsAddress(VAddr address) override;
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@ -82,6 +81,12 @@ private:
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std::size_t core_index;
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DynarmicExclusiveMonitor& exclusive_monitor;
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std::shared_ptr<Dynarmic::A32::Jit> jit;
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// SVC callback
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u32 svc_swi{};
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bool svc_called{};
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bool shutdown{};
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};
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} // namespace Core
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@ -102,7 +102,9 @@ public:
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}
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void CallSVC(u32 swi) override {
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Kernel::Svc::Call(parent.system, swi);
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parent.svc_called = true;
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parent.svc_swi = swi;
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parent.jit->HaltExecution();
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}
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void AddTicks(u64 ticks) override {
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@ -227,11 +229,17 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
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}
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void ARM_Dynarmic_64::Run() {
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jit->Run();
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}
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void ARM_Dynarmic_64::ExceptionalExit() {
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jit->ExceptionalExit();
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while (true) {
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jit->Run();
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if (!svc_called) {
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break;
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}
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svc_called = false;
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Kernel::Svc::Call(system, svc_swi);
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if (shutdown) {
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break;
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}
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}
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}
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void ARM_Dynarmic_64::Step() {
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@ -320,6 +328,7 @@ void ARM_Dynarmic_64::LoadContext(const ThreadContext64& ctx) {
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void ARM_Dynarmic_64::PrepareReschedule() {
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jit->HaltExecution();
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shutdown = true;
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}
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void ARM_Dynarmic_64::ClearInstructionCache() {
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@ -40,7 +40,6 @@ public:
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void SetPSTATE(u32 pstate) override;
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void Run() override;
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void Step() override;
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void ExceptionalExit() override;
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VAddr GetTlsAddress() const override;
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void SetTlsAddress(VAddr address) override;
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void SetTPIDR_EL0(u64 value) override;
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@ -75,6 +74,12 @@ private:
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DynarmicExclusiveMonitor& exclusive_monitor;
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std::shared_ptr<Dynarmic::A64::Jit> jit;
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// SVC callback
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u32 svc_swi{};
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bool svc_called{};
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bool shutdown{};
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};
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} // namespace Core
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@ -659,7 +659,6 @@ void KScheduler::Unload(KThread* thread) {
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if (thread) {
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if (thread->IsCallingSvc()) {
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system.ArmInterface(core_id).ExceptionalExit();
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thread->ClearIsCallingSvc();
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}
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if (!thread->IsTerminationRequested()) {
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