buffer_cache: Add logic for non-NVN storage buffer tracking
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@ -35,6 +35,7 @@ struct Bias {
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u32 index;
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u32 offset_begin;
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u32 offset_end;
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u32 alignment;
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};
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using boost::container::flat_set;
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@ -349,7 +350,8 @@ std::optional<StorageBufferAddr> Track(const IR::Value& value, const Bias* bias)
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.index = index.U32(),
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.offset = offset.U32(),
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};
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if (!Common::IsAligned(storage_buffer.offset, 16)) {
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const u32 alignment{bias ? bias->alignment : 8U};
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if (!Common::IsAligned(storage_buffer.offset, alignment)) {
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// The SSBO pointer has to be aligned
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return std::nullopt;
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}
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@ -371,6 +373,7 @@ void CollectStorageBuffers(IR::Block& block, IR::Inst& inst, StorageInfo& info)
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.index = 0,
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.offset_begin = 0x110,
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.offset_end = 0x610,
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.alignment = 16,
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};
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// Track the low address of the instruction
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const std::optional<LowAddrInfo> low_addr_info{TrackLowAddress(&inst)};
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@ -386,8 +389,11 @@ void CollectStorageBuffers(IR::Block& block, IR::Inst& inst, StorageInfo& info)
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storage_buffer = Track(low_addr, nullptr);
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if (!storage_buffer) {
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// If that also fails, use NVN fallbacks
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LOG_WARNING(Shader, "Storage buffer failed to track, using global memory fallbacks");
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return;
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}
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LOG_WARNING(Shader, "Storage buffer tracked without bias, index {} offset {}",
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storage_buffer->index, storage_buffer->offset);
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}
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// Collect storage buffer and the instruction
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if (IsGlobalMemoryWrite(inst)) {
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@ -366,7 +366,8 @@ private:
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void NotifyBufferDeletion();
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[[nodiscard]] Binding StorageBufferBinding(GPUVAddr ssbo_addr, bool is_written = false) const;
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[[nodiscard]] Binding StorageBufferBinding(GPUVAddr ssbo_addr, u32 cbuf_index,
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bool is_written = false) const;
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[[nodiscard]] TextureBufferBinding GetTextureBufferBinding(GPUVAddr gpu_addr, u32 size,
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PixelFormat format);
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@ -749,7 +750,7 @@ void BufferCache<P>::BindGraphicsStorageBuffer(size_t stage, size_t ssbo_index,
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const auto& cbufs = maxwell3d->state.shader_stages[stage];
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const GPUVAddr ssbo_addr = cbufs.const_buffers[cbuf_index].address + cbuf_offset;
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storage_buffers[stage][ssbo_index] = StorageBufferBinding(ssbo_addr, is_written);
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storage_buffers[stage][ssbo_index] = StorageBufferBinding(ssbo_addr, cbuf_index, is_written);
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}
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template <class P>
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@ -789,7 +790,7 @@ void BufferCache<P>::BindComputeStorageBuffer(size_t ssbo_index, u32 cbuf_index,
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const auto& cbufs = launch_desc.const_buffer_config;
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const GPUVAddr ssbo_addr = cbufs[cbuf_index].Address() + cbuf_offset;
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compute_storage_buffers[ssbo_index] = StorageBufferBinding(ssbo_addr, is_written);
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compute_storage_buffers[ssbo_index] = StorageBufferBinding(ssbo_addr, cbuf_index, is_written);
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}
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template <class P>
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@ -1935,11 +1936,26 @@ void BufferCache<P>::NotifyBufferDeletion() {
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template <class P>
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typename BufferCache<P>::Binding BufferCache<P>::StorageBufferBinding(GPUVAddr ssbo_addr,
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u32 cbuf_index,
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bool is_written) const {
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const GPUVAddr gpu_addr = gpu_memory->Read<u64>(ssbo_addr);
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const u32 size = gpu_memory->Read<u32>(ssbo_addr + 8);
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const auto size = [&]() {
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const bool is_nvn_cbuf = cbuf_index == 0;
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// The NVN driver buffer (index 0) is known to pack the SSBO address followed by its size.
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if (is_nvn_cbuf) {
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return gpu_memory->Read<u32>(ssbo_addr + 8);
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}
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// Other titles (notably Doom Eternal) may use STG/LDG on buffer addresses in custom defined
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// cbufs, which do not store the sizes adjacent to the addresses, so use the fully
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// mapped buffer size for now.
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const u32 memory_layout_size = static_cast<u32>(gpu_memory->GetMemoryLayoutSize(gpu_addr));
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LOG_INFO(HW_GPU, "Binding storage buffer for cbuf index {}, MemoryLayoutSize 0x{:X}",
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cbuf_index, memory_layout_size);
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return memory_layout_size;
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}();
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const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(gpu_addr);
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if (!cpu_addr || size == 0) {
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LOG_WARNING(HW_GPU, "Failed to find storage buffer for cbuf index {}", cbuf_index);
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return NULL_BINDING;
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}
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const VAddr cpu_end = Common::AlignUp(*cpu_addr + size, Core::Memory::YUZU_PAGESIZE);
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