shader_ir/memory: Reduce severity of LD_L cache management and log it
This commit is contained in:
parent
24abeb9a67
commit
04979560fb
|
@ -387,6 +387,13 @@ enum class IpaSampleMode : u64 {
|
|||
Offset = 2,
|
||||
};
|
||||
|
||||
enum class LmemLoadCacheManagement : u64 {
|
||||
Default = 0,
|
||||
LU = 1,
|
||||
CI = 2,
|
||||
CV = 3,
|
||||
};
|
||||
|
||||
enum class LmemStoreCacheManagement : u64 {
|
||||
Default = 0,
|
||||
CG = 1,
|
||||
|
|
|
@ -86,8 +86,8 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
|
|||
break;
|
||||
}
|
||||
case OpCode::Id::LD_L: {
|
||||
UNIMPLEMENTED_IF_MSG(instr.ld_l.unknown == 1, "LD_L Unhandled mode: {}",
|
||||
static_cast<u32>(instr.ld_l.unknown.Value()));
|
||||
LOG_DEBUG(HW_GPU, "LD_L cache management mode: {}",
|
||||
static_cast<u64>(instr.ld_l.unknown.Value()));
|
||||
|
||||
const auto GetLmem = [&](s32 offset) {
|
||||
ASSERT(offset % 4 == 0);
|
||||
|
|
Loading…
Reference in a new issue