shader_ir/memory: Reduce severity of LD_L cache management and log it
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24abeb9a67
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04979560fb
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@ -387,6 +387,13 @@ enum class IpaSampleMode : u64 {
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Offset = 2,
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Offset = 2,
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};
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};
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enum class LmemLoadCacheManagement : u64 {
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Default = 0,
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LU = 1,
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CI = 2,
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CV = 3,
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};
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enum class LmemStoreCacheManagement : u64 {
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enum class LmemStoreCacheManagement : u64 {
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Default = 0,
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Default = 0,
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CG = 1,
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CG = 1,
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@ -86,8 +86,8 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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break;
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break;
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}
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}
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case OpCode::Id::LD_L: {
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case OpCode::Id::LD_L: {
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UNIMPLEMENTED_IF_MSG(instr.ld_l.unknown == 1, "LD_L Unhandled mode: {}",
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LOG_DEBUG(HW_GPU, "LD_L cache management mode: {}",
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static_cast<u32>(instr.ld_l.unknown.Value()));
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static_cast<u64>(instr.ld_l.unknown.Value()));
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const auto GetLmem = [&](s32 offset) {
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const auto GetLmem = [&](s32 offset) {
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ASSERT(offset % 4 == 0);
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ASSERT(offset % 4 == 0);
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