2021-05-10 21:21:28 +00:00
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "shader_recompiler/backend/glasm/emit_context.h"
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#include "shader_recompiler/backend/glasm/emit_glasm_instructions.h"
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#include "shader_recompiler/frontend/ir/value.h"
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namespace Shader::Backend::GLASM {
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void EmitLaneId(EmitContext& ctx, IR::Inst& inst) {
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ctx.Add("MOV.S {}.x,{}.threadid;", inst, ctx.stage_name);
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}
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void EmitVoteAll(EmitContext& ctx, IR::Inst& inst, ScalarS32 pred) {
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ctx.Add("TGALL.S {}.x,{};", inst, pred);
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}
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void EmitVoteAny(EmitContext& ctx, IR::Inst& inst, ScalarS32 pred) {
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ctx.Add("TGANY.S {}.x,{};", inst, pred);
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}
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void EmitVoteEqual(EmitContext& ctx, IR::Inst& inst, ScalarS32 pred) {
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ctx.Add("TGEQ.S {}.x,{};", inst, pred);
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}
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void EmitSubgroupBallot(EmitContext& ctx, IR::Inst& inst, ScalarS32 pred) {
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ctx.Add("TGBALLOT {}.x,{};", inst, pred);
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}
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void EmitSubgroupEqMask(EmitContext& ctx, IR::Inst& inst) {
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ctx.Add("MOV.U {},{}.threadeqmask;", inst, ctx.stage_name);
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}
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void EmitSubgroupLtMask(EmitContext& ctx, IR::Inst& inst) {
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ctx.Add("MOV.U {},{}.threadltmask;", inst, ctx.stage_name);
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}
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void EmitSubgroupLeMask(EmitContext& ctx, IR::Inst& inst) {
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ctx.Add("MOV.U {},{}.threadlemask;", inst, ctx.stage_name);
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}
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void EmitSubgroupGtMask(EmitContext& ctx, IR::Inst& inst) {
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ctx.Add("MOV.U {},{}.threadgtmask;", inst, ctx.stage_name);
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}
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void EmitSubgroupGeMask(EmitContext& ctx, IR::Inst& inst) {
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ctx.Add("MOV.U {},{}.threadgemask;", inst, ctx.stage_name);
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}
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static void Shuffle(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index,
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const IR::Value& clamp, const IR::Value& segmentation_mask,
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std::string_view op) {
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std::string mask;
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if (clamp.IsImmediate() && segmentation_mask.IsImmediate()) {
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mask = fmt::to_string(clamp.U32() | (segmentation_mask.U32() << 8));
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} else {
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mask = "RC";
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ctx.Add("BFI.U RC.x,{{5,8,0,0}},{},{};",
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ScalarU32{ctx.reg_alloc.Consume(segmentation_mask)},
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ScalarU32{ctx.reg_alloc.Consume(clamp)});
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}
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const Register value_ret{ctx.reg_alloc.Define(inst)};
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IR::Inst* const in_bounds{inst.GetAssociatedPseudoOperation(IR::Opcode::GetInBoundsFromOp)};
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if (in_bounds) {
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const Register bounds_ret{ctx.reg_alloc.Define(*in_bounds)};
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ctx.Add("SHF{}.U {},{},{},{};"
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"MOV.U {}.x,{}.y;",
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op, bounds_ret, value, index, mask, value_ret, bounds_ret);
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in_bounds->Invalidate();
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} else {
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ctx.Add("SHF{}.U {},{},{},{};"
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"MOV.U {}.x,{}.y;",
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op, value_ret, value, index, mask, value_ret, value_ret);
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}
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}
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void EmitShuffleIndex(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index,
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const IR::Value& clamp, const IR::Value& segmentation_mask) {
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Shuffle(ctx, inst, value, index, clamp, segmentation_mask, "IDX");
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}
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void EmitShuffleUp(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index,
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const IR::Value& clamp, const IR::Value& segmentation_mask) {
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Shuffle(ctx, inst, value, index, clamp, segmentation_mask, "UP");
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}
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void EmitShuffleDown(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index,
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const IR::Value& clamp, const IR::Value& segmentation_mask) {
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Shuffle(ctx, inst, value, index, clamp, segmentation_mask, "DOWN");
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}
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void EmitShuffleButterfly(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 index,
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const IR::Value& clamp, const IR::Value& segmentation_mask) {
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Shuffle(ctx, inst, value, index, clamp, segmentation_mask, "XOR");
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}
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2021-05-19 05:00:51 +00:00
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void EmitFSwizzleAdd(EmitContext& ctx, IR::Inst& inst, ScalarF32 op_a, ScalarF32 op_b,
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ScalarU32 swizzle) {
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const auto ret{ctx.reg_alloc.Define(inst)};
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ctx.Add("AND.U RC.z,{}.threadid,3;"
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"SHL.U RC.z,RC.z,1;"
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"SHR.U RC.z,{},RC.z;"
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"AND.U RC.z,RC.z,3;"
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"MUL.F RC.x,{},FSWZA[RC.z];"
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"MUL.F RC.y,{},FSWZB[RC.z];"
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"ADD.F {}.x,RC.x,RC.y;",
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ctx.stage_name, swizzle, op_a, op_b, ret);
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2021-05-10 21:21:28 +00:00
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}
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2021-05-15 21:17:03 +00:00
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void EmitDPdxFine(EmitContext& ctx, IR::Inst& inst, ScalarF32 p) {
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ctx.Add("DDX.FINE {}.x,{};", inst, p);
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2021-05-10 21:21:28 +00:00
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}
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2021-05-15 21:17:03 +00:00
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void EmitDPdyFine(EmitContext& ctx, IR::Inst& inst, ScalarF32 p) {
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ctx.Add("DDY.FINE {}.x,{};", inst, p);
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2021-05-10 21:21:28 +00:00
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}
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2021-05-15 21:17:03 +00:00
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void EmitDPdxCoarse(EmitContext& ctx, IR::Inst& inst, ScalarF32 p) {
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ctx.Add("DDX.COARSE {}.x,{};", inst, p);
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2021-05-10 21:21:28 +00:00
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}
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2021-05-15 21:17:03 +00:00
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void EmitDPdyCoarse(EmitContext& ctx, IR::Inst& inst, ScalarF32 p) {
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ctx.Add("DDY.COARSE {}.x,{};", inst, p);
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2021-05-10 21:21:28 +00:00
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}
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} // namespace Shader::Backend::GLASM
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