2021-01-09 06:30:07 +00:00
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <algorithm>
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#include <memory>
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2021-02-11 19:39:06 +00:00
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#include <vector>
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2021-01-09 06:30:07 +00:00
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2021-02-06 02:11:23 +00:00
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#include "shader_recompiler/frontend/ir/basic_block.h"
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2021-02-14 23:15:42 +00:00
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#include "shader_recompiler/frontend/ir/post_order.h"
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#include "shader_recompiler/frontend/ir/structured_control_flow.h"
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#include "shader_recompiler/frontend/maxwell/program.h"
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#include "shader_recompiler/frontend/maxwell/translate/translate.h"
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#include "shader_recompiler/ir_opt/passes.h"
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namespace Shader::Maxwell {
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namespace {
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IR::BlockList TranslateCode(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Block>& block_pool,
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Environment& env, Flow::Function& cfg_function) {
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const size_t num_blocks{cfg_function.blocks.size()};
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std::vector<IR::Block*> blocks(cfg_function.blocks.size());
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std::ranges::for_each(cfg_function.blocks, [&, i = size_t{0}](auto& cfg_block) mutable {
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const u32 begin{cfg_block.begin.Offset()};
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const u32 end{cfg_block.end.Offset()};
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blocks[i] = block_pool.Create(inst_pool, begin, end);
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cfg_block.ir = blocks[i];
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++i;
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});
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std::ranges::for_each(cfg_function.blocks, [&, i = size_t{0}](auto& cfg_block) mutable {
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IR::Block* const block{blocks[i]};
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++i;
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if (cfg_block.end_class != Flow::EndClass::Branch) {
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block->SetReturn();
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} else if (cfg_block.cond == IR::Condition{true}) {
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block->SetBranch(cfg_block.branch_true->ir);
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} else if (cfg_block.cond == IR::Condition{false}) {
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block->SetBranch(cfg_block.branch_false->ir);
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} else {
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block->SetBranches(cfg_block.cond, cfg_block.branch_true->ir,
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cfg_block.branch_false->ir);
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}
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});
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return IR::VisitAST(inst_pool, block_pool, blocks,
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[&](IR::Block* block) { Translate(env, block); });
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}
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} // Anonymous namespace
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IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Block>& block_pool,
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Environment& env, Flow::CFG& cfg) {
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IR::Program program;
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auto& functions{program.functions};
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functions.reserve(cfg.Functions().size());
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for (Flow::Function& cfg_function : cfg.Functions()) {
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functions.push_back(IR::Function{
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.blocks{TranslateCode(inst_pool, block_pool, env, cfg_function)},
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.post_order_blocks{},
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});
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}
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for (IR::Function& function : functions) {
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function.post_order_blocks = PostOrder(function.blocks);
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Optimization::SsaRewritePass(function.post_order_blocks);
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}
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fmt::print(stdout, "{}\n", IR::DumpProgram(program));
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Optimization::GlobalMemoryToStorageBufferPass(program);
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for (IR::Function& function : functions) {
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Optimization::PostOrderInvoke(Optimization::ConstantPropagationPass, function);
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Optimization::PostOrderInvoke(Optimization::DeadCodeEliminationPass, function);
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Optimization::IdentityRemovalPass(function);
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Optimization::VerificationPass(function);
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}
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2021-02-16 07:10:22 +00:00
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Optimization::CollectShaderInfoPass(program);
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2021-02-03 19:43:04 +00:00
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//*/
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return program;
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}
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} // namespace Shader::Maxwell
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