2020-10-27 03:07:36 +00:00
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// MIT License
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//
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// Copyright (c) Ryujinx Team and Contributors
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and
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// associated documentation files (the "Software"), to deal in the Software without restriction,
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// including without limitation the rights to use, copy, modify, merge, publish, distribute,
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// sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or
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// substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT
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// NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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// NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
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// DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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//
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#include "command_classes/host1x.h"
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#include "command_classes/nvdec.h"
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#include "command_classes/vic.h"
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#include "common/bit_util.h"
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#include "video_core/cdma_pusher.h"
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#include "video_core/command_classes/nvdec_common.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/gpu.h"
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#include "video_core/memory_manager.h"
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namespace Tegra {
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2020-12-04 19:39:12 +00:00
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CDmaPusher::CDmaPusher(GPU& gpu_)
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: gpu{gpu_}, nvdec_processor(std::make_shared<Nvdec>(gpu)),
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2020-10-27 03:07:36 +00:00
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vic_processor(std::make_unique<Vic>(gpu, nvdec_processor)),
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host1x_processor(std::make_unique<Host1x>(gpu)),
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nvdec_sync(std::make_unique<SyncptIncrManager>(gpu)),
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vic_sync(std::make_unique<SyncptIncrManager>(gpu)) {}
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CDmaPusher::~CDmaPusher() = default;
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void CDmaPusher::Push(ChCommandHeaderList&& entries) {
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cdma_queue.push(std::move(entries));
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}
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void CDmaPusher::DispatchCalls() {
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while (!cdma_queue.empty()) {
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Step();
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}
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}
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void CDmaPusher::Step() {
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const auto entries{cdma_queue.front()};
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cdma_queue.pop();
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std::vector<u32> values(entries.size());
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std::memcpy(values.data(), entries.data(), entries.size() * sizeof(u32));
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for (const u32 value : values) {
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if (mask != 0) {
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const u32 lbs = Common::CountTrailingZeroes32(mask);
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mask &= ~(1U << lbs);
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ExecuteCommand(static_cast<u32>(offset + lbs), value);
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continue;
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} else if (count != 0) {
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--count;
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ExecuteCommand(static_cast<u32>(offset), value);
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if (incrementing) {
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++offset;
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}
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continue;
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}
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const auto mode = static_cast<ChSubmissionMode>((value >> 28) & 0xf);
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switch (mode) {
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case ChSubmissionMode::SetClass: {
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mask = value & 0x3f;
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offset = (value >> 16) & 0xfff;
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current_class = static_cast<ChClassId>((value >> 6) & 0x3ff);
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break;
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}
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case ChSubmissionMode::Incrementing:
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case ChSubmissionMode::NonIncrementing:
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count = value & 0xffff;
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offset = (value >> 16) & 0xfff;
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incrementing = mode == ChSubmissionMode::Incrementing;
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break;
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case ChSubmissionMode::Mask:
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mask = value & 0xffff;
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offset = (value >> 16) & 0xfff;
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break;
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case ChSubmissionMode::Immediate: {
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const u32 data = value & 0xfff;
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offset = (value >> 16) & 0xfff;
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ExecuteCommand(static_cast<u32>(offset), data);
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break;
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}
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default:
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UNIMPLEMENTED_MSG("ChSubmission mode {} is not implemented!", static_cast<u32>(mode));
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break;
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}
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}
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}
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2020-12-04 19:39:12 +00:00
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void CDmaPusher::ExecuteCommand(u32 state_offset, u32 data) {
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2020-10-27 03:07:36 +00:00
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switch (current_class) {
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case ChClassId::NvDec:
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2020-12-04 19:39:12 +00:00
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ThiStateWrite(nvdec_thi_state, state_offset, {data});
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switch (static_cast<ThiMethod>(state_offset)) {
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2020-10-27 03:07:36 +00:00
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case ThiMethod::IncSyncpt: {
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LOG_DEBUG(Service_NVDRV, "NVDEC Class IncSyncpt Method");
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const auto syncpoint_id = static_cast<u32>(data & 0xFF);
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const auto cond = static_cast<u32>((data >> 8) & 0xFF);
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if (cond == 0) {
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nvdec_sync->Increment(syncpoint_id);
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} else {
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nvdec_sync->IncrementWhenDone(static_cast<u32>(current_class), syncpoint_id);
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nvdec_sync->SignalDone(syncpoint_id);
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}
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break;
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}
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case ThiMethod::SetMethod1:
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LOG_DEBUG(Service_NVDRV, "NVDEC method 0x{:X}",
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static_cast<u32>(nvdec_thi_state.method_0));
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2020-12-04 19:39:12 +00:00
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nvdec_processor->ProcessMethod(static_cast<Nvdec::Method>(nvdec_thi_state.method_0),
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{data});
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2020-10-27 03:07:36 +00:00
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break;
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default:
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break;
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}
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break;
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case ChClassId::GraphicsVic:
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2020-12-04 19:39:12 +00:00
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ThiStateWrite(vic_thi_state, static_cast<u32>(state_offset), {data});
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switch (static_cast<ThiMethod>(state_offset)) {
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2020-10-27 03:07:36 +00:00
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case ThiMethod::IncSyncpt: {
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LOG_DEBUG(Service_NVDRV, "VIC Class IncSyncpt Method");
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const auto syncpoint_id = static_cast<u32>(data & 0xFF);
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const auto cond = static_cast<u32>((data >> 8) & 0xFF);
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if (cond == 0) {
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vic_sync->Increment(syncpoint_id);
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} else {
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vic_sync->IncrementWhenDone(static_cast<u32>(current_class), syncpoint_id);
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vic_sync->SignalDone(syncpoint_id);
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}
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break;
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}
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case ThiMethod::SetMethod1:
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LOG_DEBUG(Service_NVDRV, "VIC method 0x{:X}, Args=({})",
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2020-10-28 23:03:35 +00:00
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static_cast<u32>(vic_thi_state.method_0), data);
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2020-12-04 19:39:12 +00:00
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vic_processor->ProcessMethod(static_cast<Vic::Method>(vic_thi_state.method_0), {data});
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2020-10-27 03:07:36 +00:00
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break;
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default:
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break;
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}
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break;
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case ChClassId::Host1x:
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// This device is mainly for syncpoint synchronization
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LOG_DEBUG(Service_NVDRV, "Host1X Class Method");
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2020-12-04 19:39:12 +00:00
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host1x_processor->ProcessMethod(static_cast<Host1x::Method>(state_offset), {data});
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2020-10-27 03:07:36 +00:00
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break;
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default:
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UNIMPLEMENTED_MSG("Current class not implemented {:X}", static_cast<u32>(current_class));
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break;
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}
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}
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2020-12-04 19:39:12 +00:00
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void CDmaPusher::ThiStateWrite(ThiRegisters& state, u32 state_offset,
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const std::vector<u32>& arguments) {
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u8* const state_offset_ptr = reinterpret_cast<u8*>(&state) + sizeof(u32) * state_offset;
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std::memcpy(state_offset_ptr, arguments.data(), sizeof(u32) * arguments.size());
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2020-10-27 03:07:36 +00:00
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}
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} // namespace Tegra
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