2021-05-05 05:19:08 +00:00
|
|
|
// Copyright 2021 yuzu Emulator Project
|
|
|
|
// Licensed under GPLv2 or any later version
|
|
|
|
// Refer to the license.txt file included.
|
|
|
|
|
|
|
|
#include <string>
|
|
|
|
|
|
|
|
#include <fmt/format.h>
|
|
|
|
|
2021-05-07 09:31:30 +00:00
|
|
|
#include "shader_recompiler/backend/glasm/emit_context.h"
|
2021-05-05 05:19:08 +00:00
|
|
|
#include "shader_recompiler/backend/glasm/reg_alloc.h"
|
|
|
|
#include "shader_recompiler/exception.h"
|
|
|
|
#include "shader_recompiler/frontend/ir/value.h"
|
|
|
|
|
|
|
|
namespace Shader::Backend::GLASM {
|
2021-05-09 06:11:34 +00:00
|
|
|
|
|
|
|
Register RegAlloc::Define(IR::Inst& inst) {
|
|
|
|
const Id id{Alloc()};
|
|
|
|
inst.SetDefinition<Id>(id);
|
|
|
|
Register ret;
|
|
|
|
ret.type = Type::Register;
|
|
|
|
ret.id = id;
|
|
|
|
return ret;
|
2021-05-07 09:31:30 +00:00
|
|
|
}
|
|
|
|
|
2021-05-09 06:11:34 +00:00
|
|
|
Value RegAlloc::Consume(const IR::Value& value) {
|
|
|
|
if (!value.IsImmediate()) {
|
|
|
|
return Consume(*value.InstRecursive());
|
|
|
|
}
|
|
|
|
Value ret;
|
2021-05-07 09:31:30 +00:00
|
|
|
switch (value.Type()) {
|
|
|
|
case IR::Type::U1:
|
2021-05-09 06:11:34 +00:00
|
|
|
ret.type = Type::U32;
|
|
|
|
ret.imm_u32 = value.U1() ? 0xffffffff : 0;
|
|
|
|
break;
|
2021-05-07 09:31:30 +00:00
|
|
|
case IR::Type::U32:
|
2021-05-09 06:11:34 +00:00
|
|
|
ret.type = Type::U32;
|
|
|
|
ret.imm_u32 = value.U32();
|
|
|
|
break;
|
2021-05-07 09:31:30 +00:00
|
|
|
case IR::Type::F32:
|
2021-05-09 06:11:34 +00:00
|
|
|
ret.type = Type::F32;
|
|
|
|
ret.imm_f32 = value.F32();
|
|
|
|
break;
|
2021-05-07 09:31:30 +00:00
|
|
|
default:
|
2021-05-08 22:59:05 +00:00
|
|
|
throw NotImplementedException("Immediate type {}", value.Type());
|
2021-05-05 05:19:08 +00:00
|
|
|
}
|
2021-05-09 06:11:34 +00:00
|
|
|
return ret;
|
2021-05-05 05:19:08 +00:00
|
|
|
}
|
|
|
|
|
2021-05-09 06:11:34 +00:00
|
|
|
Register RegAlloc::AllocReg() {
|
|
|
|
Register ret;
|
|
|
|
ret.type = Type::Register;
|
|
|
|
ret.id = Alloc();
|
|
|
|
return ret;
|
2021-05-05 05:19:08 +00:00
|
|
|
}
|
|
|
|
|
2021-05-09 06:11:34 +00:00
|
|
|
void RegAlloc::FreeReg(Register reg) {
|
|
|
|
Free(reg.id);
|
2021-05-05 05:19:08 +00:00
|
|
|
}
|
|
|
|
|
2021-05-09 06:11:34 +00:00
|
|
|
Value RegAlloc::Consume(IR::Inst& inst) {
|
2021-05-05 05:19:08 +00:00
|
|
|
const Id id{inst.Definition<Id>()};
|
|
|
|
inst.DestructiveRemoveUsage();
|
|
|
|
if (!inst.HasUses()) {
|
|
|
|
Free(id);
|
|
|
|
}
|
2021-05-09 06:11:34 +00:00
|
|
|
Value ret;
|
|
|
|
ret.type = Type::Register;
|
|
|
|
ret.id = id;
|
|
|
|
return ret;
|
2021-05-05 05:19:08 +00:00
|
|
|
}
|
|
|
|
|
2021-05-07 09:31:30 +00:00
|
|
|
Id RegAlloc::Alloc() {
|
2021-05-05 05:19:08 +00:00
|
|
|
for (size_t reg = 0; reg < NUM_REGS; ++reg) {
|
|
|
|
if (register_use[reg]) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
num_used_registers = std::max(num_used_registers, reg + 1);
|
|
|
|
register_use[reg] = true;
|
2021-05-08 19:46:32 +00:00
|
|
|
Id ret{};
|
|
|
|
ret.index.Assign(static_cast<u32>(reg));
|
|
|
|
ret.is_spill.Assign(0);
|
|
|
|
ret.is_condition_code.Assign(0);
|
|
|
|
return ret;
|
2021-05-05 05:19:08 +00:00
|
|
|
}
|
|
|
|
throw NotImplementedException("Register spilling");
|
|
|
|
}
|
|
|
|
|
|
|
|
void RegAlloc::Free(Id id) {
|
|
|
|
if (id.is_spill != 0) {
|
|
|
|
throw NotImplementedException("Free spill");
|
|
|
|
}
|
|
|
|
register_use[id.index] = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
} // namespace Shader::Backend::GLASM
|