2018-12-20 22:09:21 +00:00
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// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "video_core/engines/shader_bytecode.h"
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2019-06-05 01:44:06 +00:00
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#include "video_core/shader/node_helper.h"
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2018-12-20 22:09:21 +00:00
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#include "video_core/shader/shader_ir.h"
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namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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2019-01-30 05:09:40 +00:00
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u32 ShaderIR::DecodeBfe(NodeBlock& bb, u32 pc) {
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2018-12-20 22:09:21 +00:00
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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2018-12-16 21:19:17 +00:00
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Node op_a = GetRegister(instr.gpr8);
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2020-03-13 05:48:01 +00:00
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Node op_b = [&] {
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switch (opcode->get().GetId()) {
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case OpCode::Id::BFE_R:
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return GetRegister(instr.gpr20);
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case OpCode::Id::BFE_C:
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return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset());
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case OpCode::Id::BFE_IMM:
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return Immediate(instr.alu.GetSignedImm20_20());
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default:
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UNREACHABLE();
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return Immediate(0);
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}
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}();
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UNIMPLEMENTED_IF_MSG(instr.bfe.rd_cc, "Condition codes in BFE is not implemented");
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UNIMPLEMENTED_IF_MSG(instr.bfe.brev, "BREV in BFE is not implemented");
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const bool is_signed = instr.bfe.is_signed;
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const auto start_position = SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_b,
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Immediate(0), Immediate(8));
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const auto bits = SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_b,
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Immediate(8), Immediate(8));
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auto result =
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SignedOperation(OperationCode::IBitfieldExtract, is_signed, op_a, start_position, bits);
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SetRegister(bb, instr.gpr0, result);
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2018-12-20 22:09:21 +00:00
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return pc;
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}
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2019-05-22 21:24:35 +00:00
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} // namespace VideoCommon::Shader
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