2020-10-27 03:07:36 +00:00
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// Copyright 2020 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <memory>
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#include <vector>
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#include "common/bit_field.h"
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#include "common/common_types.h"
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struct SwsContext;
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namespace Tegra {
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class GPU;
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class Nvdec;
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class Vic {
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public:
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enum class Method : u32 {
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Execute = 0xc0,
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SetControlParams = 0x1c1,
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SetConfigStructOffset = 0x1c2,
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SetOutputSurfaceLumaOffset = 0x1c8,
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2021-08-04 03:43:11 +00:00
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SetOutputSurfaceChromaOffset = 0x1c9,
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SetOutputSurfaceChromaUnusedOffset = 0x1ca
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2020-10-27 03:07:36 +00:00
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};
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2020-10-27 06:09:17 +00:00
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explicit Vic(GPU& gpu, std::shared_ptr<Nvdec> nvdec_processor);
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2020-10-27 03:07:36 +00:00
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~Vic();
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/// Write to the device state.
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2020-11-23 20:01:40 +00:00
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void ProcessMethod(Method method, u32 argument);
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2020-10-27 03:07:36 +00:00
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private:
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void Execute();
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enum class VideoPixelFormat : u64_le {
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RGBA8 = 0x1f,
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BGRA8 = 0x20,
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2021-10-07 15:06:57 +00:00
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RGBX8 = 0x23,
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2020-10-27 03:07:36 +00:00
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Yuv420 = 0x44,
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};
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union VicConfig {
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u64_le raw{};
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BitField<0, 7, u64_le> pixel_format;
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BitField<7, 2, u64_le> chroma_loc_horiz;
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BitField<9, 2, u64_le> chroma_loc_vert;
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BitField<11, 4, u64_le> block_linear_kind;
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BitField<15, 4, u64_le> block_linear_height_log2;
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BitField<32, 14, u64_le> surface_width_minus1;
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BitField<46, 14, u64_le> surface_height_minus1;
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};
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GPU& gpu;
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std::shared_ptr<Tegra::Nvdec> nvdec_processor;
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2020-11-23 18:25:01 +00:00
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/// Avoid reallocation of the following buffers every frame, as their
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/// size does not change during a stream
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using AVMallocPtr = std::unique_ptr<u8, decltype(&av_free)>;
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AVMallocPtr converted_frame_buffer;
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std::vector<u8> luma_buffer;
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std::vector<u8> chroma_buffer;
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2020-10-27 03:07:36 +00:00
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GPUVAddr config_struct_address{};
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GPUVAddr output_surface_luma_address{};
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2021-08-04 03:43:11 +00:00
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GPUVAddr output_surface_chroma_address{};
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2020-10-27 03:07:36 +00:00
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SwsContext* scaler_ctx{};
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s32 scaler_width{};
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s32 scaler_height{};
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};
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} // namespace Tegra
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