2018-07-24 10:03:24 +00:00
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// Copyright 2008 Dolphin Emulator Project / 2017 Citra Emulator Project
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// Licensed under GPLv2+
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// Refer to the license.txt file included.
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#pragma once
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#include "common/common_types.h"
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2019-02-12 17:32:15 +00:00
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namespace Core::Timing {
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2018-07-24 10:03:24 +00:00
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// The below clock rate is based on Switch's clockspeed being widely known as 1.020GHz
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// The exact value used is of course unverified.
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constexpr u64 BASE_CLOCK_RATE = 1019215872; // Switch clock speed is 1020MHz un/docked
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2019-02-15 17:15:28 +00:00
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constexpr u64 CNTFREQ = 19200000; // Value from fusee.
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2018-07-24 10:03:24 +00:00
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inline s64 msToCycles(int ms) {
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// since ms is int there is no way to overflow
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return BASE_CLOCK_RATE * static_cast<s64>(ms) / 1000;
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}
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inline s64 msToCycles(float ms) {
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return static_cast<s64>(BASE_CLOCK_RATE * (0.001f) * ms);
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}
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inline s64 msToCycles(double ms) {
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return static_cast<s64>(BASE_CLOCK_RATE * (0.001) * ms);
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}
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inline s64 usToCycles(float us) {
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return static_cast<s64>(BASE_CLOCK_RATE * (0.000001f) * us);
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}
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inline s64 usToCycles(int us) {
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return (BASE_CLOCK_RATE * static_cast<s64>(us) / 1000000);
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}
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s64 usToCycles(s64 us);
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s64 usToCycles(u64 us);
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inline s64 nsToCycles(float ns) {
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return static_cast<s64>(BASE_CLOCK_RATE * (0.000000001f) * ns);
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}
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inline s64 nsToCycles(int ns) {
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return BASE_CLOCK_RATE * static_cast<s64>(ns) / 1000000000;
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}
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s64 nsToCycles(s64 ns);
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s64 nsToCycles(u64 ns);
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inline u64 cyclesToNs(s64 cycles) {
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return cycles * 1000000000 / BASE_CLOCK_RATE;
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}
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inline s64 cyclesToUs(s64 cycles) {
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return cycles * 1000000 / BASE_CLOCK_RATE;
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}
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inline u64 cyclesToMs(s64 cycles) {
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return cycles * 1000 / BASE_CLOCK_RATE;
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}
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2019-02-15 17:15:28 +00:00
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u64 CpuCyclesToClockCycles(u64 ticks);
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2019-02-12 17:32:15 +00:00
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} // namespace Core::Timing
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