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make minor faceplate adjustments for jlc

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This commit is contained in:
Artemis Tosini 2024-02-04 05:44:46 +00:00
parent 5dd8a5f802
commit 5ac2bac484
Signed by: artemist
GPG key ID: EE5227935FE3FF18
4 changed files with 20885 additions and 23544 deletions
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1
tangara-faceplate/faceplate-footprints.pretty/cat_esd.kicad_mod Symbolic link
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@ -0,0 +1 @@
../../tangara-mainboard/footprints.pretty/cat_esd.kicad_mod

44397
tangara-faceplate/tangara-faceplate.kicad_pcb
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File diff suppressed because it is too large Load diff

6
tangara-faceplate/tangara-faceplate.kicad_prl
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@ -1,7 +1,7 @@
{
"board": {
"active_layer": 36,
"active_layer_preset": "",
"active_layer_preset": "Back Assembly View",
"auto_track_width": true,
"hidden_netclasses": [],
"hidden_nets": [],
@ -38,6 +38,8 @@
8,
9,
10,
11,
12,
13,
15,
16,
@ -63,7 +65,7 @@
39,
40
],
"visible_layers": "fffffff_7fffffff",
"visible_layers": "0015050_80000001",
"zone_display_mode": 0
},
"meta": {

25
tangara-faceplate/tangara-faceplate.kicad_pro
View file

@ -56,7 +56,16 @@
"width": 0.0
}
],
"drc_exclusions": [],
"drc_exclusions": [
"clearance|144225012|126303416|3e3521a1-ba65-495b-a125-361363e48a46|6f9ed1f2-c8a0-4a46-b920-bde52c578371",
"clearance|157689465|99919214|ff11a6f7-6f94-455c-8e0e-ddd32a6d7acd|52a16c30-173a-482c-a962-efae53334f95",
"clearance|157700000|117800000|230fe596-6c26-46e0-a55e-69eca35e2804|0c6880e3-6998-4b7b-bca0-d0df79940f38",
"clearance|167019485|97708909|ac62df8e-9ff7-4995-bd7c-8ba537aefcd5|601e80af-a3da-4105-8a70-8dd1c79e8432",
"clearance|173100881|126979228|5c183b03-468a-4dc1-913a-e8144f81c69d|2aeb4562-8b99-46f2-9004-79778bf86f52",
"footprint_type_mismatch|157700000|117800000|dcc39ac0-b1c8-47ff-b56e-5024955579e1|00000000-0000-0000-0000-000000000000",
"footprint_type_mismatch|181000000|93020776|6f3d8b97-3f7f-4ec9-a37d-bcf9b5f688c8|00000000-0000-0000-0000-000000000000",
"lib_footprint_mismatch|174967338|135876798|89ce1889-1fa1-4e0e-a771-a2bef4ac494c|00000000-0000-0000-0000-000000000000"
],
"meta": {
"version": 2
},
@ -81,7 +90,7 @@
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_issues": "ignore",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
@ -114,21 +123,21 @@
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.127,
"min_clearance": 0.09,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.3,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_resolved_spokes": 2,
"min_resolved_spokes": 1,
"min_silk_clearance": 0.0,
"min_text_height": 0.7999999999999999,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.19999999999999998,
"min_track_width": 0.127,
"min_through_hole_diameter": 0.15,
"min_track_width": 0.09,
"min_via_annular_width": 0.13,
"min_via_diameter": 0.39999999999999997,
"min_via_diameter": 0.15,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0,
"solder_mask_to_copper_clearance": 0.005,
@ -192,7 +201,7 @@
"drill": 0.2
}
],
"zones_allow_external_fillets": false,
"zones_allow_external_fillets": true,
"zones_use_no_outline": true
},
"layer_presets": [],