Atmel ATSAM3S4B SAM3S 0 Atmel ATSAM3S4B Microcontroller CM3 r2p0 selectable true false 4 false 8 32 HSMCI 6449K High Speed MultiMedia Card Interface HSMCI_ 0x40000000 0 0x4000 registers HSMCI 18 CR Control Register 0x00000000 32 write-only MCIEN Multi-Media Interface Enable 0 1 write-only MCIDIS Multi-Media Interface Disable 1 1 write-only PWSEN Power Save Mode Enable 2 1 write-only PWSDIS Power Save Mode Disable 3 1 write-only SWRST Software Reset 7 1 write-only MR Mode Register 0x00000004 32 read-write 0x00000000 CLKDIV Clock Divider 0 8 read-write PWSDIV Power Saving Divider 8 3 read-write RDPROOF Read Proof Enable 11 1 read-write WRPROOF Write Proof Enable 12 1 read-write FBYTE Force Byte Transfer 13 1 read-write PADV Padding Value 14 1 read-write PDCMODE PDC-oriented Mode 15 1 read-write DTOR Data Timeout Register 0x00000008 32 read-write 0x00000000 DTOCYC Data Timeout Cycle Number 0 4 read-write DTOMUL Data Timeout Multiplier 4 3 read-write 1 DTOCYC 0x0 16 DTOCYC x 16 0x1 128 DTOCYC x 128 0x2 256 DTOCYC x 256 0x3 1024 DTOCYC x 1024 0x4 4096 DTOCYC x 4096 0x5 65536 DTOCYC x 65536 0x6 1048576 DTOCYC x 1048576 0x7 SDCR SD/SDIO Card Register 0x0000000C 32 read-write 0x00000000 SDCSEL SDCard/SDIO Slot 0 2 read-write SLOTA Slot A is selected. 0x0 SLOTB - 0x1 SLOTC - 0x2 SLOTD - 0x3 SDCBUS SDCard/SDIO Bus Width 6 2 read-write 1 1 bit 0x0 4 4 bit 0x2 8 8 bit 0x3 ARGR Argument Register 0x00000010 32 read-write 0x00000000 ARG Command Argument 0 32 read-write CMDR Command Register 0x00000014 32 write-only CMDNB Command Number 0 6 write-only RSPTYP Response Type 6 2 write-only NORESP No response. 0x0 48_BIT 48-bit response. 0x1 136_BIT 136-bit response. 0x2 R1B R1b response type 0x3 SPCMD Special Command 8 3 write-only STD Not a special CMD. 0x0 INIT Initialization CMD: 74 clock cycles for initialization sequence. 0x1 SYNC Synchronized CMD: Wait for the end of the current data block transfer before sending the pending command. 0x2 CE_ATA CE-ATA Completion Signal disable Command. The host cancels the ability for the device to return a command completion signal on the command line. 0x3 IT_CMD Interrupt command: Corresponds to the Interrupt Mode (CMD40). 0x4 IT_RESP Interrupt response: Corresponds to the Interrupt Mode (CMD40). 0x5 BOR Boot Operation Request. Start a boot operation mode, the host processor can read boot data from the MMC device directly. 0x6 EBO End Boot Operation. This command allows the host processor to terminate the boot operation mode. 0x7 OPDCMD Open Drain Command 11 1 write-only PUSHPULL Push pull command. 0 OPENDRAIN Open drain command. 1 MAXLAT Max Latency for Command to Response 12 1 write-only 5 5-cycle max latency. 0 64 64-cycle max latency. 1 TRCMD Transfer Command 16 2 write-only NO_DATA No data transfer 0x0 START_DATA Start data transfer 0x1 STOP_DATA Stop data transfer 0x2 TRDIR Transfer Direction 18 1 write-only WRITE Write. 0 READ Read. 1 TRTYP Transfer Type 19 3 write-only SINGLE MMC/SD Card Single Block 0x0 MULTIPLE MMC/SD Card Multiple Block 0x1 STREAM MMC Stream 0x2 BYTE SDIO Byte 0x4 BLOCK SDIO Block 0x5 IOSPCMD SDIO Special Command 24 2 write-only STD Not an SDIO Special Command 0x0 SUSPEND SDIO Suspend Command 0x1 RESUME SDIO Resume Command 0x2 ATACS ATA with Command Completion Signal 26 1 write-only NORMAL Normal operation mode. 0 COMPLETION This bit indicates that a completion signal is expected within a programmed amount of time (HSMCI_CSTOR). 1 BOOT_ACK Boot Operation Acknowledge. 27 1 write-only BLKR Block Register 0x00000018 32 read-write 0x00000000 BCNT MMC/SDIO Block Count - SDIO Byte Count 0 16 read-write BLKLEN Data Block Length 16 16 read-write CSTOR Completion Signal Timeout Register 0x0000001C 32 read-write 0x00000000 CSTOCYC Completion Signal Timeout Cycle Number 0 4 read-write CSTOMUL Completion Signal Timeout Multiplier 4 3 read-write 1 CSTOCYC x 1 0x0 16 CSTOCYC x 16 0x1 128 CSTOCYC x 128 0x2 256 CSTOCYC x 256 0x3 1024 CSTOCYC x 1024 0x4 4096 CSTOCYC x 4096 0x5 65536 CSTOCYC x 65536 0x6 1048576 CSTOCYC x 1048576 0x7 4 4 0-3 RSPR[%s] Response Register 0x00000020 32 read-only RSP Response 0 32 read-only RDR Receive Data Register 0x00000030 32 read-only 0x00000000 DATA Data to Read 0 32 read-only TDR Transmit Data Register 0x00000034 32 write-only DATA Data to Write 0 32 write-only SR Status Register 0x00000040 32 read-only 0x0000C0E5 CMDRDY Command Ready 0 1 read-only RXRDY Receiver Ready 1 1 read-only TXRDY Transmit Ready 2 1 read-only BLKE Data Block Ended 3 1 read-only DTIP Data Transfer in Progress 4 1 read-only NOTBUSY HSMCI Not Busy 5 1 read-only ENDRX End of RX Buffer 6 1 read-only ENDTX End of TX Buffer 7 1 read-only SDIOIRQA SDIO Interrupt for Slot A 8 1 read-only SDIOWAIT SDIO Read Wait Operation Status 12 1 read-only CSRCV CE-ATA Completion Signal Received 13 1 read-only RXBUFF RX Buffer Full 14 1 read-only TXBUFE TX Buffer Empty 15 1 read-only RINDE Response Index Error 16 1 read-only RDIRE Response Direction Error 17 1 read-only RCRCE Response CRC Error 18 1 read-only RENDE Response End Bit Error 19 1 read-only RTOE Response Time-out Error 20 1 read-only DCRCE Data CRC Error 21 1 read-only DTOE Data Time-out Error 22 1 read-only CSTOE Completion Signal Time-out Error 23 1 read-only FIFOEMPTY FIFO empty flag 26 1 read-only XFRDONE Transfer Done flag 27 1 read-only ACKRCV Boot Operation Acknowledge Received 28 1 read-only ACKRCVE Boot Operation Acknowledge Error 29 1 read-only OVRE Overrun 30 1 read-only UNRE Underrun 31 1 read-only IER Interrupt Enable Register 0x00000044 32 write-only CMDRDY Command Ready Interrupt Enable 0 1 write-only RXRDY Receiver Ready Interrupt Enable 1 1 write-only TXRDY Transmit Ready Interrupt Enable 2 1 write-only BLKE Data Block Ended Interrupt Enable 3 1 write-only DTIP Data Transfer in Progress Interrupt Enable 4 1 write-only NOTBUSY Data Not Busy Interrupt Enable 5 1 write-only ENDRX End of Receive Buffer Interrupt Enable 6 1 write-only ENDTX End of Transmit Buffer Interrupt Enable 7 1 write-only SDIOIRQA SDIO Interrupt for Slot A Interrupt Enable 8 1 write-only SDIOWAIT SDIO Read Wait Operation Status Interrupt Enable 12 1 write-only CSRCV Completion Signal Received Interrupt Enable 13 1 write-only RXBUFF Receive Buffer Full Interrupt Enable 14 1 write-only TXBUFE Transmit Buffer Empty Interrupt Enable 15 1 write-only RINDE Response Index Error Interrupt Enable 16 1 write-only RDIRE Response Direction Error Interrupt Enable 17 1 write-only RCRCE Response CRC Error Interrupt Enable 18 1 write-only RENDE Response End Bit Error Interrupt Enable 19 1 write-only RTOE Response Time-out Error Interrupt Enable 20 1 write-only DCRCE Data CRC Error Interrupt Enable 21 1 write-only DTOE Data Time-out Error Interrupt Enable 22 1 write-only CSTOE Completion Signal Timeout Error Interrupt Enable 23 1 write-only FIFOEMPTY FIFO empty Interrupt enable 26 1 write-only XFRDONE Transfer Done Interrupt enable 27 1 write-only ACKRCV Boot Acknowledge Interrupt Enable 28 1 write-only ACKRCVE Boot Acknowledge Error Interrupt Enable 29 1 write-only OVRE Overrun Interrupt Enable 30 1 write-only UNRE Underrun Interrupt Enable 31 1 write-only IDR Interrupt Disable Register 0x00000048 32 write-only CMDRDY Command Ready Interrupt Disable 0 1 write-only RXRDY Receiver Ready Interrupt Disable 1 1 write-only TXRDY Transmit Ready Interrupt Disable 2 1 write-only BLKE Data Block Ended Interrupt Disable 3 1 write-only DTIP Data Transfer in Progress Interrupt Disable 4 1 write-only NOTBUSY Data Not Busy Interrupt Disable 5 1 write-only ENDRX End of Receive Buffer Interrupt Disable 6 1 write-only ENDTX End of Transmit Buffer Interrupt Disable 7 1 write-only SDIOIRQA SDIO Interrupt for Slot A Interrupt Disable 8 1 write-only SDIOWAIT SDIO Read Wait Operation Status Interrupt Disable 12 1 write-only CSRCV Completion Signal received interrupt Disable 13 1 write-only RXBUFF Receive Buffer Full Interrupt Disable 14 1 write-only TXBUFE Transmit Buffer Empty Interrupt Disable 15 1 write-only RINDE Response Index Error Interrupt Disable 16 1 write-only RDIRE Response Direction Error Interrupt Disable 17 1 write-only RCRCE Response CRC Error Interrupt Disable 18 1 write-only RENDE Response End Bit Error Interrupt Disable 19 1 write-only RTOE Response Time-out Error Interrupt Disable 20 1 write-only DCRCE Data CRC Error Interrupt Disable 21 1 write-only DTOE Data Time-out Error Interrupt Disable 22 1 write-only CSTOE Completion Signal Time out Error Interrupt Disable 23 1 write-only FIFOEMPTY FIFO empty Interrupt Disable 26 1 write-only XFRDONE Transfer Done Interrupt Disable 27 1 write-only ACKRCV Boot Acknowledge Interrupt Disable 28 1 write-only ACKRCVE Boot Acknowledge Error Interrupt Disable 29 1 write-only OVRE Overrun Interrupt Disable 30 1 write-only UNRE Underrun Interrupt Disable 31 1 write-only IMR Interrupt Mask Register 0x0000004C 32 read-only 0x00000000 CMDRDY Command Ready Interrupt Mask 0 1 read-only RXRDY Receiver Ready Interrupt Mask 1 1 read-only TXRDY Transmit Ready Interrupt Mask 2 1 read-only BLKE Data Block Ended Interrupt Mask 3 1 read-only DTIP Data Transfer in Progress Interrupt Mask 4 1 read-only NOTBUSY Data Not Busy Interrupt Mask 5 1 read-only ENDRX End of Receive Buffer Interrupt Mask 6 1 read-only ENDTX End of Transmit Buffer Interrupt Mask 7 1 read-only SDIOIRQA SDIO Interrupt for Slot A Interrupt Mask 8 1 read-only SDIOWAIT SDIO Read Wait Operation Status Interrupt Mask 12 1 read-only CSRCV Completion Signal Received Interrupt Mask 13 1 read-only RXBUFF Receive Buffer Full Interrupt Mask 14 1 read-only TXBUFE Transmit Buffer Empty Interrupt Mask 15 1 read-only RINDE Response Index Error Interrupt Mask 16 1 read-only RDIRE Response Direction Error Interrupt Mask 17 1 read-only RCRCE Response CRC Error Interrupt Mask 18 1 read-only RENDE Response End Bit Error Interrupt Mask 19 1 read-only RTOE Response Time-out Error Interrupt Mask 20 1 read-only DCRCE Data CRC Error Interrupt Mask 21 1 read-only DTOE Data Time-out Error Interrupt Mask 22 1 read-only CSTOE Completion Signal Time-out Error Interrupt Mask 23 1 read-only FIFOEMPTY FIFO Empty Interrupt Mask 26 1 read-only XFRDONE Transfer Done Interrupt Mask 27 1 read-only ACKRCV Boot Operation Acknowledge Received Interrupt Mask 28 1 read-only ACKRCVE Boot Operation Acknowledge Error Interrupt Mask 29 1 read-only OVRE Overrun Interrupt Mask 30 1 read-only UNRE Underrun Interrupt Mask 31 1 read-only CFG Configuration Register 0x00000054 32 read-write 0x00000000 FIFOMODE HSMCI Internal FIFO control mode 0 1 read-write FERRCTRL Flow Error flag reset control mode 4 1 read-write HSMODE High Speed Mode 8 1 read-write LSYNC Synchronize on the last block 12 1 read-write WPMR Write Protection Mode Register 0x000000E4 32 read-write WP_EN Write Protection Enable 0 1 read-write WP_KEY Write Protection Key password 8 24 read-write WPSR Write Protection Status Register 0x000000E8 32 read-only WP_VS Write Protection Violation Status 0 4 read-only NONE No Write Protection Violation occurred since the last read of this register (WP_SR) 0x0 WRITE Write Protection detected unauthorized attempt to write a control register had occurred (since the last read.) 0x1 RESET Software reset had been performed while Write Protection was enabled (since the last read). 0x2 BOTH Both Write Protection violation and software reset with Write Protection enabled have occurred since the last read. 0x3 WP_VSRC Write Protection Violation SouRCe 8 16 read-only 256 4 0-255 FIFO[%s] FIFO Memory Aperture0 0x00000200 32 read-write RPR Receive Pointer Register 0x00000100 32 read-write 0x00000000 RXPTR Receive Pointer Register 0 32 read-write RCR Receive Counter Register 0x00000104 32 read-write 0x00000000 RXCTR Receive Counter Register 0 16 read-write TPR Transmit Pointer Register 0x00000108 32 read-write 0x00000000 TXPTR Transmit Counter Register 0 32 read-write TCR Transmit Counter Register 0x0000010C 32 read-write 0x00000000 TXCTR Transmit Counter Register 0 16 read-write RNPR Receive Next Pointer Register 0x00000110 32 read-write 0x00000000 RXNPTR Receive Next Pointer 0 32 read-write RNCR Receive Next Counter Register 0x00000114 32 read-write 0x00000000 RXNCTR Receive Next Counter 0 16 read-write TNPR Transmit Next Pointer Register 0x00000118 32 read-write 0x00000000 TXNPTR Transmit Next Pointer 0 32 read-write TNCR Transmit Next Counter Register 0x0000011C 32 read-write 0x00000000 TXNCTR Transmit Counter Next 0 16 read-write PTCR Transfer Control Register 0x00000120 32 write-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 write-only RXTDIS Receiver Transfer Disable 1 1 write-only TXTEN Transmitter Transfer Enable 8 1 write-only TXTDIS Transmitter Transfer Disable 9 1 write-only PTSR Transfer Status Register 0x00000124 32 read-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 read-only TXTEN Transmitter Transfer Enable 8 1 read-only SSC 6078M Synchronous Serial Controller SSC_ 0x40004000 0 0x4000 registers SSC 22 CR Control Register 0x00000000 32 write-only RXEN Receive Enable 0 1 write-only RXDIS Receive Disable 1 1 write-only TXEN Transmit Enable 8 1 write-only TXDIS Transmit Disable 9 1 write-only SWRST Software Reset 15 1 write-only CMR Clock Mode Register 0x00000004 32 read-write 0x00000000 DIV Clock Divider 0 12 read-write RCMR Receive Clock Mode Register 0x00000010 32 read-write 0x00000000 CKS Receive Clock Selection 0 2 read-write MCK Divided Clock 0x0 TK TK Clock signal 0x1 RK RK pin 0x2 CKO Receive Clock Output Mode Selection 2 3 read-write NONE None, RK pin is an input 0x0 CONTINUOUS Continuous Receive Clock, RK pin is an output 0x1 TRANSFER Receive Clock only during data transfers, RK pin is an output 0x2 CKI Receive Clock Inversion 5 1 read-write CKG Receive Clock Gating Selection 6 2 read-write CONTINUOUS None 0x0 EN_RF_LOW Receive Clock enabled only if RF Low 0x1 EN_RF_HIGH Receive Clock enabled only if RF High 0x2 START Receive Start Selection 8 4 read-write CONTINUOUS Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data. 0x0 TRANSMIT Transmit start 0x1 RF_LOW Detection of a low level on RF signal 0x2 RF_HIGH Detection of a high level on RF signal 0x3 RF_FALLING Detection of a falling edge on RF signal 0x4 RF_RISING Detection of a rising edge on RF signal 0x5 RF_LEVEL Detection of any level change on RF signal 0x6 RF_EDGE Detection of any edge on RF signal 0x7 CMP_0 Compare 0 0x8 STOP Receive Stop Selection 12 1 read-write STTDLY Receive Start Delay 16 8 read-write PERIOD Receive Period Divider Selection 24 8 read-write RFMR Receive Frame Mode Register 0x00000014 32 read-write 0x00000000 DATLEN Data Length 0 5 read-write LOOP Loop Mode 5 1 read-write MSBF Most Significant Bit First 7 1 read-write DATNB Data Number per Frame 8 4 read-write FSLEN Receive Frame Sync Length 16 4 read-write FSOS Receive Frame Sync Output Selection 20 3 read-write NONE None, RF pin is an input 0x0 NEGATIVE Negative Pulse, RF pin is an output 0x1 POSITIVE Positive Pulse, RF pin is an output 0x2 LOW Driven Low during data transfer, RF pin is an output 0x3 HIGH Driven High during data transfer, RF pin is an output 0x4 TOGGLING Toggling at each start of data transfer, RF pin is an output 0x5 FSEDGE Frame Sync Edge Detection 24 1 read-write POSITIVE Positive Edge Detection 0 NEGATIVE Negative Edge Detection 1 FSLEN_EXT FSLEN Field Extension 28 4 read-write TCMR Transmit Clock Mode Register 0x00000018 32 read-write 0x00000000 CKS Transmit Clock Selection 0 2 read-write MCK Divided Clock 0x0 RK RK Clock signal 0x1 TK TK pin 0x2 CKO Transmit Clock Output Mode Selection 2 3 read-write NONE None, TK pin is an input 0x0 CONTINUOUS Continuous Transmit Clock, TK pin is an output 0x1 TRANSFER Transmit Clock only during data transfers, TK pin is an output 0x2 CKI Transmit Clock Inversion 5 1 read-write CKG Transmit Clock Gating Selection 6 2 read-write CONTINUOUS None 0x0 EN_TF_LOW Transmit Clock enabled only if TF Low 0x1 EN_TF_HIGH Transmit Clock enabled only if TF High 0x2 START Transmit Start Selection 8 4 read-write CONTINUOUS Continuous, as soon as a word is written in the SSC_THR Register (if Transmit is enabled), and immediately after the end of transfer of the previous data 0x0 RECEIVE Receive start 0x1 TF_LOW Detection of a low level on TF signal 0x2 TF_HIGH Detection of a high level on TF signal 0x3 TF_FALLING Detection of a falling edge on TF signal 0x4 TF_RISING Detection of a rising edge on TF signal 0x5 TF_LEVEL Detection of any level change on TF signal 0x6 TF_EDGE Detection of any edge on TF signal 0x7 STTDLY Transmit Start Delay 16 8 read-write PERIOD Transmit Period Divider Selection 24 8 read-write TFMR Transmit Frame Mode Register 0x0000001C 32 read-write 0x00000000 DATLEN Data Length 0 5 read-write DATDEF Data Default Value 5 1 read-write MSBF Most Significant Bit First 7 1 read-write DATNB Data Number per frame 8 4 read-write FSLEN Transmit Frame Sync Length 16 4 read-write FSOS Transmit Frame Sync Output Selection 20 3 read-write NONE None, RF pin is an input 0x0 NEGATIVE Negative Pulse, RF pin is an output 0x1 POSITIVE Positive Pulse, RF pin is an output 0x2 LOW Driven Low during data transfer 0x3 HIGH Driven High during data transfer 0x4 TOGGLING Toggling at each start of data transfer 0x5 FSDEN Frame Sync Data Enable 23 1 read-write FSEDGE Frame Sync Edge Detection 24 1 read-write POSITIVE Positive Edge Detection 0 NEGATIVE Negative Edge Detection 1 FSLEN_EXT FSLEN Field Extension 28 4 read-write RHR Receive Holding Register 0x00000020 32 read-only 0x00000000 RDAT Receive Data 0 32 read-only THR Transmit Holding Register 0x00000024 32 write-only TDAT Transmit Data 0 32 write-only RSHR Receive Sync. Holding Register 0x00000030 32 read-only 0x00000000 RSDAT Receive Synchronization Data 0 16 read-only TSHR Transmit Sync. Holding Register 0x00000034 32 read-write 0x00000000 TSDAT Transmit Synchronization Data 0 16 read-write RC0R Receive Compare 0 Register 0x00000038 32 read-write 0x00000000 CP0 Receive Compare Data 0 0 16 read-write RC1R Receive Compare 1 Register 0x0000003C 32 read-write 0x00000000 CP1 Receive Compare Data 1 0 16 read-write SR Status Register 0x00000040 32 read-only 0x000000CC TXRDY Transmit Ready 0 1 read-only TXEMPTY Transmit Empty 1 1 read-only ENDTX End of Transmission 2 1 read-only TXBUFE 3 1 read-only RXRDY Receive Ready 4 1 read-only OVRUN Receive Overrun 5 1 read-only ENDRX End of Reception 6 1 read-only RXBUFF 7 1 read-only CP0 Compare 0 8 1 read-only CP1 Compare 1 9 1 read-only TXSYN Transmit Sync 10 1 read-only RXSYN Receive Sync 11 1 read-only TXEN Transmit Enable 16 1 read-only RXEN Receive Enable 17 1 read-only IER Interrupt Enable Register 0x00000044 32 write-only TXRDY Transmit Ready Interrupt Enable 0 1 write-only TXEMPTY Transmit Empty Interrupt Enable 1 1 write-only ENDTX End of Transmission Interrupt Enable 2 1 write-only TXBUFE 3 1 write-only RXRDY Receive Ready Interrupt Enable 4 1 write-only OVRUN Receive Overrun Interrupt Enable 5 1 write-only ENDRX End of Reception Interrupt Enable 6 1 write-only RXBUFF 7 1 write-only CP0 Compare 0 Interrupt Enable 8 1 write-only CP1 Compare 1 Interrupt Enable 9 1 write-only TXSYN Tx Sync Interrupt Enable 10 1 write-only RXSYN Rx Sync Interrupt Enable 11 1 write-only IDR Interrupt Disable Register 0x00000048 32 write-only TXRDY Transmit Ready Interrupt Disable 0 1 write-only TXEMPTY Transmit Empty Interrupt Disable 1 1 write-only ENDTX End of Transmission Interrupt Disable 2 1 write-only TXBUFE 3 1 write-only RXRDY Receive Ready Interrupt Disable 4 1 write-only OVRUN Receive Overrun Interrupt Disable 5 1 write-only ENDRX End of Reception Interrupt Disable 6 1 write-only RXBUFF 7 1 write-only CP0 Compare 0 Interrupt Disable 8 1 write-only CP1 Compare 1 Interrupt Disable 9 1 write-only TXSYN Tx Sync Interrupt Enable 10 1 write-only RXSYN Rx Sync Interrupt Enable 11 1 write-only IMR Interrupt Mask Register 0x0000004C 32 read-only 0x00000000 TXRDY Transmit Ready Interrupt Mask 0 1 read-only TXEMPTY Transmit Empty Interrupt Mask 1 1 read-only ENDTX End of Transmission Interrupt Mask 2 1 read-only TXBUFE 3 1 read-only RXRDY Receive Ready Interrupt Mask 4 1 read-only OVRUN Receive Overrun Interrupt Mask 5 1 read-only ENDRX End of Reception Interrupt Mask 6 1 read-only RXBUFF 7 1 read-only CP0 Compare 0 Interrupt Mask 8 1 read-only CP1 Compare 1 Interrupt Mask 9 1 read-only TXSYN Tx Sync Interrupt Mask 10 1 read-only RXSYN Rx Sync Interrupt Mask 11 1 read-only WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write PASSWD Writing any other value in this field aborts the write operation of the WPEN bit.Always reads as 0. 0x535343 WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 RPR Receive Pointer Register 0x00000100 32 read-write 0x00000000 RXPTR Receive Pointer Register 0 32 read-write RCR Receive Counter Register 0x00000104 32 read-write 0x00000000 RXCTR Receive Counter Register 0 16 read-write TPR Transmit Pointer Register 0x00000108 32 read-write 0x00000000 TXPTR Transmit Counter Register 0 32 read-write TCR Transmit Counter Register 0x0000010C 32 read-write 0x00000000 TXCTR Transmit Counter Register 0 16 read-write RNPR Receive Next Pointer Register 0x00000110 32 read-write 0x00000000 RXNPTR Receive Next Pointer 0 32 read-write RNCR Receive Next Counter Register 0x00000114 32 read-write 0x00000000 RXNCTR Receive Next Counter 0 16 read-write TNPR Transmit Next Pointer Register 0x00000118 32 read-write 0x00000000 TXNPTR Transmit Next Pointer 0 32 read-write TNCR Transmit Next Counter Register 0x0000011C 32 read-write 0x00000000 TXNCTR Transmit Counter Next 0 16 read-write PTCR Transfer Control Register 0x00000120 32 write-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 write-only RXTDIS Receiver Transfer Disable 1 1 write-only TXTEN Transmitter Transfer Enable 8 1 write-only TXTDIS Transmitter Transfer Disable 9 1 write-only PTSR Transfer Status Register 0x00000124 32 read-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 read-only TXTEN Transmitter Transfer Enable 8 1 read-only SPI 6088W Serial Peripheral Interface SPI_ 0x40008000 0 0x4000 registers SPI 21 CR Control Register 0x00000000 32 write-only SPIEN SPI Enable 0 1 write-only SPIDIS SPI Disable 1 1 write-only SWRST SPI Software Reset 7 1 write-only LASTXFER Last Transfer 24 1 write-only MR Mode Register 0x00000004 32 read-write 0x00000000 MSTR Master/Slave Mode 0 1 read-write PS Peripheral Select 1 1 read-write PCSDEC Chip Select Decode 2 1 read-write MODFDIS Mode Fault Detection 4 1 read-write WDRBT Wait Data Read Before Transfer 5 1 read-write LLB Local Loopback Enable 7 1 read-write PCS Peripheral Chip Select 16 4 read-write DLYBCS Delay Between Chip Selects 24 8 read-write RDR Receive Data Register 0x00000008 32 read-only 0x00000000 RD Receive Data 0 16 read-only PCS Peripheral Chip Select 16 4 read-only TDR Transmit Data Register 0x0000000C 32 write-only TD Transmit Data 0 16 write-only PCS Peripheral Chip Select 16 4 write-only LASTXFER Last Transfer 24 1 write-only SR Status Register 0x00000010 32 read-only 0x000000F0 RDRF Receive Data Register Full 0 1 read-only TDRE Transmit Data Register Empty 1 1 read-only MODF Mode Fault Error 2 1 read-only OVRES Overrun Error Status 3 1 read-only ENDRX End of RX buffer 4 1 read-only ENDTX End of TX buffer 5 1 read-only RXBUFF RX Buffer Full 6 1 read-only TXBUFE TX Buffer Empty 7 1 read-only NSSR NSS Rising 8 1 read-only TXEMPTY Transmission Registers Empty 9 1 read-only UNDES Underrun Error Status (Slave Mode Only) 10 1 read-only SPIENS SPI Enable Status 16 1 read-only IER Interrupt Enable Register 0x00000014 32 write-only RDRF Receive Data Register Full Interrupt Enable 0 1 write-only TDRE SPI Transmit Data Register Empty Interrupt Enable 1 1 write-only MODF Mode Fault Error Interrupt Enable 2 1 write-only OVRES Overrun Error Interrupt Enable 3 1 write-only ENDRX End of Receive Buffer Interrupt Enable 4 1 write-only ENDTX End of Transmit Buffer Interrupt Enable 5 1 write-only RXBUFF Receive Buffer Full Interrupt Enable 6 1 write-only TXBUFE Transmit Buffer Empty Interrupt Enable 7 1 write-only NSSR NSS Rising Interrupt Enable 8 1 write-only TXEMPTY Transmission Registers Empty Enable 9 1 write-only UNDES Underrun Error Interrupt Enable 10 1 write-only IDR Interrupt Disable Register 0x00000018 32 write-only RDRF Receive Data Register Full Interrupt Disable 0 1 write-only TDRE SPI Transmit Data Register Empty Interrupt Disable 1 1 write-only MODF Mode Fault Error Interrupt Disable 2 1 write-only OVRES Overrun Error Interrupt Disable 3 1 write-only ENDRX End of Receive Buffer Interrupt Disable 4 1 write-only ENDTX End of Transmit Buffer Interrupt Disable 5 1 write-only RXBUFF Receive Buffer Full Interrupt Disable 6 1 write-only TXBUFE Transmit Buffer Empty Interrupt Disable 7 1 write-only NSSR NSS Rising Interrupt Disable 8 1 write-only TXEMPTY Transmission Registers Empty Disable 9 1 write-only UNDES Underrun Error Interrupt Disable 10 1 write-only IMR Interrupt Mask Register 0x0000001C 32 read-only 0x00000000 RDRF Receive Data Register Full Interrupt Mask 0 1 read-only TDRE SPI Transmit Data Register Empty Interrupt Mask 1 1 read-only MODF Mode Fault Error Interrupt Mask 2 1 read-only OVRES Overrun Error Interrupt Mask 3 1 read-only ENDRX End of Receive Buffer Interrupt Mask 4 1 read-only ENDTX End of Transmit Buffer Interrupt Mask 5 1 read-only RXBUFF Receive Buffer Full Interrupt Mask 6 1 read-only TXBUFE Transmit Buffer Empty Interrupt Mask 7 1 read-only NSSR NSS Rising Interrupt Mask 8 1 read-only TXEMPTY Transmission Registers Empty Mask 9 1 read-only UNDES Underrun Error Interrupt Mask 10 1 read-only 4 4 0-3 CSR[%s] Chip Select Register 0x00000030 32 read-write CPOL Clock Polarity 0 1 read-write NCPHA Clock Phase 1 1 read-write CSNAAT Chip Select Not Active After Transfer (Ignored if CSAAT = 1) 2 1 read-write CSAAT Chip Select Active After Transfer 3 1 read-write BITS Bits Per Transfer 4 4 read-write 8_BIT 8 bits for transfer 0x0 9_BIT 9 bits for transfer 0x1 10_BIT 10 bits for transfer 0x2 11_BIT 11 bits for transfer 0x3 12_BIT 12 bits for transfer 0x4 13_BIT 13 bits for transfer 0x5 14_BIT 14 bits for transfer 0x6 15_BIT 15 bits for transfer 0x7 16_BIT 16 bits for transfer 0x8 SCBR Serial Clock Baud Rate 8 8 read-write DLYBS Delay Before SPCK 16 8 read-write DLYBCT Delay Between Consecutive Transfers 24 8 read-write WPMR Write Protection Control Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect Key 8 24 read-write PASSWD Writing any other value in this field aborts the write operation of the WPEN bit.Always reads as 0. 0x535049 WPSR Write Protection Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protection Violation Status 0 1 read-only WPVSRC Write Protection Violation Source 8 8 read-only RPR Receive Pointer Register 0x00000100 32 read-write 0x00000000 RXPTR Receive Pointer Register 0 32 read-write RCR Receive Counter Register 0x00000104 32 read-write 0x00000000 RXCTR Receive Counter Register 0 16 read-write TPR Transmit Pointer Register 0x00000108 32 read-write 0x00000000 TXPTR Transmit Counter Register 0 32 read-write TCR Transmit Counter Register 0x0000010C 32 read-write 0x00000000 TXCTR Transmit Counter Register 0 16 read-write RNPR Receive Next Pointer Register 0x00000110 32 read-write 0x00000000 RXNPTR Receive Next Pointer 0 32 read-write RNCR Receive Next Counter Register 0x00000114 32 read-write 0x00000000 RXNCTR Receive Next Counter 0 16 read-write TNPR Transmit Next Pointer Register 0x00000118 32 read-write 0x00000000 TXNPTR Transmit Next Pointer 0 32 read-write TNCR Transmit Next Counter Register 0x0000011C 32 read-write 0x00000000 TXNCTR Transmit Counter Next 0 16 read-write PTCR Transfer Control Register 0x00000120 32 write-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 write-only RXTDIS Receiver Transfer Disable 1 1 write-only TXTEN Transmitter Transfer Enable 8 1 write-only TXTDIS Transmitter Transfer Disable 9 1 write-only PTSR Transfer Status Register 0x00000124 32 read-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 read-only TXTEN Transmitter Transfer Enable 8 1 read-only TC0 6082R Timer Counter 0 TC TC0_ 0x40010000 0 0x4000 registers TC0 23 TC1 24 TC2 25 CCR0 Channel Control Register (channel = 0) 0x00000000 32 write-only CLKEN Counter Clock Enable Command 0 1 write-only CLKDIS Counter Clock Disable Command 1 1 write-only SWTRG Software Trigger Command 2 1 write-only CMR0 Channel Mode Register (channel = 0) 0x00000004 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 LDBSTOP Counter Clock Stopped with RB Loading 6 1 read-write LDBDIS Counter Clock Disable with RB Loading 7 1 read-write ETRGEDG External Trigger Edge Selection 8 2 read-write NONE The clock is not gated by an external signal. 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 ABETRG TIOA or TIOB External Trigger Selection 10 1 read-write CPCTRG RC Compare Trigger Enable 14 1 read-write WAVE Waveform Mode 15 1 read-write LDRA RA Loading Edge Selection 16 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 LDRB RB Loading Edge Selection 18 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 CMR0_WAVE_EQ_1 Channel Mode Register (channel = 0) WAVE_EQ_1 0x00000004 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 CPCSTOP Counter Clock Stopped with RC Compare 6 1 read-write CPCDIS Counter Clock Disable with RC Compare 7 1 read-write EEVTEDG External Event Edge Selection 8 2 read-write NONE None 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 EEVT External Event Selection 10 2 read-write TIOB TIOB 0x0 XC0 XC0 0x1 XC1 XC1 0x2 XC2 XC2 0x3 ENETRG External Event Trigger Enable 12 1 read-write WAVSEL Waveform Selection 13 2 read-write UP UP mode without automatic trigger on RC Compare 0x0 UPDOWN UPDOWN mode without automatic trigger on RC Compare 0x1 UP_RC UP mode with automatic trigger on RC Compare 0x2 UPDOWN_RC UPDOWN mode with automatic trigger on RC Compare 0x3 WAVE Waveform Mode 15 1 read-write ACPA RA Compare Effect on TIOA 16 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ACPC RC Compare Effect on TIOA 18 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 AEEVT External Event Effect on TIOA 20 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ASWTRG Software Trigger Effect on TIOA 22 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPB RB Compare Effect on TIOB 24 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPC RC Compare Effect on TIOB 26 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BEEVT External Event Effect on TIOB 28 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BSWTRG Software Trigger Effect on TIOB 30 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 SMMR0 Stepper Motor Mode Register (channel = 0) 0x00000008 32 read-write 0x00000000 GCEN Gray Count Enable 0 1 read-write DOWN DOWN Count 1 1 read-write CV0 Counter Value (channel = 0) 0x00000010 32 read-only 0x00000000 CV Counter Value 0 32 read-only RA0 Register A (channel = 0) 0x00000014 32 read-write 0x00000000 RA Register A 0 32 read-write RB0 Register B (channel = 0) 0x00000018 32 read-write 0x00000000 RB Register B 0 32 read-write RC0 Register C (channel = 0) 0x0000001C 32 read-write 0x00000000 RC Register C 0 32 read-write SR0 Status Register (channel = 0) 0x00000020 32 read-only 0x00000000 COVFS Counter Overflow Status 0 1 read-only LOVRS Load Overrun Status 1 1 read-only CPAS RA Compare Status 2 1 read-only CPBS RB Compare Status 3 1 read-only CPCS RC Compare Status 4 1 read-only LDRAS RA Loading Status 5 1 read-only LDRBS RB Loading Status 6 1 read-only ETRGS External Trigger Status 7 1 read-only CLKSTA Clock Enabling Status 16 1 read-only MTIOA TIOA Mirror 17 1 read-only MTIOB TIOB Mirror 18 1 read-only IER0 Interrupt Enable Register (channel = 0) 0x00000024 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IDR0 Interrupt Disable Register (channel = 0) 0x00000028 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IMR0 Interrupt Mask Register (channel = 0) 0x0000002C 32 read-only 0x00000000 COVFS Counter Overflow 0 1 read-only LOVRS Load Overrun 1 1 read-only CPAS RA Compare 2 1 read-only CPBS RB Compare 3 1 read-only CPCS RC Compare 4 1 read-only LDRAS RA Loading 5 1 read-only LDRBS RB Loading 6 1 read-only ETRGS External Trigger 7 1 read-only CCR1 Channel Control Register (channel = 1) 0x00000040 32 write-only CLKEN Counter Clock Enable Command 0 1 write-only CLKDIS Counter Clock Disable Command 1 1 write-only SWTRG Software Trigger Command 2 1 write-only CMR1 Channel Mode Register (channel = 1) 0x00000044 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 LDBSTOP Counter Clock Stopped with RB Loading 6 1 read-write LDBDIS Counter Clock Disable with RB Loading 7 1 read-write ETRGEDG External Trigger Edge Selection 8 2 read-write NONE The clock is not gated by an external signal. 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 ABETRG TIOA or TIOB External Trigger Selection 10 1 read-write CPCTRG RC Compare Trigger Enable 14 1 read-write WAVE Waveform Mode 15 1 read-write LDRA RA Loading Edge Selection 16 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 LDRB RB Loading Edge Selection 18 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 CMR1_WAVE_EQ_1 Channel Mode Register (channel = 1) WAVE_EQ_1 0x00000044 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 CPCSTOP Counter Clock Stopped with RC Compare 6 1 read-write CPCDIS Counter Clock Disable with RC Compare 7 1 read-write EEVTEDG External Event Edge Selection 8 2 read-write NONE None 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 EEVT External Event Selection 10 2 read-write TIOB TIOB 0x0 XC0 XC0 0x1 XC1 XC1 0x2 XC2 XC2 0x3 ENETRG External Event Trigger Enable 12 1 read-write WAVSEL Waveform Selection 13 2 read-write UP UP mode without automatic trigger on RC Compare 0x0 UPDOWN UPDOWN mode without automatic trigger on RC Compare 0x1 UP_RC UP mode with automatic trigger on RC Compare 0x2 UPDOWN_RC UPDOWN mode with automatic trigger on RC Compare 0x3 WAVE Waveform Mode 15 1 read-write ACPA RA Compare Effect on TIOA 16 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ACPC RC Compare Effect on TIOA 18 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 AEEVT External Event Effect on TIOA 20 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ASWTRG Software Trigger Effect on TIOA 22 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPB RB Compare Effect on TIOB 24 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPC RC Compare Effect on TIOB 26 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BEEVT External Event Effect on TIOB 28 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BSWTRG Software Trigger Effect on TIOB 30 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 SMMR1 Stepper Motor Mode Register (channel = 1) 0x00000048 32 read-write 0x00000000 GCEN Gray Count Enable 0 1 read-write DOWN DOWN Count 1 1 read-write CV1 Counter Value (channel = 1) 0x00000050 32 read-only 0x00000000 CV Counter Value 0 32 read-only RA1 Register A (channel = 1) 0x00000054 32 read-write 0x00000000 RA Register A 0 32 read-write RB1 Register B (channel = 1) 0x00000058 32 read-write 0x00000000 RB Register B 0 32 read-write RC1 Register C (channel = 1) 0x0000005C 32 read-write 0x00000000 RC Register C 0 32 read-write SR1 Status Register (channel = 1) 0x00000060 32 read-only 0x00000000 COVFS Counter Overflow Status 0 1 read-only LOVRS Load Overrun Status 1 1 read-only CPAS RA Compare Status 2 1 read-only CPBS RB Compare Status 3 1 read-only CPCS RC Compare Status 4 1 read-only LDRAS RA Loading Status 5 1 read-only LDRBS RB Loading Status 6 1 read-only ETRGS External Trigger Status 7 1 read-only CLKSTA Clock Enabling Status 16 1 read-only MTIOA TIOA Mirror 17 1 read-only MTIOB TIOB Mirror 18 1 read-only IER1 Interrupt Enable Register (channel = 1) 0x00000064 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IDR1 Interrupt Disable Register (channel = 1) 0x00000068 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IMR1 Interrupt Mask Register (channel = 1) 0x0000006C 32 read-only 0x00000000 COVFS Counter Overflow 0 1 read-only LOVRS Load Overrun 1 1 read-only CPAS RA Compare 2 1 read-only CPBS RB Compare 3 1 read-only CPCS RC Compare 4 1 read-only LDRAS RA Loading 5 1 read-only LDRBS RB Loading 6 1 read-only ETRGS External Trigger 7 1 read-only CCR2 Channel Control Register (channel = 2) 0x00000080 32 write-only CLKEN Counter Clock Enable Command 0 1 write-only CLKDIS Counter Clock Disable Command 1 1 write-only SWTRG Software Trigger Command 2 1 write-only CMR2 Channel Mode Register (channel = 2) 0x00000084 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 LDBSTOP Counter Clock Stopped with RB Loading 6 1 read-write LDBDIS Counter Clock Disable with RB Loading 7 1 read-write ETRGEDG External Trigger Edge Selection 8 2 read-write NONE The clock is not gated by an external signal. 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 ABETRG TIOA or TIOB External Trigger Selection 10 1 read-write CPCTRG RC Compare Trigger Enable 14 1 read-write WAVE Waveform Mode 15 1 read-write LDRA RA Loading Edge Selection 16 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 LDRB RB Loading Edge Selection 18 2 read-write NONE None 0x0 RISING Rising edge of TIOA 0x1 FALLING Falling edge of TIOA 0x2 EDGE Each edge of TIOA 0x3 CMR2_WAVE_EQ_1 Channel Mode Register (channel = 2) WAVE_EQ_1 0x00000084 32 read-write 0x00000000 TCCLKS Clock Selection 0 3 read-write TIMER_CLOCK1 Clock selected: TCLK1 0x0 TIMER_CLOCK2 Clock selected: TCLK2 0x1 TIMER_CLOCK3 Clock selected: TCLK3 0x2 TIMER_CLOCK4 Clock selected: TCLK4 0x3 TIMER_CLOCK5 Clock selected: TCLK5 0x4 XC0 Clock selected: XC0 0x5 XC1 Clock selected: XC1 0x6 XC2 Clock selected: XC2 0x7 CLKI Clock Invert 3 1 read-write BURST Burst Signal Selection 4 2 read-write NONE The clock is not gated by an external signal. 0x0 XC0 XC0 is ANDed with the selected clock. 0x1 XC1 XC1 is ANDed with the selected clock. 0x2 XC2 XC2 is ANDed with the selected clock. 0x3 CPCSTOP Counter Clock Stopped with RC Compare 6 1 read-write CPCDIS Counter Clock Disable with RC Compare 7 1 read-write EEVTEDG External Event Edge Selection 8 2 read-write NONE None 0x0 RISING Rising edge 0x1 FALLING Falling edge 0x2 EDGE Each edge 0x3 EEVT External Event Selection 10 2 read-write TIOB TIOB 0x0 XC0 XC0 0x1 XC1 XC1 0x2 XC2 XC2 0x3 ENETRG External Event Trigger Enable 12 1 read-write WAVSEL Waveform Selection 13 2 read-write UP UP mode without automatic trigger on RC Compare 0x0 UPDOWN UPDOWN mode without automatic trigger on RC Compare 0x1 UP_RC UP mode with automatic trigger on RC Compare 0x2 UPDOWN_RC UPDOWN mode with automatic trigger on RC Compare 0x3 WAVE Waveform Mode 15 1 read-write ACPA RA Compare Effect on TIOA 16 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ACPC RC Compare Effect on TIOA 18 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 AEEVT External Event Effect on TIOA 20 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 ASWTRG Software Trigger Effect on TIOA 22 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPB RB Compare Effect on TIOB 24 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BCPC RC Compare Effect on TIOB 26 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BEEVT External Event Effect on TIOB 28 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 BSWTRG Software Trigger Effect on TIOB 30 2 read-write NONE None 0x0 SET Set 0x1 CLEAR Clear 0x2 TOGGLE Toggle 0x3 SMMR2 Stepper Motor Mode Register (channel = 2) 0x00000088 32 read-write 0x00000000 GCEN Gray Count Enable 0 1 read-write DOWN DOWN Count 1 1 read-write CV2 Counter Value (channel = 2) 0x00000090 32 read-only 0x00000000 CV Counter Value 0 32 read-only RA2 Register A (channel = 2) 0x00000094 32 read-write 0x00000000 RA Register A 0 32 read-write RB2 Register B (channel = 2) 0x00000098 32 read-write 0x00000000 RB Register B 0 32 read-write RC2 Register C (channel = 2) 0x0000009C 32 read-write 0x00000000 RC Register C 0 32 read-write SR2 Status Register (channel = 2) 0x000000A0 32 read-only 0x00000000 COVFS Counter Overflow Status 0 1 read-only LOVRS Load Overrun Status 1 1 read-only CPAS RA Compare Status 2 1 read-only CPBS RB Compare Status 3 1 read-only CPCS RC Compare Status 4 1 read-only LDRAS RA Loading Status 5 1 read-only LDRBS RB Loading Status 6 1 read-only ETRGS External Trigger Status 7 1 read-only CLKSTA Clock Enabling Status 16 1 read-only MTIOA TIOA Mirror 17 1 read-only MTIOB TIOB Mirror 18 1 read-only IER2 Interrupt Enable Register (channel = 2) 0x000000A4 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IDR2 Interrupt Disable Register (channel = 2) 0x000000A8 32 write-only COVFS Counter Overflow 0 1 write-only LOVRS Load Overrun 1 1 write-only CPAS RA Compare 2 1 write-only CPBS RB Compare 3 1 write-only CPCS RC Compare 4 1 write-only LDRAS RA Loading 5 1 write-only LDRBS RB Loading 6 1 write-only ETRGS External Trigger 7 1 write-only IMR2 Interrupt Mask Register (channel = 2) 0x000000AC 32 read-only 0x00000000 COVFS Counter Overflow 0 1 read-only LOVRS Load Overrun 1 1 read-only CPAS RA Compare 2 1 read-only CPBS RB Compare 3 1 read-only CPCS RC Compare 4 1 read-only LDRAS RA Loading 5 1 read-only LDRBS RB Loading 6 1 read-only ETRGS External Trigger 7 1 read-only BCR Block Control Register 0x000000C0 32 write-only SYNC Synchro Command 0 1 write-only BMR Block Mode Register 0x000000C4 32 read-write 0x00000000 TC0XC0S External Clock Signal 0 Selection 0 2 read-write TCLK0 Signal connected to XC0: TCLK0 0x0 TIOA1 Signal connected to XC0: TIOA1 0x2 TIOA2 Signal connected to XC0: TIOA2 0x3 TC1XC1S External Clock Signal 1 Selection 2 2 read-write TCLK1 Signal connected to XC1: TCLK1 0x0 TIOA0 Signal connected to XC1: TIOA0 0x2 TIOA2 Signal connected to XC1: TIOA2 0x3 TC2XC2S External Clock Signal 2 Selection 4 2 read-write TCLK2 Signal connected to XC2: TCLK2 0x0 TIOA1 Signal connected to XC2: TIOA1 0x2 TIOA2 Signal connected to XC2: TIOA2 0x3 QDEN Quadrature Decoder ENabled 8 1 read-write POSEN POSition ENabled 9 1 read-write SPEEDEN SPEED ENabled 10 1 read-write QDTRANS Quadrature Decoding TRANSparent 11 1 read-write EDGPHA EDGe on PHA count mode 12 1 read-write INVA INVerted phA 13 1 read-write INVB INVerted phB 14 1 read-write INVIDX INVerted InDeX 15 1 read-write SWAP SWAP PHA and PHB 16 1 read-write IDXPHB InDeX pin is PHB pin 17 1 read-write FILTER 19 1 read-write MAXFILT MAXimum FILTer 20 6 read-write QIER QDEC Interrupt Enable Register 0x000000C8 32 write-only IDX InDeX 0 1 write-only DIRCHG DIRection CHanGe 1 1 write-only QERR Quadrature ERRor 2 1 write-only QIDR QDEC Interrupt Disable Register 0x000000CC 32 write-only IDX InDeX 0 1 write-only DIRCHG DIRection CHanGe 1 1 write-only QERR Quadrature ERRor 2 1 write-only QIMR QDEC Interrupt Mask Register 0x000000D0 32 read-only 0x00000000 IDX InDeX 0 1 read-only DIRCHG DIRection CHanGe 1 1 read-only QERR Quadrature ERRor 2 1 read-only QISR QDEC Interrupt Status Register 0x000000D4 32 read-only 0x00000000 IDX InDeX 0 1 read-only DIRCHG DIRection CHanGe 1 1 read-only QERR Quadrature ERRor 2 1 read-only DIR DIRection 8 1 read-only FMR Fault Mode Register 0x000000D8 32 read-write 0x00000000 ENCF0 ENable Compare Fault Channel 0 0 1 read-write ENCF1 ENable Compare Fault Channel 1 1 1 read-write WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write PASSWD Writing any other value in this field aborts the write operation of the WPEN bit.Always reads as 0. 0x54494D TWI0 6212O Two-wire Interface 0 TWI TWI0_ 0x40018000 0 0x4000 registers TWI0 19 CR Control Register 0x00000000 32 write-only START Send a START Condition 0 1 write-only STOP Send a STOP Condition 1 1 write-only MSEN TWI Master Mode Enabled 2 1 write-only MSDIS TWI Master Mode Disabled 3 1 write-only SVEN TWI Slave Mode Enabled 4 1 write-only SVDIS TWI Slave Mode Disabled 5 1 write-only QUICK SMBUS Quick Command 6 1 write-only SWRST Software Reset 7 1 write-only MMR Master Mode Register 0x00000004 32 read-write 0x00000000 IADRSZ Internal Device Address Size 8 2 read-write NONE No internal device address 0x0 1_BYTE One-byte internal device address 0x1 2_BYTE Two-byte internal device address 0x2 3_BYTE Three-byte internal device address 0x3 MREAD Master Read Direction 12 1 read-write DADR Device Address 16 7 read-write SMR Slave Mode Register 0x00000008 32 read-write 0x00000000 SADR Slave Address 16 7 read-write IADR Internal Address Register 0x0000000C 32 read-write 0x00000000 IADR Internal Address 0 24 read-write CWGR Clock Waveform Generator Register 0x00000010 32 read-write 0x00000000 CLDIV Clock Low Divider 0 8 read-write CHDIV Clock High Divider 8 8 read-write CKDIV Clock Divider 16 3 read-write SR Status Register 0x00000020 32 read-only 0x0000F009 TXCOMP Transmission Completed (automatically set / reset) 0 1 read-only RXRDY Receive Holding Register Ready (automatically set / reset) 1 1 read-only TXRDY Transmit Holding Register Ready (automatically set / reset) 2 1 read-only SVREAD Slave Read (automatically set / reset) 3 1 read-only SVACC Slave Access (automatically set / reset) 4 1 read-only GACC General Call Access (clear on read) 5 1 read-only OVRE Overrun Error (clear on read) 6 1 read-only NACK Not Acknowledged (clear on read) 8 1 read-only ARBLST Arbitration Lost (clear on read) 9 1 read-only SCLWS Clock Wait State (automatically set / reset) 10 1 read-only EOSACC End Of Slave Access (clear on read) 11 1 read-only ENDRX End of RX buffer 12 1 read-only ENDTX End of TX buffer 13 1 read-only RXBUFF RX Buffer Full 14 1 read-only TXBUFE TX Buffer Empty 15 1 read-only IER Interrupt Enable Register 0x00000024 32 write-only TXCOMP Transmission Completed Interrupt Enable 0 1 write-only RXRDY Receive Holding Register Ready Interrupt Enable 1 1 write-only TXRDY Transmit Holding Register Ready Interrupt Enable 2 1 write-only SVACC Slave Access Interrupt Enable 4 1 write-only GACC General Call Access Interrupt Enable 5 1 write-only OVRE Overrun Error Interrupt Enable 6 1 write-only NACK Not Acknowledge Interrupt Enable 8 1 write-only ARBLST Arbitration Lost Interrupt Enable 9 1 write-only SCL_WS Clock Wait State Interrupt Enable 10 1 write-only EOSACC End Of Slave Access Interrupt Enable 11 1 write-only ENDRX End of Receive Buffer Interrupt Enable 12 1 write-only ENDTX End of Transmit Buffer Interrupt Enable 13 1 write-only RXBUFF Receive Buffer Full Interrupt Enable 14 1 write-only TXBUFE Transmit Buffer Empty Interrupt Enable 15 1 write-only IDR Interrupt Disable Register 0x00000028 32 write-only TXCOMP Transmission Completed Interrupt Disable 0 1 write-only RXRDY Receive Holding Register Ready Interrupt Disable 1 1 write-only TXRDY Transmit Holding Register Ready Interrupt Disable 2 1 write-only SVACC Slave Access Interrupt Disable 4 1 write-only GACC General Call Access Interrupt Disable 5 1 write-only OVRE Overrun Error Interrupt Disable 6 1 write-only NACK Not Acknowledge Interrupt Disable 8 1 write-only ARBLST Arbitration Lost Interrupt Disable 9 1 write-only SCL_WS Clock Wait State Interrupt Disable 10 1 write-only EOSACC End Of Slave Access Interrupt Disable 11 1 write-only ENDRX End of Receive Buffer Interrupt Disable 12 1 write-only ENDTX End of Transmit Buffer Interrupt Disable 13 1 write-only RXBUFF Receive Buffer Full Interrupt Disable 14 1 write-only TXBUFE Transmit Buffer Empty Interrupt Disable 15 1 write-only IMR Interrupt Mask Register 0x0000002C 32 read-only 0x00000000 TXCOMP Transmission Completed Interrupt Mask 0 1 read-only RXRDY Receive Holding Register Ready Interrupt Mask 1 1 read-only TXRDY Transmit Holding Register Ready Interrupt Mask 2 1 read-only SVACC Slave Access Interrupt Mask 4 1 read-only GACC General Call Access Interrupt Mask 5 1 read-only OVRE Overrun Error Interrupt Mask 6 1 read-only NACK Not Acknowledge Interrupt Mask 8 1 read-only ARBLST Arbitration Lost Interrupt Mask 9 1 read-only SCL_WS Clock Wait State Interrupt Mask 10 1 read-only EOSACC End Of Slave Access Interrupt Mask 11 1 read-only ENDRX End of Receive Buffer Interrupt Mask 12 1 read-only ENDTX End of Transmit Buffer Interrupt Mask 13 1 read-only RXBUFF Receive Buffer Full Interrupt Mask 14 1 read-only TXBUFE Transmit Buffer Empty Interrupt Mask 15 1 read-only RHR Receive Holding Register 0x00000030 32 read-only 0x00000000 RXDATA Master or Slave Receive Holding Data 0 8 read-only THR Transmit Holding Register 0x00000034 32 write-only 0x00000000 TXDATA Master or Slave Transmit Holding Data 0 8 write-only RPR Receive Pointer Register 0x00000100 32 read-write 0x00000000 RXPTR Receive Pointer Register 0 32 read-write RCR Receive Counter Register 0x00000104 32 read-write 0x00000000 RXCTR Receive Counter Register 0 16 read-write TPR Transmit Pointer Register 0x00000108 32 read-write 0x00000000 TXPTR Transmit Counter Register 0 32 read-write TCR Transmit Counter Register 0x0000010C 32 read-write 0x00000000 TXCTR Transmit Counter Register 0 16 read-write RNPR Receive Next Pointer Register 0x00000110 32 read-write 0x00000000 RXNPTR Receive Next Pointer 0 32 read-write RNCR Receive Next Counter Register 0x00000114 32 read-write 0x00000000 RXNCTR Receive Next Counter 0 16 read-write TNPR Transmit Next Pointer Register 0x00000118 32 read-write 0x00000000 TXNPTR Transmit Next Pointer 0 32 read-write TNCR Transmit Next Counter Register 0x0000011C 32 read-write 0x00000000 TXNCTR Transmit Counter Next 0 16 read-write PTCR Transfer Control Register 0x00000120 32 write-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 write-only RXTDIS Receiver Transfer Disable 1 1 write-only TXTEN Transmitter Transfer Enable 8 1 write-only TXTDIS Transmitter Transfer Disable 9 1 write-only PTSR Transfer Status Register 0x00000124 32 read-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 read-only TXTEN Transmitter Transfer Enable 8 1 read-only TWI1 6212O Two-wire Interface 1 TWI TWI1_ 0x4001C000 0 0x4000 registers TWI1 20 CR Control Register 0x00000000 32 write-only START Send a START Condition 0 1 write-only STOP Send a STOP Condition 1 1 write-only MSEN TWI Master Mode Enabled 2 1 write-only MSDIS TWI Master Mode Disabled 3 1 write-only SVEN TWI Slave Mode Enabled 4 1 write-only SVDIS TWI Slave Mode Disabled 5 1 write-only QUICK SMBUS Quick Command 6 1 write-only SWRST Software Reset 7 1 write-only MMR Master Mode Register 0x00000004 32 read-write 0x00000000 IADRSZ Internal Device Address Size 8 2 read-write NONE No internal device address 0x0 1_BYTE One-byte internal device address 0x1 2_BYTE Two-byte internal device address 0x2 3_BYTE Three-byte internal device address 0x3 MREAD Master Read Direction 12 1 read-write DADR Device Address 16 7 read-write SMR Slave Mode Register 0x00000008 32 read-write 0x00000000 SADR Slave Address 16 7 read-write IADR Internal Address Register 0x0000000C 32 read-write 0x00000000 IADR Internal Address 0 24 read-write CWGR Clock Waveform Generator Register 0x00000010 32 read-write 0x00000000 CLDIV Clock Low Divider 0 8 read-write CHDIV Clock High Divider 8 8 read-write CKDIV Clock Divider 16 3 read-write SR Status Register 0x00000020 32 read-only 0x0000F009 TXCOMP Transmission Completed (automatically set / reset) 0 1 read-only RXRDY Receive Holding Register Ready (automatically set / reset) 1 1 read-only TXRDY Transmit Holding Register Ready (automatically set / reset) 2 1 read-only SVREAD Slave Read (automatically set / reset) 3 1 read-only SVACC Slave Access (automatically set / reset) 4 1 read-only GACC General Call Access (clear on read) 5 1 read-only OVRE Overrun Error (clear on read) 6 1 read-only NACK Not Acknowledged (clear on read) 8 1 read-only ARBLST Arbitration Lost (clear on read) 9 1 read-only SCLWS Clock Wait State (automatically set / reset) 10 1 read-only EOSACC End Of Slave Access (clear on read) 11 1 read-only ENDRX End of RX buffer 12 1 read-only ENDTX End of TX buffer 13 1 read-only RXBUFF RX Buffer Full 14 1 read-only TXBUFE TX Buffer Empty 15 1 read-only IER Interrupt Enable Register 0x00000024 32 write-only TXCOMP Transmission Completed Interrupt Enable 0 1 write-only RXRDY Receive Holding Register Ready Interrupt Enable 1 1 write-only TXRDY Transmit Holding Register Ready Interrupt Enable 2 1 write-only SVACC Slave Access Interrupt Enable 4 1 write-only GACC General Call Access Interrupt Enable 5 1 write-only OVRE Overrun Error Interrupt Enable 6 1 write-only NACK Not Acknowledge Interrupt Enable 8 1 write-only ARBLST Arbitration Lost Interrupt Enable 9 1 write-only SCL_WS Clock Wait State Interrupt Enable 10 1 write-only EOSACC End Of Slave Access Interrupt Enable 11 1 write-only ENDRX End of Receive Buffer Interrupt Enable 12 1 write-only ENDTX End of Transmit Buffer Interrupt Enable 13 1 write-only RXBUFF Receive Buffer Full Interrupt Enable 14 1 write-only TXBUFE Transmit Buffer Empty Interrupt Enable 15 1 write-only IDR Interrupt Disable Register 0x00000028 32 write-only TXCOMP Transmission Completed Interrupt Disable 0 1 write-only RXRDY Receive Holding Register Ready Interrupt Disable 1 1 write-only TXRDY Transmit Holding Register Ready Interrupt Disable 2 1 write-only SVACC Slave Access Interrupt Disable 4 1 write-only GACC General Call Access Interrupt Disable 5 1 write-only OVRE Overrun Error Interrupt Disable 6 1 write-only NACK Not Acknowledge Interrupt Disable 8 1 write-only ARBLST Arbitration Lost Interrupt Disable 9 1 write-only SCL_WS Clock Wait State Interrupt Disable 10 1 write-only EOSACC End Of Slave Access Interrupt Disable 11 1 write-only ENDRX End of Receive Buffer Interrupt Disable 12 1 write-only ENDTX End of Transmit Buffer Interrupt Disable 13 1 write-only RXBUFF Receive Buffer Full Interrupt Disable 14 1 write-only TXBUFE Transmit Buffer Empty Interrupt Disable 15 1 write-only IMR Interrupt Mask Register 0x0000002C 32 read-only 0x00000000 TXCOMP Transmission Completed Interrupt Mask 0 1 read-only RXRDY Receive Holding Register Ready Interrupt Mask 1 1 read-only TXRDY Transmit Holding Register Ready Interrupt Mask 2 1 read-only SVACC Slave Access Interrupt Mask 4 1 read-only GACC General Call Access Interrupt Mask 5 1 read-only OVRE Overrun Error Interrupt Mask 6 1 read-only NACK Not Acknowledge Interrupt Mask 8 1 read-only ARBLST Arbitration Lost Interrupt Mask 9 1 read-only SCL_WS Clock Wait State Interrupt Mask 10 1 read-only EOSACC End Of Slave Access Interrupt Mask 11 1 read-only ENDRX End of Receive Buffer Interrupt Mask 12 1 read-only ENDTX End of Transmit Buffer Interrupt Mask 13 1 read-only RXBUFF Receive Buffer Full Interrupt Mask 14 1 read-only TXBUFE Transmit Buffer Empty Interrupt Mask 15 1 read-only RHR Receive Holding Register 0x00000030 32 read-only 0x00000000 RXDATA Master or Slave Receive Holding Data 0 8 read-only THR Transmit Holding Register 0x00000034 32 write-only 0x00000000 TXDATA Master or Slave Transmit Holding Data 0 8 write-only RPR Receive Pointer Register 0x00000100 32 read-write 0x00000000 RXPTR Receive Pointer Register 0 32 read-write RCR Receive Counter Register 0x00000104 32 read-write 0x00000000 RXCTR Receive Counter Register 0 16 read-write TPR Transmit Pointer Register 0x00000108 32 read-write 0x00000000 TXPTR Transmit Counter Register 0 32 read-write TCR Transmit Counter Register 0x0000010C 32 read-write 0x00000000 TXCTR Transmit Counter Register 0 16 read-write RNPR Receive Next Pointer Register 0x00000110 32 read-write 0x00000000 RXNPTR Receive Next Pointer 0 32 read-write RNCR Receive Next Counter Register 0x00000114 32 read-write 0x00000000 RXNCTR Receive Next Counter 0 16 read-write TNPR Transmit Next Pointer Register 0x00000118 32 read-write 0x00000000 TXNPTR Transmit Next Pointer 0 32 read-write TNCR Transmit Next Counter Register 0x0000011C 32 read-write 0x00000000 TXNCTR Transmit Counter Next 0 16 read-write PTCR Transfer Control Register 0x00000120 32 write-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 write-only RXTDIS Receiver Transfer Disable 1 1 write-only TXTEN Transmitter Transfer Enable 8 1 write-only TXTDIS Transmitter Transfer Disable 9 1 write-only PTSR Transfer Status Register 0x00000124 32 read-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 read-only TXTEN Transmitter Transfer Enable 8 1 read-only PWM 6343J Pulse Width Modulation Controller PWM_ 0x40020000 0 0x4000 registers PWM 31 CLK PWM Clock Register 0x00000000 32 read-write 0x00000000 DIVA CLKA, CLKB Divide Factor 0 8 read-write PREA CLKA, CLKB Source Clock Selection 8 4 read-write DIVB CLKA, CLKB Divide Factor 16 8 read-write PREB CLKA, CLKB Source Clock Selection 24 4 read-write ENA PWM Enable Register 0x00000004 32 write-only CHID0 Channel ID 0 1 write-only CHID1 Channel ID 1 1 write-only CHID2 Channel ID 2 1 write-only CHID3 Channel ID 3 1 write-only DIS PWM Disable Register 0x00000008 32 write-only CHID0 Channel ID 0 1 write-only CHID1 Channel ID 1 1 write-only CHID2 Channel ID 2 1 write-only CHID3 Channel ID 3 1 write-only SR PWM Status Register 0x0000000C 32 read-only 0x00000000 CHID0 Channel ID 0 1 read-only CHID1 Channel ID 1 1 read-only CHID2 Channel ID 2 1 read-only CHID3 Channel ID 3 1 read-only IER1 PWM Interrupt Enable Register 1 0x00000010 32 write-only CHID0 Counter Event on Channel 0 Interrupt Enable 0 1 write-only CHID1 Counter Event on Channel 1 Interrupt Enable 1 1 write-only CHID2 Counter Event on Channel 2 Interrupt Enable 2 1 write-only CHID3 Counter Event on Channel 3 Interrupt Enable 3 1 write-only FCHID0 Fault Protection Trigger on Channel 0 Interrupt Enable 16 1 write-only FCHID1 Fault Protection Trigger on Channel 1 Interrupt Enable 17 1 write-only FCHID2 Fault Protection Trigger on Channel 2 Interrupt Enable 18 1 write-only FCHID3 Fault Protection Trigger on Channel 3 Interrupt Enable 19 1 write-only IDR1 PWM Interrupt Disable Register 1 0x00000014 32 write-only CHID0 Counter Event on Channel 0 Interrupt Disable 0 1 write-only CHID1 Counter Event on Channel 1 Interrupt Disable 1 1 write-only CHID2 Counter Event on Channel 2 Interrupt Disable 2 1 write-only CHID3 Counter Event on Channel 3 Interrupt Disable 3 1 write-only FCHID0 Fault Protection Trigger on Channel 0 Interrupt Disable 16 1 write-only FCHID1 Fault Protection Trigger on Channel 1 Interrupt Disable 17 1 write-only FCHID2 Fault Protection Trigger on Channel 2 Interrupt Disable 18 1 write-only FCHID3 Fault Protection Trigger on Channel 3 Interrupt Disable 19 1 write-only IMR1 PWM Interrupt Mask Register 1 0x00000018 32 read-only 0x00000000 CHID0 Counter Event on Channel 0 Interrupt Mask 0 1 read-only CHID1 Counter Event on Channel 1 Interrupt Mask 1 1 read-only CHID2 Counter Event on Channel 2 Interrupt Mask 2 1 read-only CHID3 Counter Event on Channel 3 Interrupt Mask 3 1 read-only FCHID0 Fault Protection Trigger on Channel 0 Interrupt Mask 16 1 read-only FCHID1 Fault Protection Trigger on Channel 1 Interrupt Mask 17 1 read-only FCHID2 Fault Protection Trigger on Channel 2 Interrupt Mask 18 1 read-only FCHID3 Fault Protection Trigger on Channel 3 Interrupt Mask 19 1 read-only ISR1 PWM Interrupt Status Register 1 0x0000001C 32 read-only 0x00000000 CHID0 Counter Event on Channel 0 0 1 read-only CHID1 Counter Event on Channel 1 1 1 read-only CHID2 Counter Event on Channel 2 2 1 read-only CHID3 Counter Event on Channel 3 3 1 read-only FCHID0 Fault Protection Trigger on Channel 0 16 1 read-only FCHID1 Fault Protection Trigger on Channel 1 17 1 read-only FCHID2 Fault Protection Trigger on Channel 2 18 1 read-only FCHID3 Fault Protection Trigger on Channel 3 19 1 read-only SCM PWM Sync Channels Mode Register 0x00000020 32 read-write 0x00000000 SYNC0 Synchronous Channel 0 0 1 read-write SYNC1 Synchronous Channel 1 1 1 read-write SYNC2 Synchronous Channel 2 2 1 read-write SYNC3 Synchronous Channel 3 3 1 read-write UPDM Synchronous Channels Update Mode 16 2 read-write MODE0 Manual write of double buffer registers and manual update of synchronous channels 0x0 MODE1 Manual write of double buffer registers and automatic update of synchronous channels 0x1 MODE2 Automatic write of duty-cycle update registers by the PDC and automatic update of synchronous channels 0x2 PTRM PDC Transfer Request Mode 20 1 read-write PTRCS PDC Transfer Request Comparison Selection 21 3 read-write SCUC PWM Sync Channels Update Control Register 0x00000028 32 read-write 0x00000000 UPDULOCK Synchronous Channels Update Unlock 0 1 read-write SCUP PWM Sync Channels Update Period Register 0x0000002C 32 read-write 0x00000000 UPR Update Period 0 4 read-write UPRCNT Update Period Counter 4 4 read-write SCUPUPD PWM Sync Channels Update Period Update Register 0x00000030 32 write-only 0x00000000 UPRUPD Update Period Update 0 4 write-only IER2 PWM Interrupt Enable Register 2 0x00000034 32 write-only WRDY Write Ready for Synchronous Channels Update Interrupt Enable 0 1 write-only ENDTX PDC End of TX Buffer Interrupt Enable 1 1 write-only TXBUFE PDC TX Buffer Empty Interrupt Enable 2 1 write-only UNRE Synchronous Channels Update Underrun Error Interrupt Enable 3 1 write-only CMPM0 Comparison 0 Match Interrupt Enable 8 1 write-only CMPM1 Comparison 1 Match Interrupt Enable 9 1 write-only CMPM2 Comparison 2 Match Interrupt Enable 10 1 write-only CMPM3 Comparison 3 Match Interrupt Enable 11 1 write-only CMPM4 Comparison 4 Match Interrupt Enable 12 1 write-only CMPM5 Comparison 5 Match Interrupt Enable 13 1 write-only CMPM6 Comparison 6 Match Interrupt Enable 14 1 write-only CMPM7 Comparison 7 Match Interrupt Enable 15 1 write-only CMPU0 Comparison 0 Update Interrupt Enable 16 1 write-only CMPU1 Comparison 1 Update Interrupt Enable 17 1 write-only CMPU2 Comparison 2 Update Interrupt Enable 18 1 write-only CMPU3 Comparison 3 Update Interrupt Enable 19 1 write-only CMPU4 Comparison 4 Update Interrupt Enable 20 1 write-only CMPU5 Comparison 5 Update Interrupt Enable 21 1 write-only CMPU6 Comparison 6 Update Interrupt Enable 22 1 write-only CMPU7 Comparison 7 Update Interrupt Enable 23 1 write-only IDR2 PWM Interrupt Disable Register 2 0x00000038 32 write-only WRDY Write Ready for Synchronous Channels Update Interrupt Disable 0 1 write-only ENDTX PDC End of TX Buffer Interrupt Disable 1 1 write-only TXBUFE PDC TX Buffer Empty Interrupt Disable 2 1 write-only UNRE Synchronous Channels Update Underrun Error Interrupt Disable 3 1 write-only CMPM0 Comparison 0 Match Interrupt Disable 8 1 write-only CMPM1 Comparison 1 Match Interrupt Disable 9 1 write-only CMPM2 Comparison 2 Match Interrupt Disable 10 1 write-only CMPM3 Comparison 3 Match Interrupt Disable 11 1 write-only CMPM4 Comparison 4 Match Interrupt Disable 12 1 write-only CMPM5 Comparison 5 Match Interrupt Disable 13 1 write-only CMPM6 Comparison 6 Match Interrupt Disable 14 1 write-only CMPM7 Comparison 7 Match Interrupt Disable 15 1 write-only CMPU0 Comparison 0 Update Interrupt Disable 16 1 write-only CMPU1 Comparison 1 Update Interrupt Disable 17 1 write-only CMPU2 Comparison 2 Update Interrupt Disable 18 1 write-only CMPU3 Comparison 3 Update Interrupt Disable 19 1 write-only CMPU4 Comparison 4 Update Interrupt Disable 20 1 write-only CMPU5 Comparison 5 Update Interrupt Disable 21 1 write-only CMPU6 Comparison 6 Update Interrupt Disable 22 1 write-only CMPU7 Comparison 7 Update Interrupt Disable 23 1 write-only IMR2 PWM Interrupt Mask Register 2 0x0000003C 32 read-only 0x00000000 WRDY Write Ready for Synchronous Channels Update Interrupt Mask 0 1 read-only ENDTX PDC End of TX Buffer Interrupt Mask 1 1 read-only TXBUFE PDC TX Buffer Empty Interrupt Mask 2 1 read-only UNRE Synchronous Channels Update Underrun Error Interrupt Mask 3 1 read-only CMPM0 Comparison 0 Match Interrupt Mask 8 1 read-only CMPM1 Comparison 1 Match Interrupt Mask 9 1 read-only CMPM2 Comparison 2 Match Interrupt Mask 10 1 read-only CMPM3 Comparison 3 Match Interrupt Mask 11 1 read-only CMPM4 Comparison 4 Match Interrupt Mask 12 1 read-only CMPM5 Comparison 5 Match Interrupt Mask 13 1 read-only CMPM6 Comparison 6 Match Interrupt Mask 14 1 read-only CMPM7 Comparison 7 Match Interrupt Mask 15 1 read-only CMPU0 Comparison 0 Update Interrupt Mask 16 1 read-only CMPU1 Comparison 1 Update Interrupt Mask 17 1 read-only CMPU2 Comparison 2 Update Interrupt Mask 18 1 read-only CMPU3 Comparison 3 Update Interrupt Mask 19 1 read-only CMPU4 Comparison 4 Update Interrupt Mask 20 1 read-only CMPU5 Comparison 5 Update Interrupt Mask 21 1 read-only CMPU6 Comparison 6 Update Interrupt Mask 22 1 read-only CMPU7 Comparison 7 Update Interrupt Mask 23 1 read-only ISR2 PWM Interrupt Status Register 2 0x00000040 32 read-only 0x00000000 WRDY Write Ready for Synchronous Channels Update 0 1 read-only ENDTX PDC End of TX Buffer 1 1 read-only TXBUFE PDC TX Buffer Empty 2 1 read-only UNRE Synchronous Channels Update Underrun Error 3 1 read-only CMPM0 Comparison 0 Match 8 1 read-only CMPM1 Comparison 1 Match 9 1 read-only CMPM2 Comparison 2 Match 10 1 read-only CMPM3 Comparison 3 Match 11 1 read-only CMPM4 Comparison 4 Match 12 1 read-only CMPM5 Comparison 5 Match 13 1 read-only CMPM6 Comparison 6 Match 14 1 read-only CMPM7 Comparison 7 Match 15 1 read-only CMPU0 Comparison 0 Update 16 1 read-only CMPU1 Comparison 1 Update 17 1 read-only CMPU2 Comparison 2 Update 18 1 read-only CMPU3 Comparison 3 Update 19 1 read-only CMPU4 Comparison 4 Update 20 1 read-only CMPU5 Comparison 5 Update 21 1 read-only CMPU6 Comparison 6 Update 22 1 read-only CMPU7 Comparison 7 Update 23 1 read-only OOV PWM Output Override Value Register 0x00000044 32 read-write 0x00000000 OOVH0 Output Override Value for PWMH output of the channel 0 0 1 read-write OOVH1 Output Override Value for PWMH output of the channel 1 1 1 read-write OOVH2 Output Override Value for PWMH output of the channel 2 2 1 read-write OOVH3 Output Override Value for PWMH output of the channel 3 3 1 read-write OOVL0 Output Override Value for PWML output of the channel 0 16 1 read-write OOVL1 Output Override Value for PWML output of the channel 1 17 1 read-write OOVL2 Output Override Value for PWML output of the channel 2 18 1 read-write OOVL3 Output Override Value for PWML output of the channel 3 19 1 read-write OS PWM Output Selection Register 0x00000048 32 read-write 0x00000000 OSH0 Output Selection for PWMH output of the channel 0 0 1 read-write OSH1 Output Selection for PWMH output of the channel 1 1 1 read-write OSH2 Output Selection for PWMH output of the channel 2 2 1 read-write OSH3 Output Selection for PWMH output of the channel 3 3 1 read-write OSL0 Output Selection for PWML output of the channel 0 16 1 read-write OSL1 Output Selection for PWML output of the channel 1 17 1 read-write OSL2 Output Selection for PWML output of the channel 2 18 1 read-write OSL3 Output Selection for PWML output of the channel 3 19 1 read-write OSS PWM Output Selection Set Register 0x0000004C 32 write-only OSSH0 Output Selection Set for PWMH output of the channel 0 0 1 write-only OSSH1 Output Selection Set for PWMH output of the channel 1 1 1 write-only OSSH2 Output Selection Set for PWMH output of the channel 2 2 1 write-only OSSH3 Output Selection Set for PWMH output of the channel 3 3 1 write-only OSSL0 Output Selection Set for PWML output of the channel 0 16 1 write-only OSSL1 Output Selection Set for PWML output of the channel 1 17 1 write-only OSSL2 Output Selection Set for PWML output of the channel 2 18 1 write-only OSSL3 Output Selection Set for PWML output of the channel 3 19 1 write-only OSC PWM Output Selection Clear Register 0x00000050 32 write-only OSCH0 Output Selection Clear for PWMH output of the channel 0 0 1 write-only OSCH1 Output Selection Clear for PWMH output of the channel 1 1 1 write-only OSCH2 Output Selection Clear for PWMH output of the channel 2 2 1 write-only OSCH3 Output Selection Clear for PWMH output of the channel 3 3 1 write-only OSCL0 Output Selection Clear for PWML output of the channel 0 16 1 write-only OSCL1 Output Selection Clear for PWML output of the channel 1 17 1 write-only OSCL2 Output Selection Clear for PWML output of the channel 2 18 1 write-only OSCL3 Output Selection Clear for PWML output of the channel 3 19 1 write-only OSSUPD PWM Output Selection Set Update Register 0x00000054 32 write-only OSSUPH0 Output Selection Set for PWMH output of the channel 0 0 1 write-only OSSUPH1 Output Selection Set for PWMH output of the channel 1 1 1 write-only OSSUPH2 Output Selection Set for PWMH output of the channel 2 2 1 write-only OSSUPH3 Output Selection Set for PWMH output of the channel 3 3 1 write-only OSSUPL0 Output Selection Set for PWML output of the channel 0 16 1 write-only OSSUPL1 Output Selection Set for PWML output of the channel 1 17 1 write-only OSSUPL2 Output Selection Set for PWML output of the channel 2 18 1 write-only OSSUPL3 Output Selection Set for PWML output of the channel 3 19 1 write-only OSCUPD PWM Output Selection Clear Update Register 0x00000058 32 write-only OSCUPH0 Output Selection Clear for PWMH output of the channel 0 0 1 write-only OSCUPH1 Output Selection Clear for PWMH output of the channel 1 1 1 write-only OSCUPH2 Output Selection Clear for PWMH output of the channel 2 2 1 write-only OSCUPH3 Output Selection Clear for PWMH output of the channel 3 3 1 write-only OSCUPL0 Output Selection Clear for PWML output of the channel 0 16 1 write-only OSCUPL1 Output Selection Clear for PWML output of the channel 1 17 1 write-only OSCUPL2 Output Selection Clear for PWML output of the channel 2 18 1 write-only OSCUPL3 Output Selection Clear for PWML output of the channel 3 19 1 write-only FMR PWM Fault Mode Register 0x0000005C 32 read-write 0x00000000 FPOL Fault Polarity (fault input bit varies from 0 to 5) 0 8 read-write FMOD Fault Activation Mode (fault input bit varies from 0 to 5) 8 8 read-write FFIL Fault Filtering (fault input bit varies from 0 to 5) 16 8 read-write FSR PWM Fault Status Register 0x00000060 32 read-only 0x00000000 FIV Fault Input Value (fault input bit varies from 0 to 5) 0 8 read-only FS Fault Status (fault input bit varies from 0 to 5) 8 8 read-only FCR PWM Fault Clear Register 0x00000064 32 write-only FCLR Fault Clear (fault input bit varies from 0 to 5) 0 8 write-only FPV PWM Fault Protection Value Register 0x00000068 32 read-write 0x00000000 FPVH0 Fault Protection Value for PWMH output on channel 0 0 1 read-write FPVH1 Fault Protection Value for PWMH output on channel 1 1 1 read-write FPVH2 Fault Protection Value for PWMH output on channel 2 2 1 read-write FPVH3 Fault Protection Value for PWMH output on channel 3 3 1 read-write FPVL0 Fault Protection Value for PWML output on channel 0 16 1 read-write FPVL1 Fault Protection Value for PWML output on channel 1 17 1 read-write FPVL2 Fault Protection Value for PWML output on channel 2 18 1 read-write FPVL3 Fault Protection Value for PWML output on channel 3 19 1 read-write FPE PWM Fault Protection Enable Register 0x0000006C 32 read-write 0x00000000 FPE0 Fault Protection Enable for channel 0 (fault input bit varies from 0 to 5) 0 8 read-write FPE1 Fault Protection Enable for channel 1 (fault input bit varies from 0 to 5) 8 8 read-write FPE2 Fault Protection Enable for channel 2 (fault input bit varies from 0 to 5) 16 8 read-write FPE3 Fault Protection Enable for channel 3 (fault input bit varies from 0 to 5) 24 8 read-write 2 4 0-1 ELMR[%s] PWM Event Line 0 Mode Register 0x0000007C 32 read-write CSEL0 Comparison 0 Selection 0 1 read-write CSEL1 Comparison 1 Selection 1 1 read-write CSEL2 Comparison 2 Selection 2 1 read-write CSEL3 Comparison 3 Selection 3 1 read-write CSEL4 Comparison 4 Selection 4 1 read-write CSEL5 Comparison 5 Selection 5 1 read-write CSEL6 Comparison 6 Selection 6 1 read-write CSEL7 Comparison 7 Selection 7 1 read-write SMMR PWM Stepper Motor Mode Register 0x000000B0 32 read-write 0x00000000 GCEN0 Gray Count ENable 0 1 read-write GCEN1 Gray Count ENable 1 1 read-write DOWN0 DOWN Count 16 1 read-write DOWN1 DOWN Count 17 1 read-write WPCR PWM Write Protect Control Register 0x000000E4 32 write-only WPCMD Write Protect Command 0 2 write-only WPRG0 Write Protect Register Group 0 2 1 write-only WPRG1 Write Protect Register Group 1 3 1 write-only WPRG2 Write Protect Register Group 2 4 1 write-only WPRG3 Write Protect Register Group 3 5 1 write-only WPRG4 Write Protect Register Group 4 6 1 write-only WPRG5 Write Protect Register Group 5 7 1 write-only WPKEY Write Protect Key 8 24 write-only WPSR PWM Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPSWS0 Write Protect SW Status 0 1 read-only WPSWS1 Write Protect SW Status 1 1 read-only WPSWS2 Write Protect SW Status 2 1 read-only WPSWS3 Write Protect SW Status 3 1 read-only WPSWS4 Write Protect SW Status 4 1 read-only WPSWS5 Write Protect SW Status 5 1 read-only WPVS Write Protect Violation Status 7 1 read-only WPHWS0 Write Protect HW Status 8 1 read-only WPHWS1 Write Protect HW Status 9 1 read-only WPHWS2 Write Protect HW Status 10 1 read-only WPHWS3 Write Protect HW Status 11 1 read-only WPHWS4 Write Protect HW Status 12 1 read-only WPHWS5 Write Protect HW Status 13 1 read-only WPVSRC Write Protect Violation Source 16 16 read-only CMPV0 PWM Comparison 0 Value Register 0x00000130 32 read-write 0x00000000 CV Comparison x Value 0 24 read-write CVM Comparison x Value Mode 24 1 read-write CMPVUPD0 PWM Comparison 0 Value Update Register 0x00000134 32 write-only CVUPD Comparison x Value Update 0 24 write-only CVMUPD Comparison x Value Mode Update 24 1 write-only CMPM0 PWM Comparison 0 Mode Register 0x00000138 32 read-write 0x00000000 CEN Comparison x Enable 0 1 read-write CTR Comparison x Trigger 4 4 read-write CPR Comparison x Period 8 4 read-write CPRCNT Comparison x Period Counter 12 4 read-write CUPR Comparison x Update Period 16 4 read-write CUPRCNT Comparison x Update Period Counter 20 4 read-write CMPMUPD0 PWM Comparison 0 Mode Update Register 0x0000013C 32 write-only CENUPD Comparison x Enable Update 0 1 write-only CTRUPD Comparison x Trigger Update 4 4 write-only CPRUPD Comparison x Period Update 8 4 write-only CUPRUPD Comparison x Update Period Update 16 4 write-only CMPV1 PWM Comparison 1 Value Register 0x00000140 32 read-write 0x00000000 CV Comparison x Value 0 24 read-write CVM Comparison x Value Mode 24 1 read-write CMPVUPD1 PWM Comparison 1 Value Update Register 0x00000144 32 write-only CVUPD Comparison x Value Update 0 24 write-only CVMUPD Comparison x Value Mode Update 24 1 write-only CMPM1 PWM Comparison 1 Mode Register 0x00000148 32 read-write 0x00000000 CEN Comparison x Enable 0 1 read-write CTR Comparison x Trigger 4 4 read-write CPR Comparison x Period 8 4 read-write CPRCNT Comparison x Period Counter 12 4 read-write CUPR Comparison x Update Period 16 4 read-write CUPRCNT Comparison x Update Period Counter 20 4 read-write CMPMUPD1 PWM Comparison 1 Mode Update Register 0x0000014C 32 write-only CENUPD Comparison x Enable Update 0 1 write-only CTRUPD Comparison x Trigger Update 4 4 write-only CPRUPD Comparison x Period Update 8 4 write-only CUPRUPD Comparison x Update Period Update 16 4 write-only CMPV2 PWM Comparison 2 Value Register 0x00000150 32 read-write 0x00000000 CV Comparison x Value 0 24 read-write CVM Comparison x Value Mode 24 1 read-write CMPVUPD2 PWM Comparison 2 Value Update Register 0x00000154 32 write-only CVUPD Comparison x Value Update 0 24 write-only CVMUPD Comparison x Value Mode Update 24 1 write-only CMPM2 PWM Comparison 2 Mode Register 0x00000158 32 read-write 0x00000000 CEN Comparison x Enable 0 1 read-write CTR Comparison x Trigger 4 4 read-write CPR Comparison x Period 8 4 read-write CPRCNT Comparison x Period Counter 12 4 read-write CUPR Comparison x Update Period 16 4 read-write CUPRCNT Comparison x Update Period Counter 20 4 read-write CMPMUPD2 PWM Comparison 2 Mode Update Register 0x0000015C 32 write-only CENUPD Comparison x Enable Update 0 1 write-only CTRUPD Comparison x Trigger Update 4 4 write-only CPRUPD Comparison x Period Update 8 4 write-only CUPRUPD Comparison x Update Period Update 16 4 write-only CMPV3 PWM Comparison 3 Value Register 0x00000160 32 read-write 0x00000000 CV Comparison x Value 0 24 read-write CVM Comparison x Value Mode 24 1 read-write CMPVUPD3 PWM Comparison 3 Value Update Register 0x00000164 32 write-only CVUPD Comparison x Value Update 0 24 write-only CVMUPD Comparison x Value Mode Update 24 1 write-only CMPM3 PWM Comparison 3 Mode Register 0x00000168 32 read-write 0x00000000 CEN Comparison x Enable 0 1 read-write CTR Comparison x Trigger 4 4 read-write CPR Comparison x Period 8 4 read-write CPRCNT Comparison x Period Counter 12 4 read-write CUPR Comparison x Update Period 16 4 read-write CUPRCNT Comparison x Update Period Counter 20 4 read-write CMPMUPD3 PWM Comparison 3 Mode Update Register 0x0000016C 32 write-only CENUPD Comparison x Enable Update 0 1 write-only CTRUPD Comparison x Trigger Update 4 4 write-only CPRUPD Comparison x Period Update 8 4 write-only CUPRUPD Comparison x Update Period Update 16 4 write-only CMPV4 PWM Comparison 4 Value Register 0x00000170 32 read-write 0x00000000 CV Comparison x Value 0 24 read-write CVM Comparison x Value Mode 24 1 read-write CMPVUPD4 PWM Comparison 4 Value Update Register 0x00000174 32 write-only CVUPD Comparison x Value Update 0 24 write-only CVMUPD Comparison x Value Mode Update 24 1 write-only CMPM4 PWM Comparison 4 Mode Register 0x00000178 32 read-write 0x00000000 CEN Comparison x Enable 0 1 read-write CTR Comparison x Trigger 4 4 read-write CPR Comparison x Period 8 4 read-write CPRCNT Comparison x Period Counter 12 4 read-write CUPR Comparison x Update Period 16 4 read-write CUPRCNT Comparison x Update Period Counter 20 4 read-write CMPMUPD4 PWM Comparison 4 Mode Update Register 0x0000017C 32 write-only CENUPD Comparison x Enable Update 0 1 write-only CTRUPD Comparison x Trigger Update 4 4 write-only CPRUPD Comparison x Period Update 8 4 write-only CUPRUPD Comparison x Update Period Update 16 4 write-only CMPV5 PWM Comparison 5 Value Register 0x00000180 32 read-write 0x00000000 CV Comparison x Value 0 24 read-write CVM Comparison x Value Mode 24 1 read-write CMPVUPD5 PWM Comparison 5 Value Update Register 0x00000184 32 write-only CVUPD Comparison x Value Update 0 24 write-only CVMUPD Comparison x Value Mode Update 24 1 write-only CMPM5 PWM Comparison 5 Mode Register 0x00000188 32 read-write 0x00000000 CEN Comparison x Enable 0 1 read-write CTR Comparison x Trigger 4 4 read-write CPR Comparison x Period 8 4 read-write CPRCNT Comparison x Period Counter 12 4 read-write CUPR Comparison x Update Period 16 4 read-write CUPRCNT Comparison x Update Period Counter 20 4 read-write CMPMUPD5 PWM Comparison 5 Mode Update Register 0x0000018C 32 write-only CENUPD Comparison x Enable Update 0 1 write-only CTRUPD Comparison x Trigger Update 4 4 write-only CPRUPD Comparison x Period Update 8 4 write-only CUPRUPD Comparison x Update Period Update 16 4 write-only CMPV6 PWM Comparison 6 Value Register 0x00000190 32 read-write 0x00000000 CV Comparison x Value 0 24 read-write CVM Comparison x Value Mode 24 1 read-write CMPVUPD6 PWM Comparison 6 Value Update Register 0x00000194 32 write-only CVUPD Comparison x Value Update 0 24 write-only CVMUPD Comparison x Value Mode Update 24 1 write-only CMPM6 PWM Comparison 6 Mode Register 0x00000198 32 read-write 0x00000000 CEN Comparison x Enable 0 1 read-write CTR Comparison x Trigger 4 4 read-write CPR Comparison x Period 8 4 read-write CPRCNT Comparison x Period Counter 12 4 read-write CUPR Comparison x Update Period 16 4 read-write CUPRCNT Comparison x Update Period Counter 20 4 read-write CMPMUPD6 PWM Comparison 6 Mode Update Register 0x0000019C 32 write-only CENUPD Comparison x Enable Update 0 1 write-only CTRUPD Comparison x Trigger Update 4 4 write-only CPRUPD Comparison x Period Update 8 4 write-only CUPRUPD Comparison x Update Period Update 16 4 write-only CMPV7 PWM Comparison 7 Value Register 0x000001A0 32 read-write 0x00000000 CV Comparison x Value 0 24 read-write CVM Comparison x Value Mode 24 1 read-write CMPVUPD7 PWM Comparison 7 Value Update Register 0x000001A4 32 write-only CVUPD Comparison x Value Update 0 24 write-only CVMUPD Comparison x Value Mode Update 24 1 write-only CMPM7 PWM Comparison 7 Mode Register 0x000001A8 32 read-write 0x00000000 CEN Comparison x Enable 0 1 read-write CTR Comparison x Trigger 4 4 read-write CPR Comparison x Period 8 4 read-write CPRCNT Comparison x Period Counter 12 4 read-write CUPR Comparison x Update Period 16 4 read-write CUPRCNT Comparison x Update Period Counter 20 4 read-write CMPMUPD7 PWM Comparison 7 Mode Update Register 0x000001AC 32 write-only CENUPD Comparison x Enable Update 0 1 write-only CTRUPD Comparison x Trigger Update 4 4 write-only CPRUPD Comparison x Period Update 8 4 write-only CUPRUPD Comparison x Update Period Update 16 4 write-only CMR0 PWM Channel Mode Register (ch_num = 0) 0x00000200 32 read-write 0x00000000 CPRE Channel Pre-scaler 0 4 read-write MCK Master clock 0x0 MCK_DIV_2 Master clock/2 0x1 MCK_DIV_4 Master clock/4 0x2 MCK_DIV_8 Master clock/8 0x3 MCK_DIV_16 Master clock/16 0x4 MCK_DIV_32 Master clock/32 0x5 MCK_DIV_64 Master clock/64 0x6 MCK_DIV_128 Master clock/128 0x7 MCK_DIV_256 Master clock/256 0x8 MCK_DIV_512 Master clock/512 0x9 MCK_DIV_1024 Master clock/1024 0xA CLKA Clock A 0xB CLKB Clock B 0xC CALG Channel Alignment 8 1 read-write CPOL Channel Polarity 9 1 read-write CES Counter Event Selection 10 1 read-write DTE Dead-Time Generator Enable 16 1 read-write DTHI Dead-Time PWMHx Output Inverted 17 1 read-write DTLI Dead-Time PWMLx Output Inverted 18 1 read-write CDTY0 PWM Channel Duty Cycle Register (ch_num = 0) 0x00000204 32 read-write 0x00000000 CDTY Channel Duty-Cycle 0 24 read-write CDTYUPD0 PWM Channel Duty Cycle Update Register (ch_num = 0) 0x00000208 32 write-only CDTYUPD Channel Duty-Cycle Update 0 24 write-only CPRD0 PWM Channel Period Register (ch_num = 0) 0x0000020C 32 read-write 0x00000000 CPRD Channel Period 0 24 read-write CPRDUPD0 PWM Channel Period Update Register (ch_num = 0) 0x00000210 32 write-only CPRDUPD Channel Period Update 0 24 write-only CCNT0 PWM Channel Counter Register (ch_num = 0) 0x00000214 32 read-only 0x00000000 CNT Channel Counter Register 0 24 read-only DT0 PWM Channel Dead Time Register (ch_num = 0) 0x00000218 32 read-write 0x00000000 DTH Dead-Time Value for PWMHx Output 0 16 read-write DTL Dead-Time Value for PWMLx Output 16 16 read-write DTUPD0 PWM Channel Dead Time Update Register (ch_num = 0) 0x0000021C 32 write-only DTHUPD Dead-Time Value Update for PWMHx Output 0 16 write-only DTLUPD Dead-Time Value Update for PWMLx Output 16 16 write-only CMR1 PWM Channel Mode Register (ch_num = 1) 0x00000220 32 read-write 0x00000000 CPRE Channel Pre-scaler 0 4 read-write MCK Master clock 0x0 MCK_DIV_2 Master clock/2 0x1 MCK_DIV_4 Master clock/4 0x2 MCK_DIV_8 Master clock/8 0x3 MCK_DIV_16 Master clock/16 0x4 MCK_DIV_32 Master clock/32 0x5 MCK_DIV_64 Master clock/64 0x6 MCK_DIV_128 Master clock/128 0x7 MCK_DIV_256 Master clock/256 0x8 MCK_DIV_512 Master clock/512 0x9 MCK_DIV_1024 Master clock/1024 0xA CLKA Clock A 0xB CLKB Clock B 0xC CALG Channel Alignment 8 1 read-write CPOL Channel Polarity 9 1 read-write CES Counter Event Selection 10 1 read-write DTE Dead-Time Generator Enable 16 1 read-write DTHI Dead-Time PWMHx Output Inverted 17 1 read-write DTLI Dead-Time PWMLx Output Inverted 18 1 read-write CDTY1 PWM Channel Duty Cycle Register (ch_num = 1) 0x00000224 32 read-write 0x00000000 CDTY Channel Duty-Cycle 0 24 read-write CDTYUPD1 PWM Channel Duty Cycle Update Register (ch_num = 1) 0x00000228 32 write-only CDTYUPD Channel Duty-Cycle Update 0 24 write-only CPRD1 PWM Channel Period Register (ch_num = 1) 0x0000022C 32 read-write 0x00000000 CPRD Channel Period 0 24 read-write CPRDUPD1 PWM Channel Period Update Register (ch_num = 1) 0x00000230 32 write-only CPRDUPD Channel Period Update 0 24 write-only CCNT1 PWM Channel Counter Register (ch_num = 1) 0x00000234 32 read-only 0x00000000 CNT Channel Counter Register 0 24 read-only DT1 PWM Channel Dead Time Register (ch_num = 1) 0x00000238 32 read-write 0x00000000 DTH Dead-Time Value for PWMHx Output 0 16 read-write DTL Dead-Time Value for PWMLx Output 16 16 read-write DTUPD1 PWM Channel Dead Time Update Register (ch_num = 1) 0x0000023C 32 write-only DTHUPD Dead-Time Value Update for PWMHx Output 0 16 write-only DTLUPD Dead-Time Value Update for PWMLx Output 16 16 write-only CMR2 PWM Channel Mode Register (ch_num = 2) 0x00000240 32 read-write 0x00000000 CPRE Channel Pre-scaler 0 4 read-write MCK Master clock 0x0 MCK_DIV_2 Master clock/2 0x1 MCK_DIV_4 Master clock/4 0x2 MCK_DIV_8 Master clock/8 0x3 MCK_DIV_16 Master clock/16 0x4 MCK_DIV_32 Master clock/32 0x5 MCK_DIV_64 Master clock/64 0x6 MCK_DIV_128 Master clock/128 0x7 MCK_DIV_256 Master clock/256 0x8 MCK_DIV_512 Master clock/512 0x9 MCK_DIV_1024 Master clock/1024 0xA CLKA Clock A 0xB CLKB Clock B 0xC CALG Channel Alignment 8 1 read-write CPOL Channel Polarity 9 1 read-write CES Counter Event Selection 10 1 read-write DTE Dead-Time Generator Enable 16 1 read-write DTHI Dead-Time PWMHx Output Inverted 17 1 read-write DTLI Dead-Time PWMLx Output Inverted 18 1 read-write CDTY2 PWM Channel Duty Cycle Register (ch_num = 2) 0x00000244 32 read-write 0x00000000 CDTY Channel Duty-Cycle 0 24 read-write CDTYUPD2 PWM Channel Duty Cycle Update Register (ch_num = 2) 0x00000248 32 write-only CDTYUPD Channel Duty-Cycle Update 0 24 write-only CPRD2 PWM Channel Period Register (ch_num = 2) 0x0000024C 32 read-write 0x00000000 CPRD Channel Period 0 24 read-write CPRDUPD2 PWM Channel Period Update Register (ch_num = 2) 0x00000250 32 write-only CPRDUPD Channel Period Update 0 24 write-only CCNT2 PWM Channel Counter Register (ch_num = 2) 0x00000254 32 read-only 0x00000000 CNT Channel Counter Register 0 24 read-only DT2 PWM Channel Dead Time Register (ch_num = 2) 0x00000258 32 read-write 0x00000000 DTH Dead-Time Value for PWMHx Output 0 16 read-write DTL Dead-Time Value for PWMLx Output 16 16 read-write DTUPD2 PWM Channel Dead Time Update Register (ch_num = 2) 0x0000025C 32 write-only DTHUPD Dead-Time Value Update for PWMHx Output 0 16 write-only DTLUPD Dead-Time Value Update for PWMLx Output 16 16 write-only CMR3 PWM Channel Mode Register (ch_num = 3) 0x00000260 32 read-write 0x00000000 CPRE Channel Pre-scaler 0 4 read-write MCK Master clock 0x0 MCK_DIV_2 Master clock/2 0x1 MCK_DIV_4 Master clock/4 0x2 MCK_DIV_8 Master clock/8 0x3 MCK_DIV_16 Master clock/16 0x4 MCK_DIV_32 Master clock/32 0x5 MCK_DIV_64 Master clock/64 0x6 MCK_DIV_128 Master clock/128 0x7 MCK_DIV_256 Master clock/256 0x8 MCK_DIV_512 Master clock/512 0x9 MCK_DIV_1024 Master clock/1024 0xA CLKA Clock A 0xB CLKB Clock B 0xC CALG Channel Alignment 8 1 read-write CPOL Channel Polarity 9 1 read-write CES Counter Event Selection 10 1 read-write DTE Dead-Time Generator Enable 16 1 read-write DTHI Dead-Time PWMHx Output Inverted 17 1 read-write DTLI Dead-Time PWMLx Output Inverted 18 1 read-write CDTY3 PWM Channel Duty Cycle Register (ch_num = 3) 0x00000264 32 read-write 0x00000000 CDTY Channel Duty-Cycle 0 24 read-write CDTYUPD3 PWM Channel Duty Cycle Update Register (ch_num = 3) 0x00000268 32 write-only CDTYUPD Channel Duty-Cycle Update 0 24 write-only CPRD3 PWM Channel Period Register (ch_num = 3) 0x0000026C 32 read-write 0x00000000 CPRD Channel Period 0 24 read-write CPRDUPD3 PWM Channel Period Update Register (ch_num = 3) 0x00000270 32 write-only CPRDUPD Channel Period Update 0 24 write-only CCNT3 PWM Channel Counter Register (ch_num = 3) 0x00000274 32 read-only 0x00000000 CNT Channel Counter Register 0 24 read-only DT3 PWM Channel Dead Time Register (ch_num = 3) 0x00000278 32 read-write 0x00000000 DTH Dead-Time Value for PWMHx Output 0 16 read-write DTL Dead-Time Value for PWMLx Output 16 16 read-write DTUPD3 PWM Channel Dead Time Update Register (ch_num = 3) 0x0000027C 32 write-only DTHUPD Dead-Time Value Update for PWMHx Output 0 16 write-only DTLUPD Dead-Time Value Update for PWMLx Output 16 16 write-only TPR Transmit Pointer Register 0x00000108 32 read-write 0x00000000 TXPTR Transmit Counter Register 0 32 read-write TCR Transmit Counter Register 0x0000010C 32 read-write 0x00000000 TXCTR Transmit Counter Register 0 16 read-write TNPR Transmit Next Pointer Register 0x00000118 32 read-write 0x00000000 TXNPTR Transmit Next Pointer 0 32 read-write TNCR Transmit Next Counter Register 0x0000011C 32 read-write 0x00000000 TXNCTR Transmit Counter Next 0 16 read-write PTCR Transfer Control Register 0x00000120 32 write-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 write-only RXTDIS Receiver Transfer Disable 1 1 write-only TXTEN Transmitter Transfer Enable 8 1 write-only TXTDIS Transmitter Transfer Disable 9 1 write-only PTSR Transfer Status Register 0x00000124 32 read-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 read-only TXTEN Transmitter Transfer Enable 8 1 read-only USART0 6089ZC Universal Synchronous Asynchronous Receiver Transmitter 0 USART USART0_ 0x40024000 0 0x4000 registers USART0 14 CR Control Register 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only STTBRK Start Break 9 1 write-only STPBRK Stop Break 10 1 write-only STTTO Start Time-out 11 1 write-only SENDA Send Address 12 1 write-only RSTIT Reset Iterations 13 1 write-only RSTNACK Reset Non Acknowledge 14 1 write-only RETTO Rearm Time-out 15 1 write-only DTREN Data Terminal Ready Enable 16 1 write-only DTRDIS Data Terminal Ready Disable 17 1 write-only RTSEN Request to Send Enable 18 1 write-only RTSDIS Request to Send Disable 19 1 write-only CR_SPI_MODE Control Register SPI_MODE 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only FCS Force SPI Chip Select 18 1 write-only RCS Release SPI Chip Select 19 1 write-only MR Mode Register 0x00000004 32 read-write USART_MODE USART Mode of Operation 0 4 read-write NORMAL Normal mode 0x0 RS485 RS485 0x1 HW_HANDSHAKING Hardware Handshaking 0x2 MODEM Modem 0x3 IS07816_T_0 IS07816 Protocol: T = 0 0x4 IS07816_T_1 IS07816 Protocol: T = 1 0x6 IRDA IrDA 0x8 SPI_MASTER SPI Master 0xE SPI_SLAVE SPI Slave 0xF USCLKS Clock Selection 4 2 read-write MCK Master Clock MCK is selected 0x0 DIV Internal Clock Divided MCK/DIV (DIV=8) is selected 0x1 SCK Serial Clock SLK is selected 0x3 CHRL Character Length. 6 2 read-write 5_BIT Character length is 5 bits 0x0 6_BIT Character length is 6 bits 0x1 7_BIT Character length is 7 bits 0x2 8_BIT Character length is 8 bits 0x3 SYNC Synchronous Mode Select 8 1 read-write PAR Parity Type 9 3 read-write EVEN Even parity 0x0 ODD Odd parity 0x1 SPACE Parity forced to 0 (Space) 0x2 MARK Parity forced to 1 (Mark) 0x3 NO No parity 0x4 MULTIDROP Multidrop mode 0x6 NBSTOP Number of Stop Bits 12 2 read-write 1_BIT 1 stop bit 0x0 1_5_BIT 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1) 0x1 2_BIT 2 stop bits 0x2 CHMODE Channel Mode 14 2 read-write NORMAL Normal Mode 0x0 AUTOMATIC Automatic Echo. Receiver input is connected to the TXD pin. 0x1 LOCAL_LOOPBACK Local Loopback. Transmitter output is connected to the Receiver Input. 0x2 REMOTE_LOOPBACK Remote Loopback. RXD pin is internally connected to the TXD pin. 0x3 MSBF Bit Order 16 1 read-write MODE9 9-bit Character Length 17 1 read-write CLKO Clock Output Select 18 1 read-write OVER Oversampling Mode 19 1 read-write INACK Inhibit Non Acknowledge 20 1 read-write DSNACK Disable Successive NACK 21 1 read-write VAR_SYNC Variable Synchronization of Command/Data Sync Start Frame Delimiter 22 1 read-write INVDATA Inverted Data 23 1 read-write MAX_ITERATION Maximum Number of Automatic Iteration 24 3 read-write FILTER Infrared Receive Line Filter 28 1 read-write MAN Manchester Encoder/Decoder Enable 29 1 read-write MODSYNC Manchester Synchronization Mode 30 1 read-write ONEBIT Start Frame Delimiter Selector 31 1 read-write MR_SPI_MODE Mode Register SPI_MODE 0x00000004 32 read-write USART_MODE USART Mode of Operation 0 4 read-write SPI_MASTER SPI Master 0xE SPI_SLAVE SPI Slave 0xF USCLKS Clock Selection 4 2 read-write MCK Master Clock MCK is selected 0x0 DIV Internal Clock Divided MCK/DIV (DIV=8) is selected 0x1 SCK Serial Clock SLK is selected 0x3 CHRL Character Length. 6 2 read-write 8_BIT Character length is 8 bits 0x3 CPHA SPI Clock Phase 8 1 read-write CPOL SPI Clock Polarity 16 1 read-write WRDBT Wait Read Data Before Transfer 20 1 read-write IER Interrupt Enable Register 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only RXBRK Receiver Break Interrupt Enable 2 1 write-only ENDRX End of Receive Transfer Interrupt Enable (available in all USART modes of operation) 3 1 write-only ENDTX End of Transmit Interrupt Enable (available in all USART modes of operation) 4 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Enable 6 1 write-only PARE Parity Error Interrupt Enable 7 1 write-only TIMEOUT Time-out Interrupt Enable 8 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only ITER Max number of Repetitions Reached Interrupt Enable 10 1 write-only TXBUFE Buffer Empty Interrupt Enable (available in all USART modes of operation) 11 1 write-only RXBUFF Buffer Full Interrupt Enable (available in all USART modes of operation) 12 1 write-only NACK Non AcknowledgeInterrupt Enable 13 1 write-only RIIC Ring Indicator Input Change Enable 16 1 write-only DSRIC Data Set Ready Input Change Enable 17 1 write-only DCDIC Data Carrier Detect Input Change Interrupt Enable 18 1 write-only CTSIC Clear to Send Input Change Interrupt Enable 19 1 write-only MANE Manchester Error Interrupt Enable 24 1 write-only IER_SPI_MODE Interrupt Enable Register SPI_MODE 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only ENDRX 3 1 write-only ENDTX 4 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only UNRE SPI Underrun Error Interrupt Enable 10 1 write-only TXBUFE 11 1 write-only RXBUFF 12 1 write-only IDR Interrupt Disable Register 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only RXBRK Receiver Break Interrupt Disable 2 1 write-only ENDRX End of Receive Transfer Interrupt Disable (available in all USART modes of operation) 3 1 write-only ENDTX End of Transmit Interrupt Disable (available in all USART modes of operation) 4 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Disable 6 1 write-only PARE Parity Error Interrupt Disable 7 1 write-only TIMEOUT Time-out Interrupt Disable 8 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only ITER Max Number of Repetitions Reached Interrupt Disable 10 1 write-only TXBUFE Buffer Empty Interrupt Disable (available in all USART modes of operation) 11 1 write-only RXBUFF Buffer Full Interrupt Disable (available in all USART modes of operation) 12 1 write-only NACK Non AcknowledgeInterrupt Disable 13 1 write-only RIIC Ring Indicator Input Change Disable 16 1 write-only DSRIC Data Set Ready Input Change Disable 17 1 write-only DCDIC Data Carrier Detect Input Change Interrupt Disable 18 1 write-only CTSIC Clear to Send Input Change Interrupt Disable 19 1 write-only MANE Manchester Error Interrupt Disable 24 1 write-only IDR_SPI_MODE Interrupt Disable Register SPI_MODE 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only ENDRX 3 1 write-only ENDTX 4 1 write-only OVRE Overrun Error Interrupt Disable 5 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only UNRE SPI Underrun Error Interrupt Disable 10 1 write-only TXBUFE 11 1 write-only RXBUFF 12 1 write-only IMR Interrupt Mask Register 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only RXBRK Receiver Break Interrupt Mask 2 1 read-only ENDRX End of Receive Transfer Interrupt Mask (available in all USART modes of operation) 3 1 read-only ENDTX End of Transmit Interrupt Mask (available in all USART modes of operation) 4 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only FRAME Framing Error Interrupt Mask 6 1 read-only PARE Parity Error Interrupt Mask 7 1 read-only TIMEOUT Time-out Interrupt Mask 8 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only ITER Max Number of Repetitions Reached Interrupt Mask 10 1 read-only TXBUFE Buffer Empty Interrupt Mask (available in all USART modes of operation) 11 1 read-only RXBUFF Buffer Full Interrupt Mask (available in all USART modes of operation) 12 1 read-only NACK Non AcknowledgeInterrupt Mask 13 1 read-only RIIC Ring Indicator Input Change Mask 16 1 read-only DSRIC Data Set Ready Input Change Mask 17 1 read-only DCDIC Data Carrier Detect Input Change Interrupt Mask 18 1 read-only CTSIC Clear to Send Input Change Interrupt Mask 19 1 read-only MANE Manchester Error Interrupt Mask 24 1 read-only IMR_SPI_MODE Interrupt Mask Register SPI_MODE 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only ENDRX 3 1 read-only ENDTX 4 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only UNRE SPI Underrun Error Interrupt Mask 10 1 read-only TXBUFE 11 1 read-only RXBUFF 12 1 read-only CSR Channel Status Register 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only RXBRK Break Received/End of Break 2 1 read-only ENDRX End of Receiver Transfer 3 1 read-only ENDTX End of Transmitter Transfer 4 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TIMEOUT Receiver Time-out 8 1 read-only TXEMPTY Transmitter Empty 9 1 read-only ITER Max Number of Repetitions Reached 10 1 read-only TXBUFE Transmission Buffer Empty 11 1 read-only RXBUFF Reception Buffer Full 12 1 read-only NACK Non AcknowledgeInterrupt 13 1 read-only RIIC Ring Indicator Input Change Flag 16 1 read-only DSRIC Data Set Ready Input Change Flag 17 1 read-only DCDIC Data Carrier Detect Input Change Flag 18 1 read-only CTSIC Clear to Send Input Change Flag 19 1 read-only RI Image of RI Input 20 1 read-only DSR Image of DSR Input 21 1 read-only DCD Image of DCD Input 22 1 read-only CTS Image of CTS Input 23 1 read-only MANERR Manchester Error 24 1 read-only CSR_SPI_MODE Channel Status Register SPI_MODE 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only ENDRX 3 1 read-only ENDTX 4 1 read-only OVRE Overrun Error 5 1 read-only TXEMPTY Transmitter Empty 9 1 read-only UNRE Underrun Error 10 1 read-only TXBUFE 11 1 read-only RXBUFF 12 1 read-only RHR Receiver Holding Register 0x00000018 32 read-only 0x00000000 RXCHR Received Character 0 9 read-only RXSYNH Received Sync 15 1 read-only THR Transmitter Holding Register 0x0000001C 32 write-only TXCHR Character to be Transmitted 0 9 write-only TXSYNH Sync Field to be Transmitted 15 1 write-only BRGR Baud Rate Generator Register 0x00000020 32 read-write 0x00000000 CD Clock Divider 0 16 read-write FP Fractional Part 16 3 read-write RTOR Receiver Time-out Register 0x00000024 32 read-write 0x00000000 TO Time-out Value 0 16 read-write TTGR Transmitter Timeguard Register 0x00000028 32 read-write 0x00000000 TG Timeguard Value 0 8 read-write FIDI FI DI Ratio Register 0x00000040 32 read-write 0x00000174 FI_DI_RATIO FI Over DI Ratio Value 0 16 read-write NER Number of Errors Register 0x00000044 32 read-only NB_ERRORS Number of Errors 0 8 read-only IF IrDA Filter Register 0x0000004C 32 read-write 0x00000000 IRDA_FILTER IrDA Filter 0 8 read-write MAN Manchester Encoder Decoder Register 0x00000050 32 read-write 0xB0011004 TX_PL Transmitter Preamble Length 0 4 read-write TX_PP Transmitter Preamble Pattern 8 2 read-write ALL_ONE The preamble is composed of '1's 0x0 ALL_ZERO The preamble is composed of '0's 0x1 ZERO_ONE The preamble is composed of '01's 0x2 ONE_ZERO The preamble is composed of '10's 0x3 TX_MPOL Transmitter Manchester Polarity 12 1 read-write RX_PL Receiver Preamble Length 16 4 read-write RX_PP Receiver Preamble Pattern detected 24 2 read-write ALL_ONE The preamble is composed of '1's 0x0 ALL_ZERO The preamble is composed of '0's 0x1 ZERO_ONE The preamble is composed of '01's 0x2 ONE_ZERO The preamble is composed of '10's 0x3 RX_MPOL Receiver Manchester Polarity 28 1 read-write ONE Must Be Set to 1 29 1 read-write DRIFT Drift Compensation 30 1 read-write WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY. 8 24 read-write PASSWD Writing any other value in this field aborts the write operation of the WPEN bit. Always reads as 0. 0x555341 WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only VERSION Version Register 0x000000FC 32 read-only VERSION Hardware Module Version 0 12 read-only MFN Metal Fix Number 16 3 read-only RPR Receive Pointer Register 0x00000100 32 read-write 0x00000000 RXPTR Receive Pointer Register 0 32 read-write RCR Receive Counter Register 0x00000104 32 read-write 0x00000000 RXCTR Receive Counter Register 0 16 read-write TPR Transmit Pointer Register 0x00000108 32 read-write 0x00000000 TXPTR Transmit Counter Register 0 32 read-write TCR Transmit Counter Register 0x0000010C 32 read-write 0x00000000 TXCTR Transmit Counter Register 0 16 read-write RNPR Receive Next Pointer Register 0x00000110 32 read-write 0x00000000 RXNPTR Receive Next Pointer 0 32 read-write RNCR Receive Next Counter Register 0x00000114 32 read-write 0x00000000 RXNCTR Receive Next Counter 0 16 read-write TNPR Transmit Next Pointer Register 0x00000118 32 read-write 0x00000000 TXNPTR Transmit Next Pointer 0 32 read-write TNCR Transmit Next Counter Register 0x0000011C 32 read-write 0x00000000 TXNCTR Transmit Counter Next 0 16 read-write PTCR Transfer Control Register 0x00000120 32 write-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 write-only RXTDIS Receiver Transfer Disable 1 1 write-only TXTEN Transmitter Transfer Enable 8 1 write-only TXTDIS Transmitter Transfer Disable 9 1 write-only PTSR Transfer Status Register 0x00000124 32 read-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 read-only TXTEN Transmitter Transfer Enable 8 1 read-only USART1 6089ZC Universal Synchronous Asynchronous Receiver Transmitter 1 USART USART1_ 0x40028000 0 0x4000 registers USART1 15 CR Control Register 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only STTBRK Start Break 9 1 write-only STPBRK Stop Break 10 1 write-only STTTO Start Time-out 11 1 write-only SENDA Send Address 12 1 write-only RSTIT Reset Iterations 13 1 write-only RSTNACK Reset Non Acknowledge 14 1 write-only RETTO Rearm Time-out 15 1 write-only DTREN Data Terminal Ready Enable 16 1 write-only DTRDIS Data Terminal Ready Disable 17 1 write-only RTSEN Request to Send Enable 18 1 write-only RTSDIS Request to Send Disable 19 1 write-only CR_SPI_MODE Control Register SPI_MODE 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only FCS Force SPI Chip Select 18 1 write-only RCS Release SPI Chip Select 19 1 write-only MR Mode Register 0x00000004 32 read-write USART_MODE USART Mode of Operation 0 4 read-write NORMAL Normal mode 0x0 RS485 RS485 0x1 HW_HANDSHAKING Hardware Handshaking 0x2 MODEM Modem 0x3 IS07816_T_0 IS07816 Protocol: T = 0 0x4 IS07816_T_1 IS07816 Protocol: T = 1 0x6 IRDA IrDA 0x8 SPI_MASTER SPI Master 0xE SPI_SLAVE SPI Slave 0xF USCLKS Clock Selection 4 2 read-write MCK Master Clock MCK is selected 0x0 DIV Internal Clock Divided MCK/DIV (DIV=8) is selected 0x1 SCK Serial Clock SLK is selected 0x3 CHRL Character Length. 6 2 read-write 5_BIT Character length is 5 bits 0x0 6_BIT Character length is 6 bits 0x1 7_BIT Character length is 7 bits 0x2 8_BIT Character length is 8 bits 0x3 SYNC Synchronous Mode Select 8 1 read-write PAR Parity Type 9 3 read-write EVEN Even parity 0x0 ODD Odd parity 0x1 SPACE Parity forced to 0 (Space) 0x2 MARK Parity forced to 1 (Mark) 0x3 NO No parity 0x4 MULTIDROP Multidrop mode 0x6 NBSTOP Number of Stop Bits 12 2 read-write 1_BIT 1 stop bit 0x0 1_5_BIT 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1) 0x1 2_BIT 2 stop bits 0x2 CHMODE Channel Mode 14 2 read-write NORMAL Normal Mode 0x0 AUTOMATIC Automatic Echo. Receiver input is connected to the TXD pin. 0x1 LOCAL_LOOPBACK Local Loopback. Transmitter output is connected to the Receiver Input. 0x2 REMOTE_LOOPBACK Remote Loopback. RXD pin is internally connected to the TXD pin. 0x3 MSBF Bit Order 16 1 read-write MODE9 9-bit Character Length 17 1 read-write CLKO Clock Output Select 18 1 read-write OVER Oversampling Mode 19 1 read-write INACK Inhibit Non Acknowledge 20 1 read-write DSNACK Disable Successive NACK 21 1 read-write VAR_SYNC Variable Synchronization of Command/Data Sync Start Frame Delimiter 22 1 read-write INVDATA Inverted Data 23 1 read-write MAX_ITERATION Maximum Number of Automatic Iteration 24 3 read-write FILTER Infrared Receive Line Filter 28 1 read-write MAN Manchester Encoder/Decoder Enable 29 1 read-write MODSYNC Manchester Synchronization Mode 30 1 read-write ONEBIT Start Frame Delimiter Selector 31 1 read-write MR_SPI_MODE Mode Register SPI_MODE 0x00000004 32 read-write USART_MODE USART Mode of Operation 0 4 read-write SPI_MASTER SPI Master 0xE SPI_SLAVE SPI Slave 0xF USCLKS Clock Selection 4 2 read-write MCK Master Clock MCK is selected 0x0 DIV Internal Clock Divided MCK/DIV (DIV=8) is selected 0x1 SCK Serial Clock SLK is selected 0x3 CHRL Character Length. 6 2 read-write 8_BIT Character length is 8 bits 0x3 CPHA SPI Clock Phase 8 1 read-write CPOL SPI Clock Polarity 16 1 read-write WRDBT Wait Read Data Before Transfer 20 1 read-write IER Interrupt Enable Register 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only RXBRK Receiver Break Interrupt Enable 2 1 write-only ENDRX End of Receive Transfer Interrupt Enable (available in all USART modes of operation) 3 1 write-only ENDTX End of Transmit Interrupt Enable (available in all USART modes of operation) 4 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Enable 6 1 write-only PARE Parity Error Interrupt Enable 7 1 write-only TIMEOUT Time-out Interrupt Enable 8 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only ITER Max number of Repetitions Reached Interrupt Enable 10 1 write-only TXBUFE Buffer Empty Interrupt Enable (available in all USART modes of operation) 11 1 write-only RXBUFF Buffer Full Interrupt Enable (available in all USART modes of operation) 12 1 write-only NACK Non AcknowledgeInterrupt Enable 13 1 write-only RIIC Ring Indicator Input Change Enable 16 1 write-only DSRIC Data Set Ready Input Change Enable 17 1 write-only DCDIC Data Carrier Detect Input Change Interrupt Enable 18 1 write-only CTSIC Clear to Send Input Change Interrupt Enable 19 1 write-only MANE Manchester Error Interrupt Enable 24 1 write-only IER_SPI_MODE Interrupt Enable Register SPI_MODE 0x00000008 32 write-only RXRDY RXRDY Interrupt Enable 0 1 write-only TXRDY TXRDY Interrupt Enable 1 1 write-only ENDRX 3 1 write-only ENDTX 4 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only TXEMPTY TXEMPTY Interrupt Enable 9 1 write-only UNRE SPI Underrun Error Interrupt Enable 10 1 write-only TXBUFE 11 1 write-only RXBUFF 12 1 write-only IDR Interrupt Disable Register 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only RXBRK Receiver Break Interrupt Disable 2 1 write-only ENDRX End of Receive Transfer Interrupt Disable (available in all USART modes of operation) 3 1 write-only ENDTX End of Transmit Interrupt Disable (available in all USART modes of operation) 4 1 write-only OVRE Overrun Error Interrupt Enable 5 1 write-only FRAME Framing Error Interrupt Disable 6 1 write-only PARE Parity Error Interrupt Disable 7 1 write-only TIMEOUT Time-out Interrupt Disable 8 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only ITER Max Number of Repetitions Reached Interrupt Disable 10 1 write-only TXBUFE Buffer Empty Interrupt Disable (available in all USART modes of operation) 11 1 write-only RXBUFF Buffer Full Interrupt Disable (available in all USART modes of operation) 12 1 write-only NACK Non AcknowledgeInterrupt Disable 13 1 write-only RIIC Ring Indicator Input Change Disable 16 1 write-only DSRIC Data Set Ready Input Change Disable 17 1 write-only DCDIC Data Carrier Detect Input Change Interrupt Disable 18 1 write-only CTSIC Clear to Send Input Change Interrupt Disable 19 1 write-only MANE Manchester Error Interrupt Disable 24 1 write-only IDR_SPI_MODE Interrupt Disable Register SPI_MODE 0x0000000C 32 write-only RXRDY RXRDY Interrupt Disable 0 1 write-only TXRDY TXRDY Interrupt Disable 1 1 write-only ENDRX 3 1 write-only ENDTX 4 1 write-only OVRE Overrun Error Interrupt Disable 5 1 write-only TXEMPTY TXEMPTY Interrupt Disable 9 1 write-only UNRE SPI Underrun Error Interrupt Disable 10 1 write-only TXBUFE 11 1 write-only RXBUFF 12 1 write-only IMR Interrupt Mask Register 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only RXBRK Receiver Break Interrupt Mask 2 1 read-only ENDRX End of Receive Transfer Interrupt Mask (available in all USART modes of operation) 3 1 read-only ENDTX End of Transmit Interrupt Mask (available in all USART modes of operation) 4 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only FRAME Framing Error Interrupt Mask 6 1 read-only PARE Parity Error Interrupt Mask 7 1 read-only TIMEOUT Time-out Interrupt Mask 8 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only ITER Max Number of Repetitions Reached Interrupt Mask 10 1 read-only TXBUFE Buffer Empty Interrupt Mask (available in all USART modes of operation) 11 1 read-only RXBUFF Buffer Full Interrupt Mask (available in all USART modes of operation) 12 1 read-only NACK Non AcknowledgeInterrupt Mask 13 1 read-only RIIC Ring Indicator Input Change Mask 16 1 read-only DSRIC Data Set Ready Input Change Mask 17 1 read-only DCDIC Data Carrier Detect Input Change Interrupt Mask 18 1 read-only CTSIC Clear to Send Input Change Interrupt Mask 19 1 read-only MANE Manchester Error Interrupt Mask 24 1 read-only IMR_SPI_MODE Interrupt Mask Register SPI_MODE 0x00000010 32 read-only 0x00000000 RXRDY RXRDY Interrupt Mask 0 1 read-only TXRDY TXRDY Interrupt Mask 1 1 read-only ENDRX 3 1 read-only ENDTX 4 1 read-only OVRE Overrun Error Interrupt Mask 5 1 read-only TXEMPTY TXEMPTY Interrupt Mask 9 1 read-only UNRE SPI Underrun Error Interrupt Mask 10 1 read-only TXBUFE 11 1 read-only RXBUFF 12 1 read-only CSR Channel Status Register 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only RXBRK Break Received/End of Break 2 1 read-only ENDRX End of Receiver Transfer 3 1 read-only ENDTX End of Transmitter Transfer 4 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TIMEOUT Receiver Time-out 8 1 read-only TXEMPTY Transmitter Empty 9 1 read-only ITER Max Number of Repetitions Reached 10 1 read-only TXBUFE Transmission Buffer Empty 11 1 read-only RXBUFF Reception Buffer Full 12 1 read-only NACK Non AcknowledgeInterrupt 13 1 read-only RIIC Ring Indicator Input Change Flag 16 1 read-only DSRIC Data Set Ready Input Change Flag 17 1 read-only DCDIC Data Carrier Detect Input Change Flag 18 1 read-only CTSIC Clear to Send Input Change Flag 19 1 read-only RI Image of RI Input 20 1 read-only DSR Image of DSR Input 21 1 read-only DCD Image of DCD Input 22 1 read-only CTS Image of CTS Input 23 1 read-only MANERR Manchester Error 24 1 read-only CSR_SPI_MODE Channel Status Register SPI_MODE 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only ENDRX 3 1 read-only ENDTX 4 1 read-only OVRE Overrun Error 5 1 read-only TXEMPTY Transmitter Empty 9 1 read-only UNRE Underrun Error 10 1 read-only TXBUFE 11 1 read-only RXBUFF 12 1 read-only RHR Receiver Holding Register 0x00000018 32 read-only 0x00000000 RXCHR Received Character 0 9 read-only RXSYNH Received Sync 15 1 read-only THR Transmitter Holding Register 0x0000001C 32 write-only TXCHR Character to be Transmitted 0 9 write-only TXSYNH Sync Field to be Transmitted 15 1 write-only BRGR Baud Rate Generator Register 0x00000020 32 read-write 0x00000000 CD Clock Divider 0 16 read-write FP Fractional Part 16 3 read-write RTOR Receiver Time-out Register 0x00000024 32 read-write 0x00000000 TO Time-out Value 0 16 read-write TTGR Transmitter Timeguard Register 0x00000028 32 read-write 0x00000000 TG Timeguard Value 0 8 read-write FIDI FI DI Ratio Register 0x00000040 32 read-write 0x00000174 FI_DI_RATIO FI Over DI Ratio Value 0 16 read-write NER Number of Errors Register 0x00000044 32 read-only NB_ERRORS Number of Errors 0 8 read-only IF IrDA Filter Register 0x0000004C 32 read-write 0x00000000 IRDA_FILTER IrDA Filter 0 8 read-write MAN Manchester Encoder Decoder Register 0x00000050 32 read-write 0xB0011004 TX_PL Transmitter Preamble Length 0 4 read-write TX_PP Transmitter Preamble Pattern 8 2 read-write ALL_ONE The preamble is composed of '1's 0x0 ALL_ZERO The preamble is composed of '0's 0x1 ZERO_ONE The preamble is composed of '01's 0x2 ONE_ZERO The preamble is composed of '10's 0x3 TX_MPOL Transmitter Manchester Polarity 12 1 read-write RX_PL Receiver Preamble Length 16 4 read-write RX_PP Receiver Preamble Pattern detected 24 2 read-write ALL_ONE The preamble is composed of '1's 0x0 ALL_ZERO The preamble is composed of '0's 0x1 ZERO_ONE The preamble is composed of '01's 0x2 ONE_ZERO The preamble is composed of '10's 0x3 RX_MPOL Receiver Manchester Polarity 28 1 read-write ONE Must Be Set to 1 29 1 read-write DRIFT Drift Compensation 30 1 read-write WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY. 8 24 read-write PASSWD Writing any other value in this field aborts the write operation of the WPEN bit. Always reads as 0. 0x555341 WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only VERSION Version Register 0x000000FC 32 read-only VERSION Hardware Module Version 0 12 read-only MFN Metal Fix Number 16 3 read-only RPR Receive Pointer Register 0x00000100 32 read-write 0x00000000 RXPTR Receive Pointer Register 0 32 read-write RCR Receive Counter Register 0x00000104 32 read-write 0x00000000 RXCTR Receive Counter Register 0 16 read-write TPR Transmit Pointer Register 0x00000108 32 read-write 0x00000000 TXPTR Transmit Counter Register 0 32 read-write TCR Transmit Counter Register 0x0000010C 32 read-write 0x00000000 TXCTR Transmit Counter Register 0 16 read-write RNPR Receive Next Pointer Register 0x00000110 32 read-write 0x00000000 RXNPTR Receive Next Pointer 0 32 read-write RNCR Receive Next Counter Register 0x00000114 32 read-write 0x00000000 RXNCTR Receive Next Counter 0 16 read-write TNPR Transmit Next Pointer Register 0x00000118 32 read-write 0x00000000 TXNPTR Transmit Next Pointer 0 32 read-write TNCR Transmit Next Counter Register 0x0000011C 32 read-write 0x00000000 TXNCTR Transmit Counter Next 0 16 read-write PTCR Transfer Control Register 0x00000120 32 write-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 write-only RXTDIS Receiver Transfer Disable 1 1 write-only TXTEN Transmitter Transfer Enable 8 1 write-only TXTDIS Transmitter Transfer Disable 9 1 write-only PTSR Transfer Status Register 0x00000124 32 read-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 read-only TXTEN Transmitter Transfer Enable 8 1 read-only UDP 6083V USB Device Port UDP_ 0x40034000 0 0x4000 registers UDP 34 FRM_NUM Frame Number Register 0x00000000 32 read-only 0x00000000 FRM_NUM Frame Number as Defined in the Packet Field Formats 0 11 read-only FRM_ERR Frame Error 16 1 read-only FRM_OK Frame OK 17 1 read-only GLB_STAT Global State Register 0x00000004 32 read-write 0x00000010 FADDEN Function Address Enable 0 1 read-write CONFG Configured 1 1 read-write ESR Enable Send Resume 2 1 read-write RSMINPR 3 1 read-write RMWUPE Remote Wake Up Enable 4 1 read-write FADDR Function Address Register 0x00000008 32 read-write 0x00000100 FADD Function Address Value 0 7 read-write FEN Function Enable 8 1 read-write IER Interrupt Enable Register 0x00000010 32 write-only EP0INT Enable Endpoint 0 Interrupt 0 1 write-only EP1INT Enable Endpoint 1 Interrupt 1 1 write-only EP2INT Enable Endpoint 2Interrupt 2 1 write-only EP3INT Enable Endpoint 3 Interrupt 3 1 write-only EP4INT Enable Endpoint 4 Interrupt 4 1 write-only EP5INT Enable Endpoint 5 Interrupt 5 1 write-only EP6INT Enable Endpoint 6 Interrupt 6 1 write-only EP7INT Enable Endpoint 7 Interrupt 7 1 write-only RXSUSP Enable UDP Suspend Interrupt 8 1 write-only RXRSM Enable UDP Resume Interrupt 9 1 write-only EXTRSM 10 1 write-only SOFINT Enable Start Of Frame Interrupt 11 1 write-only WAKEUP Enable UDP bus Wakeup Interrupt 13 1 write-only IDR Interrupt Disable Register 0x00000014 32 write-only EP0INT Disable Endpoint 0 Interrupt 0 1 write-only EP1INT Disable Endpoint 1 Interrupt 1 1 write-only EP2INT Disable Endpoint 2 Interrupt 2 1 write-only EP3INT Disable Endpoint 3 Interrupt 3 1 write-only EP4INT Disable Endpoint 4 Interrupt 4 1 write-only EP5INT Disable Endpoint 5 Interrupt 5 1 write-only EP6INT Disable Endpoint 6 Interrupt 6 1 write-only EP7INT Disable Endpoint 7 Interrupt 7 1 write-only RXSUSP Disable UDP Suspend Interrupt 8 1 write-only RXRSM Disable UDP Resume Interrupt 9 1 write-only EXTRSM 10 1 write-only SOFINT Disable Start Of Frame Interrupt 11 1 write-only WAKEUP Disable USB Bus Interrupt 13 1 write-only IMR Interrupt Mask Register 0x00000018 32 read-only 0x00001200 EP0INT Mask Endpoint 0 Interrupt 0 1 read-only EP1INT Mask Endpoint 1 Interrupt 1 1 read-only EP2INT Mask Endpoint 2 Interrupt 2 1 read-only EP3INT Mask Endpoint 3 Interrupt 3 1 read-only EP4INT Mask Endpoint 4 Interrupt 4 1 read-only EP5INT Mask Endpoint 5 Interrupt 5 1 read-only EP6INT Mask Endpoint 6 Interrupt 6 1 read-only EP7INT Mask Endpoint 7 Interrupt 7 1 read-only RXSUSP Mask UDP Suspend Interrupt 8 1 read-only RXRSM Mask UDP Resume Interrupt. 9 1 read-only EXTRSM 10 1 read-only SOFINT Mask Start Of Frame Interrupt 11 1 read-only BIT12 UDP_IMR Bit 12 12 1 read-only WAKEUP USB Bus WAKEUP Interrupt 13 1 read-only ISR Interrupt Status Register 0x0000001C 32 read-only EP0INT Endpoint 0 Interrupt Status 0 1 read-only EP1INT Endpoint 1 Interrupt Status 1 1 read-only EP2INT Endpoint 2 Interrupt Status 2 1 read-only EP3INT Endpoint 3 Interrupt Status 3 1 read-only EP4INT Endpoint 4 Interrupt Status 4 1 read-only EP5INT Endpoint 5 Interrupt Status 5 1 read-only EP6INT Endpoint 6 Interrupt Status 6 1 read-only EP7INT Endpoint 7Interrupt Status 7 1 read-only RXSUSP UDP Suspend Interrupt Status 8 1 read-only RXRSM UDP Resume Interrupt Status 9 1 read-only EXTRSM 10 1 read-only SOFINT Start of Frame Interrupt Status 11 1 read-only ENDBUSRES End of BUS Reset Interrupt Status 12 1 read-only WAKEUP UDP Resume Interrupt Status 13 1 read-only ICR Interrupt Clear Register 0x00000020 32 write-only RXSUSP Clear UDP Suspend Interrupt 8 1 write-only RXRSM Clear UDP Resume Interrupt 9 1 write-only EXTRSM 10 1 write-only SOFINT Clear Start Of Frame Interrupt 11 1 write-only ENDBUSRES Clear End of Bus Reset Interrupt 12 1 write-only WAKEUP Clear Wakeup Interrupt 13 1 write-only RST_EP Reset Endpoint Register 0x00000028 32 read-write 0x00000000 EP0 Reset Endpoint 0 0 1 read-write EP1 Reset Endpoint 1 1 1 read-write EP2 Reset Endpoint 2 2 1 read-write EP3 Reset Endpoint 3 3 1 read-write EP4 Reset Endpoint 4 4 1 read-write EP5 Reset Endpoint 5 5 1 read-write EP6 Reset Endpoint 6 6 1 read-write EP7 Reset Endpoint 7 7 1 read-write 8 4 0-7 CSR[%s] Endpoint Control and Status Register 0x00000030 32 read-write TXCOMP Generates an IN Packet with Data Previously Written in the DPR 0 1 read-write RX_DATA_BK0 Receive Data Bank 0 1 1 read-write RXSETUP Received Setup 2 1 read-write STALLSENT Stall Sent 3 1 read-write TXPKTRDY Transmit Packet Ready 4 1 read-write FORCESTALL Force Stall (used by Control, Bulk and Isochronous Endpoints) 5 1 read-write RX_DATA_BK1 Receive Data Bank 1 (only used by endpoints with ping-pong attributes) 6 1 read-write DIR Transfer Direction (only available for control endpoints) 7 1 read-write EPTYPE Endpoint Type 8 3 read-write CTRL Control 0x0 ISO_OUT Isochronous OUT 0x1 BULK_OUT Bulk OUT 0x2 INT_OUT Interrupt OUT 0x3 ISO_IN Isochronous IN 0x5 BULK_IN Bulk IN 0x6 INT_IN Interrupt IN 0x7 DTGLE Data Toggle 11 1 read-write EPEDS Endpoint Enable Disable 15 1 read-write RXBYTECNT Number of Bytes Available in the FIFO 16 11 read-write CSR0_ISOENDPT Endpoint Control and Status Register ISOENDPT 0x00000030 32 read-write TXCOMP Generates an IN Packet with Data Previously Written in the DPR 0 1 read-write RX_DATA_BK0 Receive Data Bank 0 1 1 read-write RXSETUP Received Setup 2 1 read-write ISOERROR A CRC error has been detected in an isochronous transfer 3 1 read-write TXPKTRDY Transmit Packet Ready 4 1 read-write FORCESTALL Force Stall (used by Control, Bulk and Isochronous Endpoints) 5 1 read-write RX_DATA_BK1 Receive Data Bank 1 (only used by endpoints with ping-pong attributes) 6 1 read-write DIR Transfer Direction (only available for control endpoints) 7 1 read-write EPTYPE Endpoint Type 8 3 read-write CTRL Control 0x0 ISO_OUT Isochronous OUT 0x1 ISO_IN Isochronous IN 0x5 BULK_OUT Bulk OUT 0x2 BULK_IN Bulk IN 0x6 INT_OUT Interrupt OUT 0x3 INT_IN Interrupt IN 0x7 DTGLE Data Toggle 11 1 read-write EPEDS Endpoint Enable Disable 15 1 read-write RXBYTECNT Number of Bytes Available in the FIFO 16 11 read-write 8 4 0-7 FDR[%s] Endpoint FIFO Data Register 0x00000050 32 read-write FIFO_DATA FIFO Data Value 0 8 read-write TXVC Transceiver Control Register 0x00000074 32 read-write 0x00000100 TXVDIS Transceiver Disable 8 1 read-write PUON Pull-up On 9 1 read-write ADC 6489Q Analog-to-Digital Converter ADC_ 0x40038000 0 0x4000 registers ADC 29 CR Control Register 0x00000000 32 write-only SWRST Software Reset 0 1 write-only START Start Conversion 1 1 write-only MR Mode Register 0x00000004 32 read-write 0x00000000 TRGEN Trigger Enable 0 1 read-write DIS Hardware triggers are disabled. Starting a conversion is only possible by software. 0 EN Hardware trigger selected by TRGSEL field is enabled. 1 TRGSEL Trigger Selection 1 3 read-write ADC_TRIG0 External trigger 0x0 ADC_TRIG1 TIO Output of the Timer Counter Channel 0 0x1 ADC_TRIG2 TIO Output of the Timer Counter Channel 1 0x2 ADC_TRIG3 TIO Output of the Timer Counter Channel 2 0x3 ADC_TRIG4 PWM Event Line 0 0x4 ADC_TRIG5 PWM Event Line 1 0x5 SLEEP Sleep Mode 5 1 read-write NORMAL Normal Mode: The ADC Core and reference voltage circuitry are kept ON between conversions 0 SLEEP Sleep Mode: The wake-up time can be modified by programming FWUP bit 1 FWUP Fast Wake Up 6 1 read-write OFF If SLEEP is 1 then both ADC Core and reference voltage circuitry are OFF between conversions 0 ON If SLEEP is 1 then Fast Wake-up Sleep Mode: The Voltage reference is ON between conversions and ADC Core is OFF 1 FREERUN Free Run Mode 7 1 read-write OFF Normal Mode 0 ON Free Run Mode: Never wait for any trigger. 1 PRESCAL Prescaler Rate Selection 8 8 read-write STARTUP Start Up Time 16 4 read-write SUT0 0 periods of ADCClock 0x0 SUT8 8 periods of ADCClock 0x1 SUT16 16 periods of ADCClock 0x2 SUT24 24 periods of ADCClock 0x3 SUT64 64 periods of ADCClock 0x4 SUT80 80 periods of ADCClock 0x5 SUT96 96 periods of ADCClock 0x6 SUT112 112 periods of ADCClock 0x7 SUT512 512 periods of ADCClock 0x8 SUT576 576 periods of ADCClock 0x9 SUT640 640 periods of ADCClock 0xA SUT704 704 periods of ADCClock 0xB SUT768 768 periods of ADCClock 0xC SUT832 832 periods of ADCClock 0xD SUT896 896 periods of ADCClock 0xE SUT960 960 periods of ADCClock 0xF SETTLING Analog Settling Time 20 2 read-write AST3 3 periods of ADCClock 0x0 AST5 5 periods of ADCClock 0x1 AST9 9 periods of ADCClock 0x2 AST17 17 periods of ADCClock 0x3 ANACH Analog Change 23 1 read-write NONE No analog change on channel switching: DIFF0, GAIN0 and OFF0 are used for all channels 0 ALLOWED Allows different analog settings for each channel. See ADC_CGR and ADC_COR Registers 1 TRACKTIM Tracking Time 24 4 read-write TRANSFER Transfer Period 28 2 read-write USEQ Use Sequence Enable 31 1 read-write NUM_ORDER Normal Mode: The controller converts channels in a simple numeric order depending only on the channel index. 0 REG_ORDER User Sequence Mode: The sequence respects what is defined in ADC_SEQR1 and ADC_SEQR2 registers and can be used to convert several times the same channel. 1 2 4 0-1 SEQR[%s] Channel Sequence Register 0x00000008 32 read-write CHER Channel Enable Register 0x00000010 32 write-only CH0 Channel 0 Enable 0 1 write-only CH1 Channel 1 Enable 1 1 write-only CH2 Channel 2 Enable 2 1 write-only CH3 Channel 3 Enable 3 1 write-only CH4 Channel 4 Enable 4 1 write-only CH5 Channel 5 Enable 5 1 write-only CH6 Channel 6 Enable 6 1 write-only CH7 Channel 7 Enable 7 1 write-only CH8 Channel 8 Enable 8 1 write-only CH9 Channel 9 Enable 9 1 write-only CH10 Channel 10 Enable 10 1 write-only CH11 Channel 11 Enable 11 1 write-only CH12 Channel 12 Enable 12 1 write-only CH13 Channel 13 Enable 13 1 write-only CH14 Channel 14 Enable 14 1 write-only CH15 Channel 15 Enable 15 1 write-only CHDR Channel Disable Register 0x00000014 32 write-only CH0 Channel 0 Disable 0 1 write-only CH1 Channel 1 Disable 1 1 write-only CH2 Channel 2 Disable 2 1 write-only CH3 Channel 3 Disable 3 1 write-only CH4 Channel 4 Disable 4 1 write-only CH5 Channel 5 Disable 5 1 write-only CH6 Channel 6 Disable 6 1 write-only CH7 Channel 7 Disable 7 1 write-only CH8 Channel 8 Disable 8 1 write-only CH9 Channel 9 Disable 9 1 write-only CH10 Channel 10 Disable 10 1 write-only CH11 Channel 11 Disable 11 1 write-only CH12 Channel 12 Disable 12 1 write-only CH13 Channel 13 Disable 13 1 write-only CH14 Channel 14 Disable 14 1 write-only CH15 Channel 15 Disable 15 1 write-only CHSR Channel Status Register 0x00000018 32 read-only 0x00000000 CH0 Channel 0 Status 0 1 read-only CH1 Channel 1 Status 1 1 read-only CH2 Channel 2 Status 2 1 read-only CH3 Channel 3 Status 3 1 read-only CH4 Channel 4 Status 4 1 read-only CH5 Channel 5 Status 5 1 read-only CH6 Channel 6 Status 6 1 read-only CH7 Channel 7 Status 7 1 read-only CH8 Channel 8 Status 8 1 read-only CH9 Channel 9 Status 9 1 read-only CH10 Channel 10 Status 10 1 read-only CH11 Channel 11 Status 11 1 read-only CH12 Channel 12 Status 12 1 read-only CH13 Channel 13 Status 13 1 read-only CH14 Channel 14 Status 14 1 read-only CH15 Channel 15 Status 15 1 read-only LCDR Last Converted Data Register 0x00000020 32 read-only 0x00000000 LDATA Last Data Converted 0 12 read-only CHNB Channel Number 12 4 read-only IER Interrupt Enable Register 0x00000024 32 write-only EOC0 End of Conversion Interrupt Enable 0 0 1 write-only EOC1 End of Conversion Interrupt Enable 1 1 1 write-only EOC2 End of Conversion Interrupt Enable 2 2 1 write-only EOC3 End of Conversion Interrupt Enable 3 3 1 write-only EOC4 End of Conversion Interrupt Enable 4 4 1 write-only EOC5 End of Conversion Interrupt Enable 5 5 1 write-only EOC6 End of Conversion Interrupt Enable 6 6 1 write-only EOC7 End of Conversion Interrupt Enable 7 7 1 write-only EOC8 End of Conversion Interrupt Enable 8 8 1 write-only EOC9 End of Conversion Interrupt Enable 9 9 1 write-only EOC10 End of Conversion Interrupt Enable 10 10 1 write-only EOC11 End of Conversion Interrupt Enable 11 11 1 write-only EOC12 End of Conversion Interrupt Enable 12 12 1 write-only EOC13 End of Conversion Interrupt Enable 13 13 1 write-only EOC14 End of Conversion Interrupt Enable 14 14 1 write-only EOC15 End of Conversion Interrupt Enable 15 15 1 write-only DRDY Data Ready Interrupt Enable 24 1 write-only GOVRE General Overrun Error Interrupt Enable 25 1 write-only COMPE Comparison Event Interrupt Enable 26 1 write-only ENDRX End of Receive Buffer Interrupt Enable 27 1 write-only RXBUFF Receive Buffer Full Interrupt Enable 28 1 write-only IDR Interrupt Disable Register 0x00000028 32 write-only EOC0 End of Conversion Interrupt Disable 0 0 1 write-only EOC1 End of Conversion Interrupt Disable 1 1 1 write-only EOC2 End of Conversion Interrupt Disable 2 2 1 write-only EOC3 End of Conversion Interrupt Disable 3 3 1 write-only EOC4 End of Conversion Interrupt Disable 4 4 1 write-only EOC5 End of Conversion Interrupt Disable 5 5 1 write-only EOC6 End of Conversion Interrupt Disable 6 6 1 write-only EOC7 End of Conversion Interrupt Disable 7 7 1 write-only EOC8 End of Conversion Interrupt Disable 8 8 1 write-only EOC9 End of Conversion Interrupt Disable 9 9 1 write-only EOC10 End of Conversion Interrupt Disable 10 10 1 write-only EOC11 End of Conversion Interrupt Disable 11 11 1 write-only EOC12 End of Conversion Interrupt Disable 12 12 1 write-only EOC13 End of Conversion Interrupt Disable 13 13 1 write-only EOC14 End of Conversion Interrupt Disable 14 14 1 write-only EOC15 End of Conversion Interrupt Disable 15 15 1 write-only DRDY Data Ready Interrupt Disable 24 1 write-only GOVRE General Overrun Error Interrupt Disable 25 1 write-only COMPE Comparison Event Interrupt Disable 26 1 write-only ENDRX End of Receive Buffer Interrupt Disable 27 1 write-only RXBUFF Receive Buffer Full Interrupt Disable 28 1 write-only IMR Interrupt Mask Register 0x0000002C 32 read-only 0x00000000 EOC0 End of Conversion Interrupt Mask 0 0 1 read-only EOC1 End of Conversion Interrupt Mask 1 1 1 read-only EOC2 End of Conversion Interrupt Mask 2 2 1 read-only EOC3 End of Conversion Interrupt Mask 3 3 1 read-only EOC4 End of Conversion Interrupt Mask 4 4 1 read-only EOC5 End of Conversion Interrupt Mask 5 5 1 read-only EOC6 End of Conversion Interrupt Mask 6 6 1 read-only EOC7 End of Conversion Interrupt Mask 7 7 1 read-only EOC8 End of Conversion Interrupt Mask 8 8 1 read-only EOC9 End of Conversion Interrupt Mask 9 9 1 read-only EOC10 End of Conversion Interrupt Mask 10 10 1 read-only EOC11 End of Conversion Interrupt Mask 11 11 1 read-only EOC12 End of Conversion Interrupt Mask 12 12 1 read-only EOC13 End of Conversion Interrupt Mask 13 13 1 read-only EOC14 End of Conversion Interrupt Mask 14 14 1 read-only EOC15 End of Conversion Interrupt Mask 15 15 1 read-only DRDY Data Ready Interrupt Mask 24 1 read-only GOVRE General Overrun Error Interrupt Mask 25 1 read-only COMPE Comparison Event Interrupt Mask 26 1 read-only ENDRX End of Receive Buffer Interrupt Mask 27 1 read-only RXBUFF Receive Buffer Full Interrupt Mask 28 1 read-only ISR Interrupt Status Register 0x00000030 32 read-only 0x00000000 EOC0 End of Conversion 0 0 1 read-only EOC1 End of Conversion 1 1 1 read-only EOC2 End of Conversion 2 2 1 read-only EOC3 End of Conversion 3 3 1 read-only EOC4 End of Conversion 4 4 1 read-only EOC5 End of Conversion 5 5 1 read-only EOC6 End of Conversion 6 6 1 read-only EOC7 End of Conversion 7 7 1 read-only EOC8 End of Conversion 8 8 1 read-only EOC9 End of Conversion 9 9 1 read-only EOC10 End of Conversion 10 10 1 read-only EOC11 End of Conversion 11 11 1 read-only EOC12 End of Conversion 12 12 1 read-only EOC13 End of Conversion 13 13 1 read-only EOC14 End of Conversion 14 14 1 read-only EOC15 End of Conversion 15 15 1 read-only DRDY Data Ready 24 1 read-only GOVRE General Overrun Error 25 1 read-only COMPE Comparison Error 26 1 read-only ENDRX End of RX Buffer 27 1 read-only RXBUFF RX Buffer Full 28 1 read-only OVER Overrun Status Register 0x0000003C 32 read-only 0x00000000 OVRE0 Overrun Error 0 0 1 read-only OVRE1 Overrun Error 1 1 1 read-only OVRE2 Overrun Error 2 2 1 read-only OVRE3 Overrun Error 3 3 1 read-only OVRE4 Overrun Error 4 4 1 read-only OVRE5 Overrun Error 5 5 1 read-only OVRE6 Overrun Error 6 6 1 read-only OVRE7 Overrun Error 7 7 1 read-only OVRE8 Overrun Error 8 8 1 read-only OVRE9 Overrun Error 9 9 1 read-only OVRE10 Overrun Error 10 10 1 read-only OVRE11 Overrun Error 11 11 1 read-only OVRE12 Overrun Error 12 12 1 read-only OVRE13 Overrun Error 13 13 1 read-only OVRE14 Overrun Error 14 14 1 read-only OVRE15 Overrun Error 15 15 1 read-only EMR Extended Mode Register 0x00000040 32 read-write 0x00000000 CMPMODE Comparison Mode 0 2 read-write LOW Generates an event when the converted data is lower than the low threshold of the window. 0x0 HIGH Generates an event when the converted data is higher than the high threshold of the window. 0x1 IN Generates an event when the converted data is in the comparison window. 0x2 OUT Generates an event when the converted data is out of the comparison window. 0x3 CMPSEL Comparison Selected Channel 4 4 read-write CMPALL Compare All Channels 9 1 read-write TAG TAG of the ADC_LDCR register 24 1 read-write CWR Compare Window Register 0x00000044 32 read-write 0x00000000 LOWTHRES Low Threshold 0 12 read-write HIGHTHRES High Threshold 16 12 read-write CGR Channel Gain Register 0x00000048 32 read-write 0x00000000 GAIN0 Gain for Channel 0 0 2 read-write GAIN1 Gain for Channel 1 2 2 read-write GAIN2 Gain for Channel 2 4 2 read-write GAIN3 Gain for Channel 3 6 2 read-write GAIN4 Gain for Channel 4 8 2 read-write GAIN5 Gain for Channel 5 10 2 read-write GAIN6 Gain for Channel 6 12 2 read-write GAIN7 Gain for Channel 7 14 2 read-write GAIN8 Gain for Channel 8 16 2 read-write GAIN9 Gain for Channel 9 18 2 read-write GAIN10 Gain for Channel 10 20 2 read-write GAIN11 Gain for Channel 11 22 2 read-write GAIN12 Gain for Channel 12 24 2 read-write GAIN13 Gain for Channel 13 26 2 read-write GAIN14 Gain for Channel 14 28 2 read-write GAIN15 Gain for Channel 15 30 2 read-write COR Channel Offset Register 0x0000004C 32 read-write 0x00000000 OFF0 Offset for channel 0 0 1 read-write OFF1 Offset for channel 1 1 1 read-write OFF2 Offset for channel 2 2 1 read-write OFF3 Offset for channel 3 3 1 read-write OFF4 Offset for channel 4 4 1 read-write OFF5 Offset for channel 5 5 1 read-write OFF6 Offset for channel 6 6 1 read-write OFF7 Offset for channel 7 7 1 read-write OFF8 Offset for channel 8 8 1 read-write OFF9 Offset for channel 9 9 1 read-write OFF10 Offset for channel 10 10 1 read-write OFF11 Offset for channel 11 11 1 read-write OFF12 Offset for channel 12 12 1 read-write OFF13 Offset for channel 13 13 1 read-write OFF14 Offset for channel 14 14 1 read-write OFF15 Offset for channel 15 15 1 read-write DIFF0 Differential inputs for channel 0 16 1 read-write DIFF1 Differential inputs for channel 1 17 1 read-write DIFF2 Differential inputs for channel 2 18 1 read-write DIFF3 Differential inputs for channel 3 19 1 read-write DIFF4 Differential inputs for channel 4 20 1 read-write DIFF5 Differential inputs for channel 5 21 1 read-write DIFF6 Differential inputs for channel 6 22 1 read-write DIFF7 Differential inputs for channel 7 23 1 read-write DIFF8 Differential inputs for channel 8 24 1 read-write DIFF9 Differential inputs for channel 9 25 1 read-write DIFF10 Differential inputs for channel 10 26 1 read-write DIFF11 Differential inputs for channel 11 27 1 read-write DIFF12 Differential inputs for channel 12 28 1 read-write DIFF13 Differential inputs for channel 13 29 1 read-write DIFF14 Differential inputs for channel 14 30 1 read-write DIFF15 Differential inputs for channel 15 31 1 read-write 15 4 0-14 CDR[%s] Channel Data Register 0x00000050 32 read-only DATA Converted Data 0 12 read-only ACR Analog Control Register 0x00000094 32 read-write 0x00000100 TSON Temperature Sensor On 4 1 read-write IBCTL ADC Bias Current Control 8 2 read-write WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write PASSWD Writing any other value in this field aborts the write operation of the WPEN bit.Always reads as 0 0x414443 WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only RPR Receive Pointer Register 0x00000100 32 read-write 0x00000000 RXPTR Receive Pointer Register 0 32 read-write RCR Receive Counter Register 0x00000104 32 read-write 0x00000000 RXCTR Receive Counter Register 0 16 read-write RNPR Receive Next Pointer Register 0x00000110 32 read-write 0x00000000 RXNPTR Receive Next Pointer 0 32 read-write RNCR Receive Next Counter Register 0x00000114 32 read-write 0x00000000 RXNCTR Receive Next Counter 0 16 read-write PTCR Transfer Control Register 0x00000120 32 write-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 write-only RXTDIS Receiver Transfer Disable 1 1 write-only TXTEN Transmitter Transfer Enable 8 1 write-only TXTDIS Transmitter Transfer Disable 9 1 write-only PTSR Transfer Status Register 0x00000124 32 read-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 read-only TXTEN Transmitter Transfer Enable 8 1 read-only DACC 6461G Digital-to-Analog Converter Controller DACC_ 0x4003C000 0 0x4000 registers DACC 30 CR Control Register 0x00000000 32 write-only SWRST Software Reset 0 1 write-only MR Mode Register 0x00000004 32 read-write 0x00000000 TRGEN Trigger Enable 0 1 read-write DIS External trigger mode disabled. DACC in free running mode. 0 EN External trigger mode enabled. 1 TRGSEL Trigger Selection 1 3 read-write TRGSEL0 External trigger 0x0 TRGSEL1 TIO Output of the Timer Counter Channel 0 0x1 TRGSEL2 TIO Output of the Timer Counter Channel 1 0x2 TRGSEL3 TIO Output of the Timer Counter Channel 2 0x3 TRGSEL4 PWM Event Line 0 0x4 TRGSEL5 PWM Event Line 1 0x5 WORD Word Transfer 4 1 read-write HALF Half-Word transfer 0 WORD Word Transfer 1 SLEEP Sleep Mode 5 1 read-write DISABLED Normal Mode: The DAC Core and reference voltage circuitry are kept ON between conversions. 0 ENABLED Sleep Mode: The DAC Core and/or reference voltage circuitry are OFF between conversions. 1 FASTWKUP Fast Wake up Mode 6 1 read-write STAMODE Normal Sleep Mode: The sleep mode is defined by the SLEEP bit. Voltage reference is OFF between conversions. 0 FASTWAKEUP Fast Wake up after Sleep Mode: the voltage reference is kept ON between conversions but DAC Core is OFF 1 REFRESH Refresh Period 8 8 read-write USER_SEL User Channel Selection 16 2 read-write CHANNEL0 Channel 0 0 CHANNEL1 Channel 1 1 TAG Tag Selection Mode 20 1 read-write DIS Tag selection mode disabled. Using USER_SEL to select the channel for the conversion. 0 EN Tag selection mode enabled 1 MAXS Max Speed Mode 21 1 read-write NORMAL Normal Mode 0 MAXIMUM Max Speed Mode enabled 1 STARTUP Startup Time Selection 24 6 read-write 0 0 periods of DACClock 0x0 8 8 periods of DACClock 0x1 16 16 periods of DACClock 0x2 24 24 periods of DACClock 0x3 64 64 periods of DACClock 0x4 80 80 periods of DACClock 0x5 96 96 periods of DACClock 0x6 112 112 periods of DACClock 0x7 512 512 periods of DACClock 0x8 576 576 periods of DACClock 0x9 640 640 periods of DACClock 0xA 704 704 periods of DACClock 0xB 768 768 periods of DACClock 0xC 832 832 periods of DACClock 0xD 896 896 periods of DACClock 0xE 960 960 periods of DACClock 0xF 1024 1024 periods of DACClock 0x10 1088 1088 periods of DACClock 0x11 1152 1152 periods of DACClock 0x12 1216 1216 periods of DACClock 0x13 1280 1280 periods of DACClock 0x14 1344 1344 periods of DACClock 0x15 1408 1408 periods of DACClock 0x16 1472 1472 periods of DACClock 0x17 1536 1536 periods of DACClock 0x18 1600 1600 periods of DACClock 0x19 1664 1664 periods of DACClock 0x1A 1728 1728 periods of DACClock 0x1B 1792 1792 periods of DACClock 0x1C 1856 1856 periods of DACClock 0x1D 1920 1920 periods of DACClock 0x1E 1984 1984 periods of DACClock 0x1F CHER Channel Enable Register 0x00000010 32 write-only CH0 Channel 0 Enable 0 1 write-only CH1 Channel 1 Enable 1 1 write-only CHDR Channel Disable Register 0x00000014 32 write-only CH0 Channel 0 Disable 0 1 write-only CH1 Channel 1 Disable 1 1 write-only CHSR Channel Status Register 0x00000018 32 read-only 0x00000000 CH0 Channel 0 Status 0 1 read-only CH1 Channel 1 Status 1 1 read-only CDR Conversion Data Register 0x00000020 32 write-only 0x00000000 DATA Data to Convert 0 32 write-only IER Interrupt Enable Register 0x00000024 32 write-only TXRDY Transmit Ready Interrupt Enable 0 1 write-only EOC End of Conversion Interrupt Enable 1 1 write-only ENDTX End of Transmit Buffer Interrupt Enable 2 1 write-only TXBUFE Transmit Buffer Empty Interrupt Enable 3 1 write-only IDR Interrupt Disable Register 0x00000028 32 write-only TXRDY Transmit Ready Interrupt Disable. 0 1 write-only EOC End of Conversion Interrupt Disable 1 1 write-only ENDTX End of Transmit Buffer Interrupt Disable 2 1 write-only TXBUFE Transmit Buffer Empty Interrupt Disable 3 1 write-only IMR Interrupt Mask Register 0x0000002C 32 read-only 0x00000000 TXRDY Transmit Ready Interrupt Mask 0 1 read-only EOC End of Conversion Interrupt Mask 1 1 read-only ENDTX End of Transmit Buffer Interrupt Mask 2 1 read-only TXBUFE Transmit Buffer Empty Interrupt Mask 3 1 read-only ISR Interrupt Status Register 0x00000030 32 read-only 0x00000000 TXRDY Transmit Ready Interrupt Flag 0 1 read-only EOC End of Conversion Interrupt Flag 1 1 read-only ENDTX End of DMA Interrupt Flag 2 1 read-only TXBUFE Transmit Buffer Empty 3 1 read-only ACR Analog Current Register 0x00000094 32 read-write 0x00000000 IBCTLCH0 Analog Output Current Control 0 2 read-write IBCTLCH1 Analog Output Current Control 2 2 read-write IBCTLDACCORE Bias Current Control for DAC Core 8 2 read-write WPMR Write Protect Mode register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write PASSWD Writing any other value in this field aborts the write operation of the WPEN bit.Always reads as 0. 0x444143 WPSR Write Protect Status register 0x000000E8 32 read-only 0x00000000 WPROTERR Write protection error 0 1 read-only WPROTADDR Write protection error address 8 8 read-only TPR Transmit Pointer Register 0x00000108 32 read-write 0x00000000 TXPTR Transmit Counter Register 0 32 read-write TCR Transmit Counter Register 0x0000010C 32 read-write 0x00000000 TXCTR Transmit Counter Register 0 16 read-write TNPR Transmit Next Pointer Register 0x00000118 32 read-write 0x00000000 TXNPTR Transmit Next Pointer 0 32 read-write TNCR Transmit Next Counter Register 0x0000011C 32 read-write 0x00000000 TXNCTR Transmit Counter Next 0 16 read-write PTCR Transfer Control Register 0x00000120 32 write-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 write-only RXTDIS Receiver Transfer Disable 1 1 write-only TXTEN Transmitter Transfer Enable 8 1 write-only TXTDIS Transmitter Transfer Disable 9 1 write-only PTSR Transfer Status Register 0x00000124 32 read-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 read-only TXTEN Transmitter Transfer Enable 8 1 read-only ACC 6490C Analog Comparator Controller ACC_ 0x40040000 0 0x4000 registers ACC 33 CR Control Register 0x00000000 32 write-only SWRST SoftWare ReSeT 0 1 write-only MR Mode Register 0x00000004 32 read-write 0x00000000 SELMINUS SELection for MINUS comparator input 0 3 read-write TS SelectTS 0x0 ADVREF Select ADVREF 0x1 DAC0 Select DAC0 0x2 DAC1 Select DAC1 0x3 AD0 Select AD0 0x4 AD1 Select AD1 0x5 AD2 Select AD2 0x6 AD3 Select AD3 0x7 SELPLUS SELection for PLUS comparator input 4 3 read-write AD0 Select AD0 0x0 AD1 Select AD1 0x1 AD2 Select AD2 0x2 AD3 Select AD3 0x3 AD4 Select AD4 0x4 AD5 Select AD5 0x5 AD6 Select AD6 0x6 AD7 Select AD7 0x7 ACEN Analog Comparator ENable 8 1 read-write DIS Analog Comparator Disabled. 0 EN Analog Comparator Enabled. 1 EDGETYP EDGE TYPe 9 2 read-write RISING only rising edge of comparator output 0x0 FALLING falling edge of comparator output 0x1 ANY any edge of comparator output 0x2 INV INVert comparator output 12 1 read-write DIS Analog Comparator output is directly processed. 0 EN Analog Comparator output is inverted prior to being processed. 1 SELFS SELection of Fault Source 13 1 read-write CF the CF flag is used to drive the FAULT output. 0 OUTPUT the output of the Analog Comparator flag is used to drive the FAULT output. 1 FE Fault Enable 14 1 read-write DIS the FAULT output is tied to 0. 0 EN the FAULT output is driven by the signal defined by SELFS. 1 IER Interrupt Enable Register 0x00000024 32 write-only CE Comparison Edge 0 1 write-only IDR Interrupt Disable Register 0x00000028 32 write-only CE Comparison Edge 0 1 write-only IMR Interrupt Mask Register 0x0000002C 32 read-only 0x00000000 CE Comparison Edge 0 1 read-only ISR Interrupt Status Register 0x00000030 32 read-only 0x00000000 CE Comparison Edge 0 1 read-only SCO Synchronized Comparator Output 1 1 read-only MASK 31 1 read-only ACR Analog Control Register 0x00000094 32 read-write 0x00000000 ISEL Current SELection 0 1 read-write LOPW low power option. 0 HISP high speed option. 1 HYST HYSTeresis selection 1 2 read-write WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPROTERR Write PROTection ERRor 0 1 read-only CRCCU 11001D Cyclic Redundancy Check Calculation Unit CRCCU_ 0x40044000 0 0x4000 registers CRCCU 32 DSCR CRCCU Descriptor Base Register 0x00000000 32 read-write 0x00000000 DSCR Descriptor Base Address 9 23 read-write DMA_EN CRCCU DMA Enable Register 0x00000008 32 write-only 0x00000000 DMAEN DMA Enable Register 0 1 write-only DMA_DIS CRCCU DMA Disable Register 0x0000000C 32 write-only 0x00000000 DMADIS DMA Disable Register 0 1 write-only DMA_SR CRCCU DMA Status Register 0x00000010 32 read-only 0x00000000 DMASR DMA Status Register 0 1 read-only DMA_IER CRCCU DMA Interrupt Enable Register 0x00000014 32 write-only 0x00000000 DMAIER Interrupt Enable register 0 1 write-only DMA_IDR CRCCU DMA Interrupt Disable Register 0x00000018 32 write-only 0x00000000 DMAIDR Interrupt Disable register 0 1 write-only DMA_IMR CRCCU DMA Interrupt Mask Register 0x0000001C 32 read-only 0x00000000 DMAIMR Interrupt Mask Register 0 1 read-only DMA_ISR CRCCU DMA Interrupt Status Register 0x00000020 32 read-only 0x00000000 DMAISR Interrupt Status register 0 1 read-only CR CRCCU Control Register 0x00000034 32 write-only 0x00000000 RESET CRC Computation Reset 0 1 write-only MR CRCCU Mode Register 0x00000038 32 read-write 0x00000000 ENABLE CRC Enable 0 1 read-write COMPARE CRC Compare 1 1 read-write PTYPE Primitive Polynomial 2 2 read-write CCITT8023 Polynom 0x04C11DB7 0x0 CASTAGNOLI Polynom 0x1EDC6F41 0x1 CCITT16 Polynom 0x1021 0x2 DIVIDER Request Divider 4 4 read-write SR CRCCU Status Register 0x0000003C 32 read-only 0xFFFFFFFF CRC Cyclic Redundancy Check Value 0 32 read-only IER CRCCU Interrupt Enable Register 0x00000040 32 write-only 0x00000000 ERRIER CRC Error Interrupt Enable 0 1 write-only IDR CRCCU Interrupt Disable Register 0x00000044 32 write-only 0x00000000 ERRIDR CRC Error Interrupt Disable 0 1 write-only IMR CRCCU Interrupt Mask Register 0x00000048 32 read-only 0x00000000 ERRIMR CRC Error Interrupt Mask 0 1 read-only ISR CRCCU Interrupt Status Register 0x0000004C 32 read-only 0x00000000 ERRISR CRC Error Interrupt Status 0 1 read-only MATRIX 6499A AHB Bus Matrix 0x400E0200 0 0x200 registers 4 4 0-3 MATRIX_MCFG[%s] Master Configuration Register 0x00000000 32 read-write ULBT Undefined Length Burst Type 0 3 read-write 5 4 0-4 MATRIX_SCFG[%s] Slave Configuration Register 0x00000040 32 read-write SLOT_CYCLE Maximum Number of Allowed Cycles for a Burst 0 8 read-write DEFMSTR_TYPE Default Master Type 16 2 read-write FIXED_DEFMSTR Fixed Default Master 18 3 read-write ARBT Arbitration Type 24 2 read-write MATRIX_PRAS0 Priority Register A for Slave 0 0x00000080 32 read-write 0x00000000 M0PR Master 0 Priority 0 2 read-write M1PR Master 1 Priority 4 2 read-write M2PR Master 2 Priority 8 2 read-write M3PR Master 3 Priority 12 2 read-write M4PR Master 4 Priority 16 2 read-write MATRIX_PRAS1 Priority Register A for Slave 1 0x00000088 32 read-write 0x00000000 M0PR Master 0 Priority 0 2 read-write M1PR Master 1 Priority 4 2 read-write M2PR Master 2 Priority 8 2 read-write M3PR Master 3 Priority 12 2 read-write M4PR Master 4 Priority 16 2 read-write MATRIX_PRAS2 Priority Register A for Slave 2 0x00000090 32 read-write 0x00000000 M0PR Master 0 Priority 0 2 read-write M1PR Master 1 Priority 4 2 read-write M2PR Master 2 Priority 8 2 read-write M3PR Master 3 Priority 12 2 read-write M4PR Master 4 Priority 16 2 read-write MATRIX_PRAS3 Priority Register A for Slave 3 0x00000098 32 read-write 0x00000000 M0PR Master 0 Priority 0 2 read-write M1PR Master 1 Priority 4 2 read-write M2PR Master 2 Priority 8 2 read-write M3PR Master 3 Priority 12 2 read-write M4PR Master 4 Priority 16 2 read-write MATRIX_PRAS4 Priority Register A for Slave 4 0x000000A0 32 read-write 0x00000000 M0PR Master 0 Priority 0 2 read-write M1PR Master 1 Priority 4 2 read-write M2PR Master 2 Priority 8 2 read-write M3PR Master 3 Priority 12 2 read-write M4PR Master 4 Priority 16 2 read-write CCFG_SYSIO System I/O Configuration register 0x00000114 32 read-write 0x00000000 SYSIO4 PB4 or TDI Assignment 4 1 read-write SYSIO5 PB5 or TDO/TRACESWO Assignment 5 1 read-write SYSIO6 PB6 or TMS/SWDIO Assignment 6 1 read-write SYSIO7 PB7 or TCK/SWCLK Assignment 7 1 read-write SYSIO10 PB10 or DDM Assignment 10 1 read-write SYSIO11 PB11 or DDP Assignment 11 1 read-write SYSIO12 PB12 or ERASE Assignment 12 1 read-write CCFG_SMCNFCS SMC Chip Select NAND Flash Assignment Register 0x0000011C 32 read-write 0x00000000 SMC_NFCS0 SMC NAND Flash Chip Select 0 Assignment 0 1 read-write SMC_NFCS1 SMC NAND Flash Chip Select 1 Assignment 1 1 read-write SMC_NFCS2 SMC NAND Flash Chip Select 2 Assignment 2 1 read-write SMC_NFCS3 SMC NAND Flash Chip Select 3 Assignment 3 1 read-write MATRIX_WPMR Write Protect Mode Register 0x000001E4 32 read-write 0x00000000 WPEN Write Protect ENable 0 1 read-write WPKEY Write Protect KEY (Write-only) 8 24 read-write MATRIX_WPSR Write Protect Status Register 0x000001E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only PMC 11116I Power Management Controller 0x400E0400 0 0x140 registers PMC 5 PMC_SCER System Clock Enable Register 0x00000000 32 write-only UDP USB Device Port Clock Enable 7 1 write-only PCK0 Programmable Clock 0 Output Enable 8 1 write-only PCK1 Programmable Clock 1 Output Enable 9 1 write-only PCK2 Programmable Clock 2 Output Enable 10 1 write-only PMC_SCDR System Clock Disable Register 0x00000004 32 write-only UDP USB Device Port Clock Disable 7 1 write-only PCK0 Programmable Clock 0 Output Disable 8 1 write-only PCK1 Programmable Clock 1 Output Disable 9 1 write-only PCK2 Programmable Clock 2 Output Disable 10 1 write-only PMC_SCSR System Clock Status Register 0x00000008 32 read-only 0x00000001 UDP USB Device Port Clock Status 7 1 read-only PCK0 Programmable Clock 0 Output Status 8 1 read-only PCK1 Programmable Clock 1 Output Status 9 1 read-only PCK2 Programmable Clock 2 Output Status 10 1 read-only PMC_PCER0 Peripheral Clock Enable Register 0 0x00000010 32 write-only PID8 Peripheral Clock 8 Enable 8 1 write-only PID9 Peripheral Clock 9 Enable 9 1 write-only PID10 Peripheral Clock 10 Enable 10 1 write-only PID11 Peripheral Clock 11 Enable 11 1 write-only PID12 Peripheral Clock 12 Enable 12 1 write-only PID13 Peripheral Clock 13 Enable 13 1 write-only PID14 Peripheral Clock 14 Enable 14 1 write-only PID15 Peripheral Clock 15 Enable 15 1 write-only PID18 Peripheral Clock 18 Enable 18 1 write-only PID19 Peripheral Clock 19 Enable 19 1 write-only PID20 Peripheral Clock 20 Enable 20 1 write-only PID21 Peripheral Clock 21 Enable 21 1 write-only PID22 Peripheral Clock 22 Enable 22 1 write-only PID23 Peripheral Clock 23 Enable 23 1 write-only PID24 Peripheral Clock 24 Enable 24 1 write-only PID25 Peripheral Clock 25 Enable 25 1 write-only PID26 Peripheral Clock 26 Enable 26 1 write-only PID27 Peripheral Clock 27 Enable 27 1 write-only PID28 Peripheral Clock 28 Enable 28 1 write-only PID29 Peripheral Clock 29 Enable 29 1 write-only PID30 Peripheral Clock 30 Enable 30 1 write-only PID31 Peripheral Clock 31 Enable 31 1 write-only PMC_PCDR0 Peripheral Clock Disable Register 0 0x00000014 32 write-only PID8 Peripheral Clock 8 Disable 8 1 write-only PID9 Peripheral Clock 9 Disable 9 1 write-only PID10 Peripheral Clock 10 Disable 10 1 write-only PID11 Peripheral Clock 11 Disable 11 1 write-only PID12 Peripheral Clock 12 Disable 12 1 write-only PID13 Peripheral Clock 13 Disable 13 1 write-only PID14 Peripheral Clock 14 Disable 14 1 write-only PID15 Peripheral Clock 15 Disable 15 1 write-only PID18 Peripheral Clock 18 Disable 18 1 write-only PID19 Peripheral Clock 19 Disable 19 1 write-only PID20 Peripheral Clock 20 Disable 20 1 write-only PID21 Peripheral Clock 21 Disable 21 1 write-only PID22 Peripheral Clock 22 Disable 22 1 write-only PID23 Peripheral Clock 23 Disable 23 1 write-only PID24 Peripheral Clock 24 Disable 24 1 write-only PID25 Peripheral Clock 25 Disable 25 1 write-only PID26 Peripheral Clock 26 Disable 26 1 write-only PID27 Peripheral Clock 27 Disable 27 1 write-only PID28 Peripheral Clock 28 Disable 28 1 write-only PID29 Peripheral Clock 29 Disable 29 1 write-only PID30 Peripheral Clock 30 Disable 30 1 write-only PID31 Peripheral Clock 31 Disable 31 1 write-only PMC_PCSR0 Peripheral Clock Status Register 0 0x00000018 32 read-only 0x00000000 PID8 Peripheral Clock 8 Status 8 1 read-only PID9 Peripheral Clock 9 Status 9 1 read-only PID10 Peripheral Clock 10 Status 10 1 read-only PID11 Peripheral Clock 11 Status 11 1 read-only PID12 Peripheral Clock 12 Status 12 1 read-only PID13 Peripheral Clock 13 Status 13 1 read-only PID14 Peripheral Clock 14 Status 14 1 read-only PID15 Peripheral Clock 15 Status 15 1 read-only PID18 Peripheral Clock 18 Status 18 1 read-only PID19 Peripheral Clock 19 Status 19 1 read-only PID20 Peripheral Clock 20 Status 20 1 read-only PID21 Peripheral Clock 21 Status 21 1 read-only PID22 Peripheral Clock 22 Status 22 1 read-only PID23 Peripheral Clock 23 Status 23 1 read-only PID24 Peripheral Clock 24 Status 24 1 read-only PID25 Peripheral Clock 25 Status 25 1 read-only PID26 Peripheral Clock 26 Status 26 1 read-only PID27 Peripheral Clock 27 Status 27 1 read-only PID28 Peripheral Clock 28 Status 28 1 read-only PID29 Peripheral Clock 29 Status 29 1 read-only PID30 Peripheral Clock 30 Status 30 1 read-only PID31 Peripheral Clock 31 Status 31 1 read-only CKGR_MOR Main Oscillator Register 0x00000020 32 read-write 0x00000008 MOSCXTEN Main Crystal Oscillator Enable 0 1 read-write MOSCXTBY Main Crystal Oscillator Bypass 1 1 read-write MOSCRCEN Main On-Chip RC Oscillator Enable 3 1 read-write MOSCRCF Main On-Chip RC Oscillator Frequency Selection 4 3 read-write 4_MHz The Fast RC Oscillator Frequency is at 4 MHz (default) 0x0 8_MHz The Fast RC Oscillator Frequency is at 8 MHz 0x1 12_MHz The Fast RC Oscillator Frequency is at 12 MHz 0x2 MOSCXTST Main Crystal Oscillator Start-up Time 8 8 read-write KEY Write Access Password 16 8 read-write PASSWD Writing any other value in this field aborts the write operation.Always reads as 0. 0x37 MOSCSEL Main Oscillator Selection 24 1 read-write CFDEN Clock Failure Detector Enable 25 1 read-write CKGR_MCFR Main Clock Frequency Register 0x00000024 32 read-only 0x00000000 MAINF Main Clock Frequency 0 16 read-only MAINFRDY Main Clock Ready 16 1 read-only CKGR_PLLAR PLLA Register 0x00000028 32 read-write 0x00003F00 DIVA Divider 0 8 read-write PLLACOUNT PLLA Counter 8 6 read-write MULA PLLA Multiplier 16 11 read-write ONE Must Be Set to 1 29 1 read-write CKGR_PLLBR PLLB Register 0x0000002C 32 read-write 0x00003F00 DIVB Divider 0 8 read-write PLLBCOUNT PLLB Counter 8 6 read-write MULB PLLB Multiplier 16 11 read-write PMC_MCKR Master Clock Register 0x00000030 32 read-write 0x00000001 CSS Master Clock Source Selection 0 2 read-write SLOW_CLK Slow Clock is selected 0x0 MAIN_CLK Main Clock is selected 0x1 PLLA_CLK PLLA Clock is selected 0x2 PLLB_CLK PLLBClock is selected 0x3 PRES Processor Clock Prescaler 4 3 read-write CLK_1 Selected clock 0x0 CLK_2 Selected clock divided by 2 0x1 CLK_4 Selected clock divided by 4 0x2 CLK_8 Selected clock divided by 8 0x3 CLK_16 Selected clock divided by 16 0x4 CLK_32 Selected clock divided by 32 0x5 CLK_64 Selected clock divided by 64 0x6 CLK_3 Selected clock divided by 3 0x7 PLLADIV2 PLLA Divisor by 2 12 1 read-write PLLBDIV2 PLLB Divisor by 2 13 1 read-write PMC_USB USB Clock Register 0x00000038 32 read-write 0x00000000 USBS USB Input Clock Selection 0 1 read-write USBDIV Divider for USB Clock. 8 4 read-write 3 4 0-2 PMC_PCK[%s] Programmable Clock 0 Register 0x00000040 32 read-write CSS Master Clock Source Selection 0 3 read-write SLOW_CLK Slow Clock is selected 0x0 MAIN_CLK Main Clock is selected 0x1 PLLA_CLK PLLA Clock is selected 0x2 PLLB_CLK PLLB Clock is selected 0x3 MCK Master Clock is selected 0x4 PRES Programmable Clock Prescaler 4 3 read-write CLK_1 Selected clock 0x0 CLK_2 Selected clock divided by 2 0x1 CLK_4 Selected clock divided by 4 0x2 CLK_8 Selected clock divided by 8 0x3 CLK_16 Selected clock divided by 16 0x4 CLK_32 Selected clock divided by 32 0x5 CLK_64 Selected clock divided by 64 0x6 PMC_IER Interrupt Enable Register 0x00000060 32 write-only MOSCXTS Main Crystal Oscillator Status Interrupt Enable 0 1 write-only LOCKA PLLA Lock Interrupt Enable 1 1 write-only LOCKB PLLB Lock Interrupt Enable 2 1 write-only MCKRDY Master Clock Ready Interrupt Enable 3 1 write-only PCKRDY0 Programmable Clock Ready 0 Interrupt Enable 8 1 write-only PCKRDY1 Programmable Clock Ready 1 Interrupt Enable 9 1 write-only PCKRDY2 Programmable Clock Ready 2 Interrupt Enable 10 1 write-only MOSCSELS Main Oscillator Selection Status Interrupt Enable 16 1 write-only MOSCRCS Main On-Chip RC Status Interrupt Enable 17 1 write-only CFDEV Clock Failure Detector Event Interrupt Enable 18 1 write-only PMC_IDR Interrupt Disable Register 0x00000064 32 write-only MOSCXTS Main Crystal Oscillator Status Interrupt Disable 0 1 write-only LOCKA PLLA Lock Interrupt Disable 1 1 write-only LOCKB PLLB Lock Interrupt Disable 2 1 write-only MCKRDY Master Clock Ready Interrupt Disable 3 1 write-only PCKRDY0 Programmable Clock Ready 0 Interrupt Disable 8 1 write-only PCKRDY1 Programmable Clock Ready 1 Interrupt Disable 9 1 write-only PCKRDY2 Programmable Clock Ready 2 Interrupt Disable 10 1 write-only MOSCSELS Main Oscillator Selection Status Interrupt Disable 16 1 write-only MOSCRCS Main On-Chip RC Status Interrupt Disable 17 1 write-only CFDEV Clock Failure Detector Event Interrupt Disable 18 1 write-only PMC_SR Status Register 0x00000068 32 read-only 0x00010008 MOSCXTS Main XTAL Oscillator Status 0 1 read-only LOCKA PLLA Lock Status 1 1 read-only LOCKB PLLB Lock Status 2 1 read-only MCKRDY Master Clock Status 3 1 read-only OSCSELS Slow Clock Oscillator Selection 7 1 read-only PCKRDY0 Programmable Clock Ready Status 8 1 read-only PCKRDY1 Programmable Clock Ready Status 9 1 read-only PCKRDY2 Programmable Clock Ready Status 10 1 read-only MOSCSELS Main Oscillator Selection Status 16 1 read-only MOSCRCS Main On-Chip RC Oscillator Status 17 1 read-only CFDEV Clock Failure Detector Event 18 1 read-only CFDS Clock Failure Detector Status 19 1 read-only FOS Clock Failure Detector Fault Output Status 20 1 read-only PMC_IMR Interrupt Mask Register 0x0000006C 32 read-only 0x00000000 MOSCXTS Main Crystal Oscillator Status Interrupt Mask 0 1 read-only LOCKA PLLA Lock Interrupt Mask 1 1 read-only LOCKB PLLB Lock Interrupt Mask 2 1 read-only MCKRDY Master Clock Ready Interrupt Mask 3 1 read-only PCKRDY0 Programmable Clock Ready 0 Interrupt Mask 8 1 read-only PCKRDY1 Programmable Clock Ready 1 Interrupt Mask 9 1 read-only PCKRDY2 Programmable Clock Ready 2 Interrupt Mask 10 1 read-only MOSCSELS Main Oscillator Selection Status Interrupt Mask 16 1 read-only MOSCRCS Main On-Chip RC Status Interrupt Mask 17 1 read-only CFDEV Clock Failure Detector Event Interrupt Mask 18 1 read-only PMC_FSMR Fast Start-up Mode Register 0x00000070 32 read-write 0x00000000 FSTT0 Fast Start-up Input Enable 0 0 1 read-write FSTT1 Fast Start-up Input Enable 1 1 1 read-write FSTT2 Fast Start-up Input Enable 2 2 1 read-write FSTT3 Fast Start-up Input Enable 3 3 1 read-write FSTT4 Fast Start-up Input Enable 4 4 1 read-write FSTT5 Fast Start-up Input Enable 5 5 1 read-write FSTT6 Fast Start-up Input Enable 6 6 1 read-write FSTT7 Fast Start-up Input Enable 7 7 1 read-write FSTT8 Fast Start-up Input Enable 8 8 1 read-write FSTT9 Fast Start-up Input Enable 9 9 1 read-write FSTT10 Fast Start-up Input Enable 10 10 1 read-write FSTT11 Fast Start-up Input Enable 11 11 1 read-write FSTT12 Fast Start-up Input Enable 12 12 1 read-write FSTT13 Fast Start-up Input Enable 13 13 1 read-write FSTT14 Fast Start-up Input Enable 14 14 1 read-write FSTT15 Fast Start-up Input Enable 15 15 1 read-write RTTAL RTT Alarm Enable 16 1 read-write RTCAL RTC Alarm Enable 17 1 read-write USBAL USB Alarm Enable 18 1 read-write LPM Low Power Mode 20 1 read-write PMC_FSPR Fast Start-up Polarity Register 0x00000074 32 read-write 0x00000000 FSTP0 Fast Start-up Input Polarityx 0 1 read-write FSTP1 Fast Start-up Input Polarityx 1 1 read-write FSTP2 Fast Start-up Input Polarityx 2 1 read-write FSTP3 Fast Start-up Input Polarityx 3 1 read-write FSTP4 Fast Start-up Input Polarityx 4 1 read-write FSTP5 Fast Start-up Input Polarityx 5 1 read-write FSTP6 Fast Start-up Input Polarityx 6 1 read-write FSTP7 Fast Start-up Input Polarityx 7 1 read-write FSTP8 Fast Start-up Input Polarityx 8 1 read-write FSTP9 Fast Start-up Input Polarityx 9 1 read-write FSTP10 Fast Start-up Input Polarityx 10 1 read-write FSTP11 Fast Start-up Input Polarityx 11 1 read-write FSTP12 Fast Start-up Input Polarityx 12 1 read-write FSTP13 Fast Start-up Input Polarityx 13 1 read-write FSTP14 Fast Start-up Input Polarityx 14 1 read-write FSTP15 Fast Start-up Input Polarityx 15 1 read-write PMC_FOCR Fault Output Clear Register 0x00000078 32 write-only FOCLR Fault Output Clear 0 1 write-only PMC_WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY 8 24 read-write PASSWD Writing any other value in this field aborts the write operation of the WPEN bit. Always reads as 0. 0x504D43 PMC_WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only PMC_PCER1 Peripheral Clock Enable Register 1 0x00000100 32 write-only PID32 Peripheral Clock 32 Enable 0 1 write-only PID33 Peripheral Clock 33 Enable 1 1 write-only PID34 Peripheral Clock 34 Enable 2 1 write-only PMC_PCDR1 Peripheral Clock Disable Register 1 0x00000104 32 write-only PID32 Peripheral Clock 32 Disable 0 1 write-only PID33 Peripheral Clock 33 Disable 1 1 write-only PID34 Peripheral Clock 34 Disable 2 1 write-only PMC_PCSR1 Peripheral Clock Status Register 1 0x00000108 32 read-only 0x00000000 PID32 Peripheral Clock 32 Status 0 1 read-only PID33 Peripheral Clock 33 Status 1 1 read-only PID34 Peripheral Clock 34 Status 2 1 read-only PMC_OCR Oscillator Calibration Register 0x00000110 32 read-write 0x00404040 CAL4 RC Oscillator Calibration bits for 4 MHz 0 7 read-write SEL4 Selection of RC Oscillator Calibration bits for 4 MHz 7 1 read-write CAL8 RC Oscillator Calibration bits for 8 MHz 8 7 read-write SEL8 Selection of RC Oscillator Calibration bits for 8 MHz 15 1 read-write CAL12 RC Oscillator Calibration bits for 12 MHz 16 7 read-write SEL12 Selection of RC Oscillator Calibration bits for 12 MHz 23 1 read-write UART0 6418H Universal Asynchronous Receiver Transmitter 0 UART UART0_ 0x400E0600 0 0x128 registers UART0 8 CR Control Register 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only MR Mode Register 0x00000004 32 read-write 0x00000000 PAR Parity Type 9 3 read-write EVEN Even Parity 0x0 ODD Odd Parity 0x1 SPACE Space: parity forced to 0 0x2 MARK Mark: parity forced to 1 0x3 NO No Parity 0x4 CHMODE Channel Mode 14 2 read-write NORMAL Normal Mode 0x0 AUTOMATIC Automatic Echo 0x1 LOCAL_LOOPBACK Local Loopback 0x2 REMOTE_LOOPBACK Remote Loopback 0x3 IER Interrupt Enable Register 0x00000008 32 write-only RXRDY Enable RXRDY Interrupt 0 1 write-only TXRDY Enable TXRDY Interrupt 1 1 write-only ENDRX Enable End of Receive Transfer Interrupt 3 1 write-only ENDTX Enable End of Transmit Interrupt 4 1 write-only OVRE Enable Overrun Error Interrupt 5 1 write-only FRAME Enable Framing Error Interrupt 6 1 write-only PARE Enable Parity Error Interrupt 7 1 write-only TXEMPTY Enable TXEMPTY Interrupt 9 1 write-only TXBUFE Enable Buffer Empty Interrupt 11 1 write-only RXBUFF Enable Buffer Full Interrupt 12 1 write-only IDR Interrupt Disable Register 0x0000000C 32 write-only RXRDY Disable RXRDY Interrupt 0 1 write-only TXRDY Disable TXRDY Interrupt 1 1 write-only ENDRX Disable End of Receive Transfer Interrupt 3 1 write-only ENDTX Disable End of Transmit Interrupt 4 1 write-only OVRE Disable Overrun Error Interrupt 5 1 write-only FRAME Disable Framing Error Interrupt 6 1 write-only PARE Disable Parity Error Interrupt 7 1 write-only TXEMPTY Disable TXEMPTY Interrupt 9 1 write-only TXBUFE Disable Buffer Empty Interrupt 11 1 write-only RXBUFF Disable Buffer Full Interrupt 12 1 write-only IMR Interrupt Mask Register 0x00000010 32 read-only 0x00000000 RXRDY Mask RXRDY Interrupt 0 1 read-only TXRDY Disable TXRDY Interrupt 1 1 read-only ENDRX Mask End of Receive Transfer Interrupt 3 1 read-only ENDTX Mask End of Transmit Interrupt 4 1 read-only OVRE Mask Overrun Error Interrupt 5 1 read-only FRAME Mask Framing Error Interrupt 6 1 read-only PARE Mask Parity Error Interrupt 7 1 read-only TXEMPTY Mask TXEMPTY Interrupt 9 1 read-only TXBUFE Mask TXBUFE Interrupt 11 1 read-only RXBUFF Mask RXBUFF Interrupt 12 1 read-only SR Status Register 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only ENDRX End of Receiver Transfer 3 1 read-only ENDTX End of Transmitter Transfer 4 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TXEMPTY Transmitter Empty 9 1 read-only TXBUFE Transmission Buffer Empty 11 1 read-only RXBUFF Receive Buffer Full 12 1 read-only RHR Receive Holding Register 0x00000018 32 read-only 0x00000000 RXCHR Received Character 0 8 read-only THR Transmit Holding Register 0x0000001C 32 write-only TXCHR Character to be Transmitted 0 8 write-only BRGR Baud Rate Generator Register 0x00000020 32 read-write 0x00000000 CD Clock Divisor 0 16 read-write RPR Receive Pointer Register 0x00000100 32 read-write 0x00000000 RXPTR Receive Pointer Register 0 32 read-write RCR Receive Counter Register 0x00000104 32 read-write 0x00000000 RXCTR Receive Counter Register 0 16 read-write TPR Transmit Pointer Register 0x00000108 32 read-write 0x00000000 TXPTR Transmit Counter Register 0 32 read-write TCR Transmit Counter Register 0x0000010C 32 read-write 0x00000000 TXCTR Transmit Counter Register 0 16 read-write RNPR Receive Next Pointer Register 0x00000110 32 read-write 0x00000000 RXNPTR Receive Next Pointer 0 32 read-write RNCR Receive Next Counter Register 0x00000114 32 read-write 0x00000000 RXNCTR Receive Next Counter 0 16 read-write TNPR Transmit Next Pointer Register 0x00000118 32 read-write 0x00000000 TXNPTR Transmit Next Pointer 0 32 read-write TNCR Transmit Next Counter Register 0x0000011C 32 read-write 0x00000000 TXNCTR Transmit Counter Next 0 16 read-write PTCR Transfer Control Register 0x00000120 32 write-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 write-only RXTDIS Receiver Transfer Disable 1 1 write-only TXTEN Transmitter Transfer Enable 8 1 write-only TXTDIS Transmitter Transfer Disable 9 1 write-only PTSR Transfer Status Register 0x00000124 32 read-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 read-only TXTEN Transmitter Transfer Enable 8 1 read-only CHIPID 6417P Chip Identifier CHIPID_ 0x400E0740 0 0x200 registers CIDR Chip ID Register 0x00000000 32 read-only VERSION Version of the Device 0 5 read-only EPROC Embedded Processor 5 3 read-only ARM946ES ARM946ES 0x1 ARM7TDMI ARM7TDMI 0x2 CM3 Cortex-M3 0x3 ARM920T ARM920T 0x4 ARM926EJS ARM926EJS 0x5 CA5 Cortex-A5 0x6 CM4 Cortex-M4 0x7 NVPSIZ Nonvolatile Program Memory Size 8 4 read-only NONE None 0x0 8K 8 Kbytes 0x1 16K 16 Kbytes 0x2 32K 32 Kbytes 0x3 64K 64 Kbytes 0x5 128K 128 Kbytes 0x7 256K 256 Kbytes 0x9 512K 512 Kbytes 0xA 1024K 1024 Kbytes 0xC 2048K 2048 Kbytes 0xE NVPSIZ2 Second Nonvolatile Program Memory Size 12 4 read-only NONE None 0x0 8K 8 Kbytes 0x1 16K 16 Kbytes 0x2 32K 32 Kbytes 0x3 64K 64 Kbytes 0x5 128K 128 Kbytes 0x7 256K 256 Kbytes 0x9 512K 512 Kbytes 0xA 1024K 1024 Kbytes 0xC 2048K 2048 Kbytes 0xE SRAMSIZ Internal SRAM Size 16 4 read-only 48K 48 Kbytes 0x0 192K 192 Kbytes 0x1 2K 2 Kbytes 0x2 6K 6 Kbytes 0x3 24K 24 Kbytes 0x4 4K 4 Kbytes 0x5 80K 80 Kbytes 0x6 160K 160 Kbytes 0x7 8K 8 Kbytes 0x8 16K 16 Kbytes 0x9 32K 32 Kbytes 0xA 64K 64 Kbytes 0xB 128K 128 Kbytes 0xC 256K 256 Kbytes 0xD 96K 96 Kbytes 0xE 512K 512 Kbytes 0xF ARCH Architecture Identifier 20 8 read-only AT91SAM9xx AT91SAM9xx Series 0x19 AT91SAM9XExx AT91SAM9XExx Series 0x29 AT91x34 AT91x34 Series 0x34 CAP7 CAP7 Series 0x37 CAP9 CAP9 Series 0x39 CAP11 CAP11 Series 0x3B AT91x40 AT91x40 Series 0x40 AT91x42 AT91x42 Series 0x42 AT91SAM4SH2 AT91SAM4SH2 Series 0x45 AT91x55 AT91x55 Series 0x55 AT91SAM7Axx AT91SAM7Axx Series 0x60 AT91SAM7AQxx AT91SAM7AQxx Series 0x61 AT91x63 AT91x63 Series 0x63 SAM4CxxC SAM4CxC Series (100-pin version) 0x64 AT91SAM7Sxx AT91SAM7Sxx Series 0x70 AT91SAM7XCxx AT91SAM7XCxx Series 0x71 AT91SAM7SExx AT91SAM7SExx Series 0x72 AT91SAM7Lxx AT91SAM7Lxx Series 0x73 AT91SAM7Xxx AT91SAM7Xxx Series 0x75 AT91SAM7SLxx AT91SAM7SLxx Series 0x76 SAM3UxC SAM3UxC Series (100-pin version) 0x80 SAM3UxE SAM3UxE Series (144-pin version) 0x81 SAM3AxC SAM3AxC Series (100-pin version) 0x83 SAM3XxC SAM3XxC Series (100-pin version) 0x84 SAM3XxE SAM3XxE Series (144-pin version) 0x85 SAM3XxG SAM3XxG Series (208/217-pin version) 0x86 SAM3SxA SAM3SxASeries (48-pin version) 0x88 SAM3SxB SAM3SxB Series (64-pin version) 0x89 SAM3SxC SAM3SxC Series (100-pin version) 0x8A AT91x92 AT91x92 Series 0x92 SAM3SDxB SAM3SDxB Series (64-pin version) 0x99 SAM3SDxC SAM3SDxC Series (100-pin version) 0x9A SAM5A SAM5A 0xA5 SAM4LxA SAM4LxA Series (48-pin version) 0xB0 SAM4LxB SAM4LxB Series (64-pin version) 0xB1 SAM4LxC SAM4LxC Series (100-pin version) 0xB2 AT75Cxx AT75Cxx Series 0xF0 NVPTYP Nonvolatile Program Memory Type 28 3 read-only ROM ROM 0x0 ROMLESS ROMless or on-chip Flash 0x1 FLASH Embedded Flash Memory 0x2 ROM_FLASH ROM and Embedded Flash Memory- NVPSIZ is ROM size- NVPSIZ2 is Flash size 0x3 SRAM SRAM emulating ROM 0x4 EXT Extension Flag 31 1 read-only EXID Chip ID Extension Register 0x00000004 32 read-only EXID Chip ID Extension 0 32 read-only UART1 6418H Universal Asynchronous Receiver Transmitter 1 UART UART1_ 0x400E0800 0 0x128 registers UART1 9 CR Control Register 0x00000000 32 write-only RSTRX Reset Receiver 2 1 write-only RSTTX Reset Transmitter 3 1 write-only RXEN Receiver Enable 4 1 write-only RXDIS Receiver Disable 5 1 write-only TXEN Transmitter Enable 6 1 write-only TXDIS Transmitter Disable 7 1 write-only RSTSTA Reset Status Bits 8 1 write-only MR Mode Register 0x00000004 32 read-write 0x00000000 PAR Parity Type 9 3 read-write EVEN Even Parity 0x0 ODD Odd Parity 0x1 SPACE Space: parity forced to 0 0x2 MARK Mark: parity forced to 1 0x3 NO No Parity 0x4 CHMODE Channel Mode 14 2 read-write NORMAL Normal Mode 0x0 AUTOMATIC Automatic Echo 0x1 LOCAL_LOOPBACK Local Loopback 0x2 REMOTE_LOOPBACK Remote Loopback 0x3 IER Interrupt Enable Register 0x00000008 32 write-only RXRDY Enable RXRDY Interrupt 0 1 write-only TXRDY Enable TXRDY Interrupt 1 1 write-only ENDRX Enable End of Receive Transfer Interrupt 3 1 write-only ENDTX Enable End of Transmit Interrupt 4 1 write-only OVRE Enable Overrun Error Interrupt 5 1 write-only FRAME Enable Framing Error Interrupt 6 1 write-only PARE Enable Parity Error Interrupt 7 1 write-only TXEMPTY Enable TXEMPTY Interrupt 9 1 write-only TXBUFE Enable Buffer Empty Interrupt 11 1 write-only RXBUFF Enable Buffer Full Interrupt 12 1 write-only IDR Interrupt Disable Register 0x0000000C 32 write-only RXRDY Disable RXRDY Interrupt 0 1 write-only TXRDY Disable TXRDY Interrupt 1 1 write-only ENDRX Disable End of Receive Transfer Interrupt 3 1 write-only ENDTX Disable End of Transmit Interrupt 4 1 write-only OVRE Disable Overrun Error Interrupt 5 1 write-only FRAME Disable Framing Error Interrupt 6 1 write-only PARE Disable Parity Error Interrupt 7 1 write-only TXEMPTY Disable TXEMPTY Interrupt 9 1 write-only TXBUFE Disable Buffer Empty Interrupt 11 1 write-only RXBUFF Disable Buffer Full Interrupt 12 1 write-only IMR Interrupt Mask Register 0x00000010 32 read-only 0x00000000 RXRDY Mask RXRDY Interrupt 0 1 read-only TXRDY Disable TXRDY Interrupt 1 1 read-only ENDRX Mask End of Receive Transfer Interrupt 3 1 read-only ENDTX Mask End of Transmit Interrupt 4 1 read-only OVRE Mask Overrun Error Interrupt 5 1 read-only FRAME Mask Framing Error Interrupt 6 1 read-only PARE Mask Parity Error Interrupt 7 1 read-only TXEMPTY Mask TXEMPTY Interrupt 9 1 read-only TXBUFE Mask TXBUFE Interrupt 11 1 read-only RXBUFF Mask RXBUFF Interrupt 12 1 read-only SR Status Register 0x00000014 32 read-only RXRDY Receiver Ready 0 1 read-only TXRDY Transmitter Ready 1 1 read-only ENDRX End of Receiver Transfer 3 1 read-only ENDTX End of Transmitter Transfer 4 1 read-only OVRE Overrun Error 5 1 read-only FRAME Framing Error 6 1 read-only PARE Parity Error 7 1 read-only TXEMPTY Transmitter Empty 9 1 read-only TXBUFE Transmission Buffer Empty 11 1 read-only RXBUFF Receive Buffer Full 12 1 read-only RHR Receive Holding Register 0x00000018 32 read-only 0x00000000 RXCHR Received Character 0 8 read-only THR Transmit Holding Register 0x0000001C 32 write-only TXCHR Character to be Transmitted 0 8 write-only BRGR Baud Rate Generator Register 0x00000020 32 read-write 0x00000000 CD Clock Divisor 0 16 read-write RPR Receive Pointer Register 0x00000100 32 read-write 0x00000000 RXPTR Receive Pointer Register 0 32 read-write RCR Receive Counter Register 0x00000104 32 read-write 0x00000000 RXCTR Receive Counter Register 0 16 read-write TPR Transmit Pointer Register 0x00000108 32 read-write 0x00000000 TXPTR Transmit Counter Register 0 32 read-write TCR Transmit Counter Register 0x0000010C 32 read-write 0x00000000 TXCTR Transmit Counter Register 0 16 read-write RNPR Receive Next Pointer Register 0x00000110 32 read-write 0x00000000 RXNPTR Receive Next Pointer 0 32 read-write RNCR Receive Next Counter Register 0x00000114 32 read-write 0x00000000 RXNCTR Receive Next Counter 0 16 read-write TNPR Transmit Next Pointer Register 0x00000118 32 read-write 0x00000000 TXNPTR Transmit Next Pointer 0 32 read-write TNCR Transmit Next Counter Register 0x0000011C 32 read-write 0x00000000 TXNCTR Transmit Counter Next 0 16 read-write PTCR Transfer Control Register 0x00000120 32 write-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 write-only RXTDIS Receiver Transfer Disable 1 1 write-only TXTEN Transmitter Transfer Enable 8 1 write-only TXTDIS Transmitter Transfer Disable 9 1 write-only PTSR Transfer Status Register 0x00000124 32 read-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 read-only TXTEN Transmitter Transfer Enable 8 1 read-only EFC 6450J Embedded Flash Controller EFC_ 0x400E0A00 0 0x200 registers EFC 6 FMR EEFC Flash Mode Register 0x00000000 32 read-write 0x00000000 FRDY Ready Interrupt Enable 0 1 read-write FWS Flash Wait State 8 4 read-write SCOD Sequential Code Optimization Disable 16 1 read-write FAM Flash Access Mode 24 1 read-write FCR EEFC Flash Command Register 0x00000004 32 write-only FCMD Flash Command 0 8 write-only GETD Get Flash Descriptor 0x00 WP Write page 0x01 WPL Write page and lock 0x02 EWP Erase page and write page 0x03 EWPL Erase page and write page then lock 0x04 EA Erase all 0x05 SLB Set Lock Bit 0x08 CLB Clear Lock Bit 0x09 GLB Get Lock Bit 0x0A SGPB Set GPNVM Bit 0x0B CGPB Clear GPNVM Bit 0x0C GGPB Get GPNVM Bit 0x0D STUI Start Read Unique Identifier 0x0E SPUI Stop Read Unique Identifier 0x0F GCALB Get CALIB Bit 0x10 FARG Flash Command Argument 8 16 write-only FKEY Flash Writing Protection Key 24 8 write-only PASSWD The 0x5A value enables the command defined by the bits of the register. If the field is written with a different value, the write is not performed and no action is started. 0x5A FSR EEFC Flash Status Register 0x00000008 32 read-only 0x00000001 FRDY Flash Ready Status 0 1 read-only FCMDE Flash Command Error Status 1 1 read-only FLOCKE Flash Lock Error Status 2 1 read-only FRR EEFC Flash Result Register 0x0000000C 32 read-only 0x00000000 FVALUE Flash Result Value 0 32 read-only PIOA 11004J Parallel Input/Output Controller A PIO PIOA_ 0x400E0E00 0 0x200 registers PIOA 11 PER PIO Enable Register 0x00000000 32 write-only P0 PIO Enable 0 1 write-only P1 PIO Enable 1 1 write-only P2 PIO Enable 2 1 write-only P3 PIO Enable 3 1 write-only P4 PIO Enable 4 1 write-only P5 PIO Enable 5 1 write-only P6 PIO Enable 6 1 write-only P7 PIO Enable 7 1 write-only P8 PIO Enable 8 1 write-only P9 PIO Enable 9 1 write-only P10 PIO Enable 10 1 write-only P11 PIO Enable 11 1 write-only P12 PIO Enable 12 1 write-only P13 PIO Enable 13 1 write-only P14 PIO Enable 14 1 write-only P15 PIO Enable 15 1 write-only P16 PIO Enable 16 1 write-only P17 PIO Enable 17 1 write-only P18 PIO Enable 18 1 write-only P19 PIO Enable 19 1 write-only P20 PIO Enable 20 1 write-only P21 PIO Enable 21 1 write-only P22 PIO Enable 22 1 write-only P23 PIO Enable 23 1 write-only P24 PIO Enable 24 1 write-only P25 PIO Enable 25 1 write-only P26 PIO Enable 26 1 write-only P27 PIO Enable 27 1 write-only P28 PIO Enable 28 1 write-only P29 PIO Enable 29 1 write-only P30 PIO Enable 30 1 write-only P31 PIO Enable 31 1 write-only PDR PIO Disable Register 0x00000004 32 write-only P0 PIO Disable 0 1 write-only P1 PIO Disable 1 1 write-only P2 PIO Disable 2 1 write-only P3 PIO Disable 3 1 write-only P4 PIO Disable 4 1 write-only P5 PIO Disable 5 1 write-only P6 PIO Disable 6 1 write-only P7 PIO Disable 7 1 write-only P8 PIO Disable 8 1 write-only P9 PIO Disable 9 1 write-only P10 PIO Disable 10 1 write-only P11 PIO Disable 11 1 write-only P12 PIO Disable 12 1 write-only P13 PIO Disable 13 1 write-only P14 PIO Disable 14 1 write-only P15 PIO Disable 15 1 write-only P16 PIO Disable 16 1 write-only P17 PIO Disable 17 1 write-only P18 PIO Disable 18 1 write-only P19 PIO Disable 19 1 write-only P20 PIO Disable 20 1 write-only P21 PIO Disable 21 1 write-only P22 PIO Disable 22 1 write-only P23 PIO Disable 23 1 write-only P24 PIO Disable 24 1 write-only P25 PIO Disable 25 1 write-only P26 PIO Disable 26 1 write-only P27 PIO Disable 27 1 write-only P28 PIO Disable 28 1 write-only P29 PIO Disable 29 1 write-only P30 PIO Disable 30 1 write-only P31 PIO Disable 31 1 write-only PSR PIO Status Register 0x00000008 32 read-only P0 PIO Status 0 1 read-only P1 PIO Status 1 1 read-only P2 PIO Status 2 1 read-only P3 PIO Status 3 1 read-only P4 PIO Status 4 1 read-only P5 PIO Status 5 1 read-only P6 PIO Status 6 1 read-only P7 PIO Status 7 1 read-only P8 PIO Status 8 1 read-only P9 PIO Status 9 1 read-only P10 PIO Status 10 1 read-only P11 PIO Status 11 1 read-only P12 PIO Status 12 1 read-only P13 PIO Status 13 1 read-only P14 PIO Status 14 1 read-only P15 PIO Status 15 1 read-only P16 PIO Status 16 1 read-only P17 PIO Status 17 1 read-only P18 PIO Status 18 1 read-only P19 PIO Status 19 1 read-only P20 PIO Status 20 1 read-only P21 PIO Status 21 1 read-only P22 PIO Status 22 1 read-only P23 PIO Status 23 1 read-only P24 PIO Status 24 1 read-only P25 PIO Status 25 1 read-only P26 PIO Status 26 1 read-only P27 PIO Status 27 1 read-only P28 PIO Status 28 1 read-only P29 PIO Status 29 1 read-only P30 PIO Status 30 1 read-only P31 PIO Status 31 1 read-only OER Output Enable Register 0x00000010 32 write-only P0 Output Enable 0 1 write-only P1 Output Enable 1 1 write-only P2 Output Enable 2 1 write-only P3 Output Enable 3 1 write-only P4 Output Enable 4 1 write-only P5 Output Enable 5 1 write-only P6 Output Enable 6 1 write-only P7 Output Enable 7 1 write-only P8 Output Enable 8 1 write-only P9 Output Enable 9 1 write-only P10 Output Enable 10 1 write-only P11 Output Enable 11 1 write-only P12 Output Enable 12 1 write-only P13 Output Enable 13 1 write-only P14 Output Enable 14 1 write-only P15 Output Enable 15 1 write-only P16 Output Enable 16 1 write-only P17 Output Enable 17 1 write-only P18 Output Enable 18 1 write-only P19 Output Enable 19 1 write-only P20 Output Enable 20 1 write-only P21 Output Enable 21 1 write-only P22 Output Enable 22 1 write-only P23 Output Enable 23 1 write-only P24 Output Enable 24 1 write-only P25 Output Enable 25 1 write-only P26 Output Enable 26 1 write-only P27 Output Enable 27 1 write-only P28 Output Enable 28 1 write-only P29 Output Enable 29 1 write-only P30 Output Enable 30 1 write-only P31 Output Enable 31 1 write-only ODR Output Disable Register 0x00000014 32 write-only P0 Output Disable 0 1 write-only P1 Output Disable 1 1 write-only P2 Output Disable 2 1 write-only P3 Output Disable 3 1 write-only P4 Output Disable 4 1 write-only P5 Output Disable 5 1 write-only P6 Output Disable 6 1 write-only P7 Output Disable 7 1 write-only P8 Output Disable 8 1 write-only P9 Output Disable 9 1 write-only P10 Output Disable 10 1 write-only P11 Output Disable 11 1 write-only P12 Output Disable 12 1 write-only P13 Output Disable 13 1 write-only P14 Output Disable 14 1 write-only P15 Output Disable 15 1 write-only P16 Output Disable 16 1 write-only P17 Output Disable 17 1 write-only P18 Output Disable 18 1 write-only P19 Output Disable 19 1 write-only P20 Output Disable 20 1 write-only P21 Output Disable 21 1 write-only P22 Output Disable 22 1 write-only P23 Output Disable 23 1 write-only P24 Output Disable 24 1 write-only P25 Output Disable 25 1 write-only P26 Output Disable 26 1 write-only P27 Output Disable 27 1 write-only P28 Output Disable 28 1 write-only P29 Output Disable 29 1 write-only P30 Output Disable 30 1 write-only P31 Output Disable 31 1 write-only OSR Output Status Register 0x00000018 32 read-only 0x00000000 P0 Output Status 0 1 read-only P1 Output Status 1 1 read-only P2 Output Status 2 1 read-only P3 Output Status 3 1 read-only P4 Output Status 4 1 read-only P5 Output Status 5 1 read-only P6 Output Status 6 1 read-only P7 Output Status 7 1 read-only P8 Output Status 8 1 read-only P9 Output Status 9 1 read-only P10 Output Status 10 1 read-only P11 Output Status 11 1 read-only P12 Output Status 12 1 read-only P13 Output Status 13 1 read-only P14 Output Status 14 1 read-only P15 Output Status 15 1 read-only P16 Output Status 16 1 read-only P17 Output Status 17 1 read-only P18 Output Status 18 1 read-only P19 Output Status 19 1 read-only P20 Output Status 20 1 read-only P21 Output Status 21 1 read-only P22 Output Status 22 1 read-only P23 Output Status 23 1 read-only P24 Output Status 24 1 read-only P25 Output Status 25 1 read-only P26 Output Status 26 1 read-only P27 Output Status 27 1 read-only P28 Output Status 28 1 read-only P29 Output Status 29 1 read-only P30 Output Status 30 1 read-only P31 Output Status 31 1 read-only IFER Glitch Input Filter Enable Register 0x00000020 32 write-only P0 Input Filter Enable 0 1 write-only P1 Input Filter Enable 1 1 write-only P2 Input Filter Enable 2 1 write-only P3 Input Filter Enable 3 1 write-only P4 Input Filter Enable 4 1 write-only P5 Input Filter Enable 5 1 write-only P6 Input Filter Enable 6 1 write-only P7 Input Filter Enable 7 1 write-only P8 Input Filter Enable 8 1 write-only P9 Input Filter Enable 9 1 write-only P10 Input Filter Enable 10 1 write-only P11 Input Filter Enable 11 1 write-only P12 Input Filter Enable 12 1 write-only P13 Input Filter Enable 13 1 write-only P14 Input Filter Enable 14 1 write-only P15 Input Filter Enable 15 1 write-only P16 Input Filter Enable 16 1 write-only P17 Input Filter Enable 17 1 write-only P18 Input Filter Enable 18 1 write-only P19 Input Filter Enable 19 1 write-only P20 Input Filter Enable 20 1 write-only P21 Input Filter Enable 21 1 write-only P22 Input Filter Enable 22 1 write-only P23 Input Filter Enable 23 1 write-only P24 Input Filter Enable 24 1 write-only P25 Input Filter Enable 25 1 write-only P26 Input Filter Enable 26 1 write-only P27 Input Filter Enable 27 1 write-only P28 Input Filter Enable 28 1 write-only P29 Input Filter Enable 29 1 write-only P30 Input Filter Enable 30 1 write-only P31 Input Filter Enable 31 1 write-only IFDR Glitch Input Filter Disable Register 0x00000024 32 write-only P0 Input Filter Disable 0 1 write-only P1 Input Filter Disable 1 1 write-only P2 Input Filter Disable 2 1 write-only P3 Input Filter Disable 3 1 write-only P4 Input Filter Disable 4 1 write-only P5 Input Filter Disable 5 1 write-only P6 Input Filter Disable 6 1 write-only P7 Input Filter Disable 7 1 write-only P8 Input Filter Disable 8 1 write-only P9 Input Filter Disable 9 1 write-only P10 Input Filter Disable 10 1 write-only P11 Input Filter Disable 11 1 write-only P12 Input Filter Disable 12 1 write-only P13 Input Filter Disable 13 1 write-only P14 Input Filter Disable 14 1 write-only P15 Input Filter Disable 15 1 write-only P16 Input Filter Disable 16 1 write-only P17 Input Filter Disable 17 1 write-only P18 Input Filter Disable 18 1 write-only P19 Input Filter Disable 19 1 write-only P20 Input Filter Disable 20 1 write-only P21 Input Filter Disable 21 1 write-only P22 Input Filter Disable 22 1 write-only P23 Input Filter Disable 23 1 write-only P24 Input Filter Disable 24 1 write-only P25 Input Filter Disable 25 1 write-only P26 Input Filter Disable 26 1 write-only P27 Input Filter Disable 27 1 write-only P28 Input Filter Disable 28 1 write-only P29 Input Filter Disable 29 1 write-only P30 Input Filter Disable 30 1 write-only P31 Input Filter Disable 31 1 write-only IFSR Glitch Input Filter Status Register 0x00000028 32 read-only 0x00000000 P0 Input Filer Status 0 1 read-only P1 Input Filer Status 1 1 read-only P2 Input Filer Status 2 1 read-only P3 Input Filer Status 3 1 read-only P4 Input Filer Status 4 1 read-only P5 Input Filer Status 5 1 read-only P6 Input Filer Status 6 1 read-only P7 Input Filer Status 7 1 read-only P8 Input Filer Status 8 1 read-only P9 Input Filer Status 9 1 read-only P10 Input Filer Status 10 1 read-only P11 Input Filer Status 11 1 read-only P12 Input Filer Status 12 1 read-only P13 Input Filer Status 13 1 read-only P14 Input Filer Status 14 1 read-only P15 Input Filer Status 15 1 read-only P16 Input Filer Status 16 1 read-only P17 Input Filer Status 17 1 read-only P18 Input Filer Status 18 1 read-only P19 Input Filer Status 19 1 read-only P20 Input Filer Status 20 1 read-only P21 Input Filer Status 21 1 read-only P22 Input Filer Status 22 1 read-only P23 Input Filer Status 23 1 read-only P24 Input Filer Status 24 1 read-only P25 Input Filer Status 25 1 read-only P26 Input Filer Status 26 1 read-only P27 Input Filer Status 27 1 read-only P28 Input Filer Status 28 1 read-only P29 Input Filer Status 29 1 read-only P30 Input Filer Status 30 1 read-only P31 Input Filer Status 31 1 read-only SODR Set Output Data Register 0x00000030 32 write-only P0 Set Output Data 0 1 write-only P1 Set Output Data 1 1 write-only P2 Set Output Data 2 1 write-only P3 Set Output Data 3 1 write-only P4 Set Output Data 4 1 write-only P5 Set Output Data 5 1 write-only P6 Set Output Data 6 1 write-only P7 Set Output Data 7 1 write-only P8 Set Output Data 8 1 write-only P9 Set Output Data 9 1 write-only P10 Set Output Data 10 1 write-only P11 Set Output Data 11 1 write-only P12 Set Output Data 12 1 write-only P13 Set Output Data 13 1 write-only P14 Set Output Data 14 1 write-only P15 Set Output Data 15 1 write-only P16 Set Output Data 16 1 write-only P17 Set Output Data 17 1 write-only P18 Set Output Data 18 1 write-only P19 Set Output Data 19 1 write-only P20 Set Output Data 20 1 write-only P21 Set Output Data 21 1 write-only P22 Set Output Data 22 1 write-only P23 Set Output Data 23 1 write-only P24 Set Output Data 24 1 write-only P25 Set Output Data 25 1 write-only P26 Set Output Data 26 1 write-only P27 Set Output Data 27 1 write-only P28 Set Output Data 28 1 write-only P29 Set Output Data 29 1 write-only P30 Set Output Data 30 1 write-only P31 Set Output Data 31 1 write-only CODR Clear Output Data Register 0x00000034 32 write-only P0 Clear Output Data 0 1 write-only P1 Clear Output Data 1 1 write-only P2 Clear Output Data 2 1 write-only P3 Clear Output Data 3 1 write-only P4 Clear Output Data 4 1 write-only P5 Clear Output Data 5 1 write-only P6 Clear Output Data 6 1 write-only P7 Clear Output Data 7 1 write-only P8 Clear Output Data 8 1 write-only P9 Clear Output Data 9 1 write-only P10 Clear Output Data 10 1 write-only P11 Clear Output Data 11 1 write-only P12 Clear Output Data 12 1 write-only P13 Clear Output Data 13 1 write-only P14 Clear Output Data 14 1 write-only P15 Clear Output Data 15 1 write-only P16 Clear Output Data 16 1 write-only P17 Clear Output Data 17 1 write-only P18 Clear Output Data 18 1 write-only P19 Clear Output Data 19 1 write-only P20 Clear Output Data 20 1 write-only P21 Clear Output Data 21 1 write-only P22 Clear Output Data 22 1 write-only P23 Clear Output Data 23 1 write-only P24 Clear Output Data 24 1 write-only P25 Clear Output Data 25 1 write-only P26 Clear Output Data 26 1 write-only P27 Clear Output Data 27 1 write-only P28 Clear Output Data 28 1 write-only P29 Clear Output Data 29 1 write-only P30 Clear Output Data 30 1 write-only P31 Clear Output Data 31 1 write-only ODSR Output Data Status Register 0x00000038 32 read-write P0 Output Data Status 0 1 read-write P1 Output Data Status 1 1 read-write P2 Output Data Status 2 1 read-write P3 Output Data Status 3 1 read-write P4 Output Data Status 4 1 read-write P5 Output Data Status 5 1 read-write P6 Output Data Status 6 1 read-write P7 Output Data Status 7 1 read-write P8 Output Data Status 8 1 read-write P9 Output Data Status 9 1 read-write P10 Output Data Status 10 1 read-write P11 Output Data Status 11 1 read-write P12 Output Data Status 12 1 read-write P13 Output Data Status 13 1 read-write P14 Output Data Status 14 1 read-write P15 Output Data Status 15 1 read-write P16 Output Data Status 16 1 read-write P17 Output Data Status 17 1 read-write P18 Output Data Status 18 1 read-write P19 Output Data Status 19 1 read-write P20 Output Data Status 20 1 read-write P21 Output Data Status 21 1 read-write P22 Output Data Status 22 1 read-write P23 Output Data Status 23 1 read-write P24 Output Data Status 24 1 read-write P25 Output Data Status 25 1 read-write P26 Output Data Status 26 1 read-write P27 Output Data Status 27 1 read-write P28 Output Data Status 28 1 read-write P29 Output Data Status 29 1 read-write P30 Output Data Status 30 1 read-write P31 Output Data Status 31 1 read-write PDSR Pin Data Status Register 0x0000003C 32 read-only P0 Output Data Status 0 1 read-only P1 Output Data Status 1 1 read-only P2 Output Data Status 2 1 read-only P3 Output Data Status 3 1 read-only P4 Output Data Status 4 1 read-only P5 Output Data Status 5 1 read-only P6 Output Data Status 6 1 read-only P7 Output Data Status 7 1 read-only P8 Output Data Status 8 1 read-only P9 Output Data Status 9 1 read-only P10 Output Data Status 10 1 read-only P11 Output Data Status 11 1 read-only P12 Output Data Status 12 1 read-only P13 Output Data Status 13 1 read-only P14 Output Data Status 14 1 read-only P15 Output Data Status 15 1 read-only P16 Output Data Status 16 1 read-only P17 Output Data Status 17 1 read-only P18 Output Data Status 18 1 read-only P19 Output Data Status 19 1 read-only P20 Output Data Status 20 1 read-only P21 Output Data Status 21 1 read-only P22 Output Data Status 22 1 read-only P23 Output Data Status 23 1 read-only P24 Output Data Status 24 1 read-only P25 Output Data Status 25 1 read-only P26 Output Data Status 26 1 read-only P27 Output Data Status 27 1 read-only P28 Output Data Status 28 1 read-only P29 Output Data Status 29 1 read-only P30 Output Data Status 30 1 read-only P31 Output Data Status 31 1 read-only IER Interrupt Enable Register 0x00000040 32 write-only P0 Input Change Interrupt Enable 0 1 write-only P1 Input Change Interrupt Enable 1 1 write-only P2 Input Change Interrupt Enable 2 1 write-only P3 Input Change Interrupt Enable 3 1 write-only P4 Input Change Interrupt Enable 4 1 write-only P5 Input Change Interrupt Enable 5 1 write-only P6 Input Change Interrupt Enable 6 1 write-only P7 Input Change Interrupt Enable 7 1 write-only P8 Input Change Interrupt Enable 8 1 write-only P9 Input Change Interrupt Enable 9 1 write-only P10 Input Change Interrupt Enable 10 1 write-only P11 Input Change Interrupt Enable 11 1 write-only P12 Input Change Interrupt Enable 12 1 write-only P13 Input Change Interrupt Enable 13 1 write-only P14 Input Change Interrupt Enable 14 1 write-only P15 Input Change Interrupt Enable 15 1 write-only P16 Input Change Interrupt Enable 16 1 write-only P17 Input Change Interrupt Enable 17 1 write-only P18 Input Change Interrupt Enable 18 1 write-only P19 Input Change Interrupt Enable 19 1 write-only P20 Input Change Interrupt Enable 20 1 write-only P21 Input Change Interrupt Enable 21 1 write-only P22 Input Change Interrupt Enable 22 1 write-only P23 Input Change Interrupt Enable 23 1 write-only P24 Input Change Interrupt Enable 24 1 write-only P25 Input Change Interrupt Enable 25 1 write-only P26 Input Change Interrupt Enable 26 1 write-only P27 Input Change Interrupt Enable 27 1 write-only P28 Input Change Interrupt Enable 28 1 write-only P29 Input Change Interrupt Enable 29 1 write-only P30 Input Change Interrupt Enable 30 1 write-only P31 Input Change Interrupt Enable 31 1 write-only IDR Interrupt Disable Register 0x00000044 32 write-only P0 Input Change Interrupt Disable 0 1 write-only P1 Input Change Interrupt Disable 1 1 write-only P2 Input Change Interrupt Disable 2 1 write-only P3 Input Change Interrupt Disable 3 1 write-only P4 Input Change Interrupt Disable 4 1 write-only P5 Input Change Interrupt Disable 5 1 write-only P6 Input Change Interrupt Disable 6 1 write-only P7 Input Change Interrupt Disable 7 1 write-only P8 Input Change Interrupt Disable 8 1 write-only P9 Input Change Interrupt Disable 9 1 write-only P10 Input Change Interrupt Disable 10 1 write-only P11 Input Change Interrupt Disable 11 1 write-only P12 Input Change Interrupt Disable 12 1 write-only P13 Input Change Interrupt Disable 13 1 write-only P14 Input Change Interrupt Disable 14 1 write-only P15 Input Change Interrupt Disable 15 1 write-only P16 Input Change Interrupt Disable 16 1 write-only P17 Input Change Interrupt Disable 17 1 write-only P18 Input Change Interrupt Disable 18 1 write-only P19 Input Change Interrupt Disable 19 1 write-only P20 Input Change Interrupt Disable 20 1 write-only P21 Input Change Interrupt Disable 21 1 write-only P22 Input Change Interrupt Disable 22 1 write-only P23 Input Change Interrupt Disable 23 1 write-only P24 Input Change Interrupt Disable 24 1 write-only P25 Input Change Interrupt Disable 25 1 write-only P26 Input Change Interrupt Disable 26 1 write-only P27 Input Change Interrupt Disable 27 1 write-only P28 Input Change Interrupt Disable 28 1 write-only P29 Input Change Interrupt Disable 29 1 write-only P30 Input Change Interrupt Disable 30 1 write-only P31 Input Change Interrupt Disable 31 1 write-only IMR Interrupt Mask Register 0x00000048 32 read-only 0x00000000 P0 Input Change Interrupt Mask 0 1 read-only P1 Input Change Interrupt Mask 1 1 read-only P2 Input Change Interrupt Mask 2 1 read-only P3 Input Change Interrupt Mask 3 1 read-only P4 Input Change Interrupt Mask 4 1 read-only P5 Input Change Interrupt Mask 5 1 read-only P6 Input Change Interrupt Mask 6 1 read-only P7 Input Change Interrupt Mask 7 1 read-only P8 Input Change Interrupt Mask 8 1 read-only P9 Input Change Interrupt Mask 9 1 read-only P10 Input Change Interrupt Mask 10 1 read-only P11 Input Change Interrupt Mask 11 1 read-only P12 Input Change Interrupt Mask 12 1 read-only P13 Input Change Interrupt Mask 13 1 read-only P14 Input Change Interrupt Mask 14 1 read-only P15 Input Change Interrupt Mask 15 1 read-only P16 Input Change Interrupt Mask 16 1 read-only P17 Input Change Interrupt Mask 17 1 read-only P18 Input Change Interrupt Mask 18 1 read-only P19 Input Change Interrupt Mask 19 1 read-only P20 Input Change Interrupt Mask 20 1 read-only P21 Input Change Interrupt Mask 21 1 read-only P22 Input Change Interrupt Mask 22 1 read-only P23 Input Change Interrupt Mask 23 1 read-only P24 Input Change Interrupt Mask 24 1 read-only P25 Input Change Interrupt Mask 25 1 read-only P26 Input Change Interrupt Mask 26 1 read-only P27 Input Change Interrupt Mask 27 1 read-only P28 Input Change Interrupt Mask 28 1 read-only P29 Input Change Interrupt Mask 29 1 read-only P30 Input Change Interrupt Mask 30 1 read-only P31 Input Change Interrupt Mask 31 1 read-only ISR Interrupt Status Register 0x0000004C 32 read-only 0x00000000 P0 Input Change Interrupt Status 0 1 read-only P1 Input Change Interrupt Status 1 1 read-only P2 Input Change Interrupt Status 2 1 read-only P3 Input Change Interrupt Status 3 1 read-only P4 Input Change Interrupt Status 4 1 read-only P5 Input Change Interrupt Status 5 1 read-only P6 Input Change Interrupt Status 6 1 read-only P7 Input Change Interrupt Status 7 1 read-only P8 Input Change Interrupt Status 8 1 read-only P9 Input Change Interrupt Status 9 1 read-only P10 Input Change Interrupt Status 10 1 read-only P11 Input Change Interrupt Status 11 1 read-only P12 Input Change Interrupt Status 12 1 read-only P13 Input Change Interrupt Status 13 1 read-only P14 Input Change Interrupt Status 14 1 read-only P15 Input Change Interrupt Status 15 1 read-only P16 Input Change Interrupt Status 16 1 read-only P17 Input Change Interrupt Status 17 1 read-only P18 Input Change Interrupt Status 18 1 read-only P19 Input Change Interrupt Status 19 1 read-only P20 Input Change Interrupt Status 20 1 read-only P21 Input Change Interrupt Status 21 1 read-only P22 Input Change Interrupt Status 22 1 read-only P23 Input Change Interrupt Status 23 1 read-only P24 Input Change Interrupt Status 24 1 read-only P25 Input Change Interrupt Status 25 1 read-only P26 Input Change Interrupt Status 26 1 read-only P27 Input Change Interrupt Status 27 1 read-only P28 Input Change Interrupt Status 28 1 read-only P29 Input Change Interrupt Status 29 1 read-only P30 Input Change Interrupt Status 30 1 read-only P31 Input Change Interrupt Status 31 1 read-only MDER Multi-driver Enable Register 0x00000050 32 write-only P0 Multi Drive Enable 0 1 write-only P1 Multi Drive Enable 1 1 write-only P2 Multi Drive Enable 2 1 write-only P3 Multi Drive Enable 3 1 write-only P4 Multi Drive Enable 4 1 write-only P5 Multi Drive Enable 5 1 write-only P6 Multi Drive Enable 6 1 write-only P7 Multi Drive Enable 7 1 write-only P8 Multi Drive Enable 8 1 write-only P9 Multi Drive Enable 9 1 write-only P10 Multi Drive Enable 10 1 write-only P11 Multi Drive Enable 11 1 write-only P12 Multi Drive Enable 12 1 write-only P13 Multi Drive Enable 13 1 write-only P14 Multi Drive Enable 14 1 write-only P15 Multi Drive Enable 15 1 write-only P16 Multi Drive Enable 16 1 write-only P17 Multi Drive Enable 17 1 write-only P18 Multi Drive Enable 18 1 write-only P19 Multi Drive Enable 19 1 write-only P20 Multi Drive Enable 20 1 write-only P21 Multi Drive Enable 21 1 write-only P22 Multi Drive Enable 22 1 write-only P23 Multi Drive Enable 23 1 write-only P24 Multi Drive Enable 24 1 write-only P25 Multi Drive Enable 25 1 write-only P26 Multi Drive Enable 26 1 write-only P27 Multi Drive Enable 27 1 write-only P28 Multi Drive Enable 28 1 write-only P29 Multi Drive Enable 29 1 write-only P30 Multi Drive Enable 30 1 write-only P31 Multi Drive Enable 31 1 write-only MDDR Multi-driver Disable Register 0x00000054 32 write-only P0 Multi Drive Disable. 0 1 write-only P1 Multi Drive Disable. 1 1 write-only P2 Multi Drive Disable. 2 1 write-only P3 Multi Drive Disable. 3 1 write-only P4 Multi Drive Disable. 4 1 write-only P5 Multi Drive Disable. 5 1 write-only P6 Multi Drive Disable. 6 1 write-only P7 Multi Drive Disable. 7 1 write-only P8 Multi Drive Disable. 8 1 write-only P9 Multi Drive Disable. 9 1 write-only P10 Multi Drive Disable. 10 1 write-only P11 Multi Drive Disable. 11 1 write-only P12 Multi Drive Disable. 12 1 write-only P13 Multi Drive Disable. 13 1 write-only P14 Multi Drive Disable. 14 1 write-only P15 Multi Drive Disable. 15 1 write-only P16 Multi Drive Disable. 16 1 write-only P17 Multi Drive Disable. 17 1 write-only P18 Multi Drive Disable. 18 1 write-only P19 Multi Drive Disable. 19 1 write-only P20 Multi Drive Disable. 20 1 write-only P21 Multi Drive Disable. 21 1 write-only P22 Multi Drive Disable. 22 1 write-only P23 Multi Drive Disable. 23 1 write-only P24 Multi Drive Disable. 24 1 write-only P25 Multi Drive Disable. 25 1 write-only P26 Multi Drive Disable. 26 1 write-only P27 Multi Drive Disable. 27 1 write-only P28 Multi Drive Disable. 28 1 write-only P29 Multi Drive Disable. 29 1 write-only P30 Multi Drive Disable. 30 1 write-only P31 Multi Drive Disable. 31 1 write-only MDSR Multi-driver Status Register 0x00000058 32 read-only 0x00000000 P0 Multi Drive Status. 0 1 read-only P1 Multi Drive Status. 1 1 read-only P2 Multi Drive Status. 2 1 read-only P3 Multi Drive Status. 3 1 read-only P4 Multi Drive Status. 4 1 read-only P5 Multi Drive Status. 5 1 read-only P6 Multi Drive Status. 6 1 read-only P7 Multi Drive Status. 7 1 read-only P8 Multi Drive Status. 8 1 read-only P9 Multi Drive Status. 9 1 read-only P10 Multi Drive Status. 10 1 read-only P11 Multi Drive Status. 11 1 read-only P12 Multi Drive Status. 12 1 read-only P13 Multi Drive Status. 13 1 read-only P14 Multi Drive Status. 14 1 read-only P15 Multi Drive Status. 15 1 read-only P16 Multi Drive Status. 16 1 read-only P17 Multi Drive Status. 17 1 read-only P18 Multi Drive Status. 18 1 read-only P19 Multi Drive Status. 19 1 read-only P20 Multi Drive Status. 20 1 read-only P21 Multi Drive Status. 21 1 read-only P22 Multi Drive Status. 22 1 read-only P23 Multi Drive Status. 23 1 read-only P24 Multi Drive Status. 24 1 read-only P25 Multi Drive Status. 25 1 read-only P26 Multi Drive Status. 26 1 read-only P27 Multi Drive Status. 27 1 read-only P28 Multi Drive Status. 28 1 read-only P29 Multi Drive Status. 29 1 read-only P30 Multi Drive Status. 30 1 read-only P31 Multi Drive Status. 31 1 read-only PUDR Pull-up Disable Register 0x00000060 32 write-only P0 Pull Up Disable. 0 1 write-only P1 Pull Up Disable. 1 1 write-only P2 Pull Up Disable. 2 1 write-only P3 Pull Up Disable. 3 1 write-only P4 Pull Up Disable. 4 1 write-only P5 Pull Up Disable. 5 1 write-only P6 Pull Up Disable. 6 1 write-only P7 Pull Up Disable. 7 1 write-only P8 Pull Up Disable. 8 1 write-only P9 Pull Up Disable. 9 1 write-only P10 Pull Up Disable. 10 1 write-only P11 Pull Up Disable. 11 1 write-only P12 Pull Up Disable. 12 1 write-only P13 Pull Up Disable. 13 1 write-only P14 Pull Up Disable. 14 1 write-only P15 Pull Up Disable. 15 1 write-only P16 Pull Up Disable. 16 1 write-only P17 Pull Up Disable. 17 1 write-only P18 Pull Up Disable. 18 1 write-only P19 Pull Up Disable. 19 1 write-only P20 Pull Up Disable. 20 1 write-only P21 Pull Up Disable. 21 1 write-only P22 Pull Up Disable. 22 1 write-only P23 Pull Up Disable. 23 1 write-only P24 Pull Up Disable. 24 1 write-only P25 Pull Up Disable. 25 1 write-only P26 Pull Up Disable. 26 1 write-only P27 Pull Up Disable. 27 1 write-only P28 Pull Up Disable. 28 1 write-only P29 Pull Up Disable. 29 1 write-only P30 Pull Up Disable. 30 1 write-only P31 Pull Up Disable. 31 1 write-only PUER Pull-up Enable Register 0x00000064 32 write-only P0 Pull Up Enable. 0 1 write-only P1 Pull Up Enable. 1 1 write-only P2 Pull Up Enable. 2 1 write-only P3 Pull Up Enable. 3 1 write-only P4 Pull Up Enable. 4 1 write-only P5 Pull Up Enable. 5 1 write-only P6 Pull Up Enable. 6 1 write-only P7 Pull Up Enable. 7 1 write-only P8 Pull Up Enable. 8 1 write-only P9 Pull Up Enable. 9 1 write-only P10 Pull Up Enable. 10 1 write-only P11 Pull Up Enable. 11 1 write-only P12 Pull Up Enable. 12 1 write-only P13 Pull Up Enable. 13 1 write-only P14 Pull Up Enable. 14 1 write-only P15 Pull Up Enable. 15 1 write-only P16 Pull Up Enable. 16 1 write-only P17 Pull Up Enable. 17 1 write-only P18 Pull Up Enable. 18 1 write-only P19 Pull Up Enable. 19 1 write-only P20 Pull Up Enable. 20 1 write-only P21 Pull Up Enable. 21 1 write-only P22 Pull Up Enable. 22 1 write-only P23 Pull Up Enable. 23 1 write-only P24 Pull Up Enable. 24 1 write-only P25 Pull Up Enable. 25 1 write-only P26 Pull Up Enable. 26 1 write-only P27 Pull Up Enable. 27 1 write-only P28 Pull Up Enable. 28 1 write-only P29 Pull Up Enable. 29 1 write-only P30 Pull Up Enable. 30 1 write-only P31 Pull Up Enable. 31 1 write-only PUSR Pad Pull-up Status Register 0x00000068 32 read-only P0 Pull Up Status. 0 1 read-only P1 Pull Up Status. 1 1 read-only P2 Pull Up Status. 2 1 read-only P3 Pull Up Status. 3 1 read-only P4 Pull Up Status. 4 1 read-only P5 Pull Up Status. 5 1 read-only P6 Pull Up Status. 6 1 read-only P7 Pull Up Status. 7 1 read-only P8 Pull Up Status. 8 1 read-only P9 Pull Up Status. 9 1 read-only P10 Pull Up Status. 10 1 read-only P11 Pull Up Status. 11 1 read-only P12 Pull Up Status. 12 1 read-only P13 Pull Up Status. 13 1 read-only P14 Pull Up Status. 14 1 read-only P15 Pull Up Status. 15 1 read-only P16 Pull Up Status. 16 1 read-only P17 Pull Up Status. 17 1 read-only P18 Pull Up Status. 18 1 read-only P19 Pull Up Status. 19 1 read-only P20 Pull Up Status. 20 1 read-only P21 Pull Up Status. 21 1 read-only P22 Pull Up Status. 22 1 read-only P23 Pull Up Status. 23 1 read-only P24 Pull Up Status. 24 1 read-only P25 Pull Up Status. 25 1 read-only P26 Pull Up Status. 26 1 read-only P27 Pull Up Status. 27 1 read-only P28 Pull Up Status. 28 1 read-only P29 Pull Up Status. 29 1 read-only P30 Pull Up Status. 30 1 read-only P31 Pull Up Status. 31 1 read-only 2 4 0-1 ABCDSR[%s] Peripheral Select Register 0x00000070 32 read-write P0 Peripheral Select. 0 1 read-write P1 Peripheral Select. 1 1 read-write P2 Peripheral Select. 2 1 read-write P3 Peripheral Select. 3 1 read-write P4 Peripheral Select. 4 1 read-write P5 Peripheral Select. 5 1 read-write P6 Peripheral Select. 6 1 read-write P7 Peripheral Select. 7 1 read-write P8 Peripheral Select. 8 1 read-write P9 Peripheral Select. 9 1 read-write P10 Peripheral Select. 10 1 read-write P11 Peripheral Select. 11 1 read-write P12 Peripheral Select. 12 1 read-write P13 Peripheral Select. 13 1 read-write P14 Peripheral Select. 14 1 read-write P15 Peripheral Select. 15 1 read-write P16 Peripheral Select. 16 1 read-write P17 Peripheral Select. 17 1 read-write P18 Peripheral Select. 18 1 read-write P19 Peripheral Select. 19 1 read-write P20 Peripheral Select. 20 1 read-write P21 Peripheral Select. 21 1 read-write P22 Peripheral Select. 22 1 read-write P23 Peripheral Select. 23 1 read-write P24 Peripheral Select. 24 1 read-write P25 Peripheral Select. 25 1 read-write P26 Peripheral Select. 26 1 read-write P27 Peripheral Select. 27 1 read-write P28 Peripheral Select. 28 1 read-write P29 Peripheral Select. 29 1 read-write P30 Peripheral Select. 30 1 read-write P31 Peripheral Select. 31 1 read-write IFSCDR Input Filter Slow Clock Disable Register 0x00000080 32 write-only P0 PIO Clock Glitch Filtering Select. 0 1 write-only P1 PIO Clock Glitch Filtering Select. 1 1 write-only P2 PIO Clock Glitch Filtering Select. 2 1 write-only P3 PIO Clock Glitch Filtering Select. 3 1 write-only P4 PIO Clock Glitch Filtering Select. 4 1 write-only P5 PIO Clock Glitch Filtering Select. 5 1 write-only P6 PIO Clock Glitch Filtering Select. 6 1 write-only P7 PIO Clock Glitch Filtering Select. 7 1 write-only P8 PIO Clock Glitch Filtering Select. 8 1 write-only P9 PIO Clock Glitch Filtering Select. 9 1 write-only P10 PIO Clock Glitch Filtering Select. 10 1 write-only P11 PIO Clock Glitch Filtering Select. 11 1 write-only P12 PIO Clock Glitch Filtering Select. 12 1 write-only P13 PIO Clock Glitch Filtering Select. 13 1 write-only P14 PIO Clock Glitch Filtering Select. 14 1 write-only P15 PIO Clock Glitch Filtering Select. 15 1 write-only P16 PIO Clock Glitch Filtering Select. 16 1 write-only P17 PIO Clock Glitch Filtering Select. 17 1 write-only P18 PIO Clock Glitch Filtering Select. 18 1 write-only P19 PIO Clock Glitch Filtering Select. 19 1 write-only P20 PIO Clock Glitch Filtering Select. 20 1 write-only P21 PIO Clock Glitch Filtering Select. 21 1 write-only P22 PIO Clock Glitch Filtering Select. 22 1 write-only P23 PIO Clock Glitch Filtering Select. 23 1 write-only P24 PIO Clock Glitch Filtering Select. 24 1 write-only P25 PIO Clock Glitch Filtering Select. 25 1 write-only P26 PIO Clock Glitch Filtering Select. 26 1 write-only P27 PIO Clock Glitch Filtering Select. 27 1 write-only P28 PIO Clock Glitch Filtering Select. 28 1 write-only P29 PIO Clock Glitch Filtering Select. 29 1 write-only P30 PIO Clock Glitch Filtering Select. 30 1 write-only P31 PIO Clock Glitch Filtering Select. 31 1 write-only IFSCER Input Filter Slow Clock Enable Register 0x00000084 32 write-only P0 Debouncing Filtering Select. 0 1 write-only P1 Debouncing Filtering Select. 1 1 write-only P2 Debouncing Filtering Select. 2 1 write-only P3 Debouncing Filtering Select. 3 1 write-only P4 Debouncing Filtering Select. 4 1 write-only P5 Debouncing Filtering Select. 5 1 write-only P6 Debouncing Filtering Select. 6 1 write-only P7 Debouncing Filtering Select. 7 1 write-only P8 Debouncing Filtering Select. 8 1 write-only P9 Debouncing Filtering Select. 9 1 write-only P10 Debouncing Filtering Select. 10 1 write-only P11 Debouncing Filtering Select. 11 1 write-only P12 Debouncing Filtering Select. 12 1 write-only P13 Debouncing Filtering Select. 13 1 write-only P14 Debouncing Filtering Select. 14 1 write-only P15 Debouncing Filtering Select. 15 1 write-only P16 Debouncing Filtering Select. 16 1 write-only P17 Debouncing Filtering Select. 17 1 write-only P18 Debouncing Filtering Select. 18 1 write-only P19 Debouncing Filtering Select. 19 1 write-only P20 Debouncing Filtering Select. 20 1 write-only P21 Debouncing Filtering Select. 21 1 write-only P22 Debouncing Filtering Select. 22 1 write-only P23 Debouncing Filtering Select. 23 1 write-only P24 Debouncing Filtering Select. 24 1 write-only P25 Debouncing Filtering Select. 25 1 write-only P26 Debouncing Filtering Select. 26 1 write-only P27 Debouncing Filtering Select. 27 1 write-only P28 Debouncing Filtering Select. 28 1 write-only P29 Debouncing Filtering Select. 29 1 write-only P30 Debouncing Filtering Select. 30 1 write-only P31 Debouncing Filtering Select. 31 1 write-only IFSCSR Input Filter Slow Clock Status Register 0x00000088 32 read-only 0x00000000 P0 Glitch or Debouncing Filter Selection Status 0 1 read-only P1 Glitch or Debouncing Filter Selection Status 1 1 read-only P2 Glitch or Debouncing Filter Selection Status 2 1 read-only P3 Glitch or Debouncing Filter Selection Status 3 1 read-only P4 Glitch or Debouncing Filter Selection Status 4 1 read-only P5 Glitch or Debouncing Filter Selection Status 5 1 read-only P6 Glitch or Debouncing Filter Selection Status 6 1 read-only P7 Glitch or Debouncing Filter Selection Status 7 1 read-only P8 Glitch or Debouncing Filter Selection Status 8 1 read-only P9 Glitch or Debouncing Filter Selection Status 9 1 read-only P10 Glitch or Debouncing Filter Selection Status 10 1 read-only P11 Glitch or Debouncing Filter Selection Status 11 1 read-only P12 Glitch or Debouncing Filter Selection Status 12 1 read-only P13 Glitch or Debouncing Filter Selection Status 13 1 read-only P14 Glitch or Debouncing Filter Selection Status 14 1 read-only P15 Glitch or Debouncing Filter Selection Status 15 1 read-only P16 Glitch or Debouncing Filter Selection Status 16 1 read-only P17 Glitch or Debouncing Filter Selection Status 17 1 read-only P18 Glitch or Debouncing Filter Selection Status 18 1 read-only P19 Glitch or Debouncing Filter Selection Status 19 1 read-only P20 Glitch or Debouncing Filter Selection Status 20 1 read-only P21 Glitch or Debouncing Filter Selection Status 21 1 read-only P22 Glitch or Debouncing Filter Selection Status 22 1 read-only P23 Glitch or Debouncing Filter Selection Status 23 1 read-only P24 Glitch or Debouncing Filter Selection Status 24 1 read-only P25 Glitch or Debouncing Filter Selection Status 25 1 read-only P26 Glitch or Debouncing Filter Selection Status 26 1 read-only P27 Glitch or Debouncing Filter Selection Status 27 1 read-only P28 Glitch or Debouncing Filter Selection Status 28 1 read-only P29 Glitch or Debouncing Filter Selection Status 29 1 read-only P30 Glitch or Debouncing Filter Selection Status 30 1 read-only P31 Glitch or Debouncing Filter Selection Status 31 1 read-only SCDR Slow Clock Divider Debouncing Register 0x0000008C 32 read-write 0x00000000 DIV Slow Clock Divider Selection for Debouncing 0 14 read-write PPDDR Pad Pull-down Disable Register 0x00000090 32 write-only P0 Pull Down Disable 0 1 write-only P1 Pull Down Disable 1 1 write-only P2 Pull Down Disable 2 1 write-only P3 Pull Down Disable 3 1 write-only P4 Pull Down Disable 4 1 write-only P5 Pull Down Disable 5 1 write-only P6 Pull Down Disable 6 1 write-only P7 Pull Down Disable 7 1 write-only P8 Pull Down Disable 8 1 write-only P9 Pull Down Disable 9 1 write-only P10 Pull Down Disable 10 1 write-only P11 Pull Down Disable 11 1 write-only P12 Pull Down Disable 12 1 write-only P13 Pull Down Disable 13 1 write-only P14 Pull Down Disable 14 1 write-only P15 Pull Down Disable 15 1 write-only P16 Pull Down Disable 16 1 write-only P17 Pull Down Disable 17 1 write-only P18 Pull Down Disable 18 1 write-only P19 Pull Down Disable 19 1 write-only P20 Pull Down Disable 20 1 write-only P21 Pull Down Disable 21 1 write-only P22 Pull Down Disable 22 1 write-only P23 Pull Down Disable 23 1 write-only P24 Pull Down Disable 24 1 write-only P25 Pull Down Disable 25 1 write-only P26 Pull Down Disable 26 1 write-only P27 Pull Down Disable 27 1 write-only P28 Pull Down Disable 28 1 write-only P29 Pull Down Disable 29 1 write-only P30 Pull Down Disable 30 1 write-only P31 Pull Down Disable 31 1 write-only PPDER Pad Pull-down Enable Register 0x00000094 32 write-only P0 Pull Down Enable 0 1 write-only P1 Pull Down Enable 1 1 write-only P2 Pull Down Enable 2 1 write-only P3 Pull Down Enable 3 1 write-only P4 Pull Down Enable 4 1 write-only P5 Pull Down Enable 5 1 write-only P6 Pull Down Enable 6 1 write-only P7 Pull Down Enable 7 1 write-only P8 Pull Down Enable 8 1 write-only P9 Pull Down Enable 9 1 write-only P10 Pull Down Enable 10 1 write-only P11 Pull Down Enable 11 1 write-only P12 Pull Down Enable 12 1 write-only P13 Pull Down Enable 13 1 write-only P14 Pull Down Enable 14 1 write-only P15 Pull Down Enable 15 1 write-only P16 Pull Down Enable 16 1 write-only P17 Pull Down Enable 17 1 write-only P18 Pull Down Enable 18 1 write-only P19 Pull Down Enable 19 1 write-only P20 Pull Down Enable 20 1 write-only P21 Pull Down Enable 21 1 write-only P22 Pull Down Enable 22 1 write-only P23 Pull Down Enable 23 1 write-only P24 Pull Down Enable 24 1 write-only P25 Pull Down Enable 25 1 write-only P26 Pull Down Enable 26 1 write-only P27 Pull Down Enable 27 1 write-only P28 Pull Down Enable 28 1 write-only P29 Pull Down Enable 29 1 write-only P30 Pull Down Enable 30 1 write-only P31 Pull Down Enable 31 1 write-only PPDSR Pad Pull-down Status Register 0x00000098 32 read-only P0 Pull Down Status 0 1 read-only P1 Pull Down Status 1 1 read-only P2 Pull Down Status 2 1 read-only P3 Pull Down Status 3 1 read-only P4 Pull Down Status 4 1 read-only P5 Pull Down Status 5 1 read-only P6 Pull Down Status 6 1 read-only P7 Pull Down Status 7 1 read-only P8 Pull Down Status 8 1 read-only P9 Pull Down Status 9 1 read-only P10 Pull Down Status 10 1 read-only P11 Pull Down Status 11 1 read-only P12 Pull Down Status 12 1 read-only P13 Pull Down Status 13 1 read-only P14 Pull Down Status 14 1 read-only P15 Pull Down Status 15 1 read-only P16 Pull Down Status 16 1 read-only P17 Pull Down Status 17 1 read-only P18 Pull Down Status 18 1 read-only P19 Pull Down Status 19 1 read-only P20 Pull Down Status 20 1 read-only P21 Pull Down Status 21 1 read-only P22 Pull Down Status 22 1 read-only P23 Pull Down Status 23 1 read-only P24 Pull Down Status 24 1 read-only P25 Pull Down Status 25 1 read-only P26 Pull Down Status 26 1 read-only P27 Pull Down Status 27 1 read-only P28 Pull Down Status 28 1 read-only P29 Pull Down Status 29 1 read-only P30 Pull Down Status 30 1 read-only P31 Pull Down Status 31 1 read-only OWER Output Write Enable 0x000000A0 32 write-only P0 Output Write Enable 0 1 write-only P1 Output Write Enable 1 1 write-only P2 Output Write Enable 2 1 write-only P3 Output Write Enable 3 1 write-only P4 Output Write Enable 4 1 write-only P5 Output Write Enable 5 1 write-only P6 Output Write Enable 6 1 write-only P7 Output Write Enable 7 1 write-only P8 Output Write Enable 8 1 write-only P9 Output Write Enable 9 1 write-only P10 Output Write Enable 10 1 write-only P11 Output Write Enable 11 1 write-only P12 Output Write Enable 12 1 write-only P13 Output Write Enable 13 1 write-only P14 Output Write Enable 14 1 write-only P15 Output Write Enable 15 1 write-only P16 Output Write Enable 16 1 write-only P17 Output Write Enable 17 1 write-only P18 Output Write Enable 18 1 write-only P19 Output Write Enable 19 1 write-only P20 Output Write Enable 20 1 write-only P21 Output Write Enable 21 1 write-only P22 Output Write Enable 22 1 write-only P23 Output Write Enable 23 1 write-only P24 Output Write Enable 24 1 write-only P25 Output Write Enable 25 1 write-only P26 Output Write Enable 26 1 write-only P27 Output Write Enable 27 1 write-only P28 Output Write Enable 28 1 write-only P29 Output Write Enable 29 1 write-only P30 Output Write Enable 30 1 write-only P31 Output Write Enable 31 1 write-only OWDR Output Write Disable 0x000000A4 32 write-only P0 Output Write Disable 0 1 write-only P1 Output Write Disable 1 1 write-only P2 Output Write Disable 2 1 write-only P3 Output Write Disable 3 1 write-only P4 Output Write Disable 4 1 write-only P5 Output Write Disable 5 1 write-only P6 Output Write Disable 6 1 write-only P7 Output Write Disable 7 1 write-only P8 Output Write Disable 8 1 write-only P9 Output Write Disable 9 1 write-only P10 Output Write Disable 10 1 write-only P11 Output Write Disable 11 1 write-only P12 Output Write Disable 12 1 write-only P13 Output Write Disable 13 1 write-only P14 Output Write Disable 14 1 write-only P15 Output Write Disable 15 1 write-only P16 Output Write Disable 16 1 write-only P17 Output Write Disable 17 1 write-only P18 Output Write Disable 18 1 write-only P19 Output Write Disable 19 1 write-only P20 Output Write Disable 20 1 write-only P21 Output Write Disable 21 1 write-only P22 Output Write Disable 22 1 write-only P23 Output Write Disable 23 1 write-only P24 Output Write Disable 24 1 write-only P25 Output Write Disable 25 1 write-only P26 Output Write Disable 26 1 write-only P27 Output Write Disable 27 1 write-only P28 Output Write Disable 28 1 write-only P29 Output Write Disable 29 1 write-only P30 Output Write Disable 30 1 write-only P31 Output Write Disable 31 1 write-only OWSR Output Write Status Register 0x000000A8 32 read-only 0x00000000 P0 Output Write Status 0 1 read-only P1 Output Write Status 1 1 read-only P2 Output Write Status 2 1 read-only P3 Output Write Status 3 1 read-only P4 Output Write Status 4 1 read-only P5 Output Write Status 5 1 read-only P6 Output Write Status 6 1 read-only P7 Output Write Status 7 1 read-only P8 Output Write Status 8 1 read-only P9 Output Write Status 9 1 read-only P10 Output Write Status 10 1 read-only P11 Output Write Status 11 1 read-only P12 Output Write Status 12 1 read-only P13 Output Write Status 13 1 read-only P14 Output Write Status 14 1 read-only P15 Output Write Status 15 1 read-only P16 Output Write Status 16 1 read-only P17 Output Write Status 17 1 read-only P18 Output Write Status 18 1 read-only P19 Output Write Status 19 1 read-only P20 Output Write Status 20 1 read-only P21 Output Write Status 21 1 read-only P22 Output Write Status 22 1 read-only P23 Output Write Status 23 1 read-only P24 Output Write Status 24 1 read-only P25 Output Write Status 25 1 read-only P26 Output Write Status 26 1 read-only P27 Output Write Status 27 1 read-only P28 Output Write Status 28 1 read-only P29 Output Write Status 29 1 read-only P30 Output Write Status 30 1 read-only P31 Output Write Status 31 1 read-only AIMER Additional Interrupt Modes Enable Register 0x000000B0 32 write-only P0 Additional Interrupt Modes Enable 0 1 write-only P1 Additional Interrupt Modes Enable 1 1 write-only P2 Additional Interrupt Modes Enable 2 1 write-only P3 Additional Interrupt Modes Enable 3 1 write-only P4 Additional Interrupt Modes Enable 4 1 write-only P5 Additional Interrupt Modes Enable 5 1 write-only P6 Additional Interrupt Modes Enable 6 1 write-only P7 Additional Interrupt Modes Enable 7 1 write-only P8 Additional Interrupt Modes Enable 8 1 write-only P9 Additional Interrupt Modes Enable 9 1 write-only P10 Additional Interrupt Modes Enable 10 1 write-only P11 Additional Interrupt Modes Enable 11 1 write-only P12 Additional Interrupt Modes Enable 12 1 write-only P13 Additional Interrupt Modes Enable 13 1 write-only P14 Additional Interrupt Modes Enable 14 1 write-only P15 Additional Interrupt Modes Enable 15 1 write-only P16 Additional Interrupt Modes Enable 16 1 write-only P17 Additional Interrupt Modes Enable 17 1 write-only P18 Additional Interrupt Modes Enable 18 1 write-only P19 Additional Interrupt Modes Enable 19 1 write-only P20 Additional Interrupt Modes Enable 20 1 write-only P21 Additional Interrupt Modes Enable 21 1 write-only P22 Additional Interrupt Modes Enable 22 1 write-only P23 Additional Interrupt Modes Enable 23 1 write-only P24 Additional Interrupt Modes Enable 24 1 write-only P25 Additional Interrupt Modes Enable 25 1 write-only P26 Additional Interrupt Modes Enable 26 1 write-only P27 Additional Interrupt Modes Enable 27 1 write-only P28 Additional Interrupt Modes Enable 28 1 write-only P29 Additional Interrupt Modes Enable 29 1 write-only P30 Additional Interrupt Modes Enable 30 1 write-only P31 Additional Interrupt Modes Enable 31 1 write-only AIMDR Additional Interrupt Modes Disables Register 0x000000B4 32 write-only P0 Additional Interrupt Modes Disable 0 1 write-only P1 Additional Interrupt Modes Disable 1 1 write-only P2 Additional Interrupt Modes Disable 2 1 write-only P3 Additional Interrupt Modes Disable 3 1 write-only P4 Additional Interrupt Modes Disable 4 1 write-only P5 Additional Interrupt Modes Disable 5 1 write-only P6 Additional Interrupt Modes Disable 6 1 write-only P7 Additional Interrupt Modes Disable 7 1 write-only P8 Additional Interrupt Modes Disable 8 1 write-only P9 Additional Interrupt Modes Disable 9 1 write-only P10 Additional Interrupt Modes Disable 10 1 write-only P11 Additional Interrupt Modes Disable 11 1 write-only P12 Additional Interrupt Modes Disable 12 1 write-only P13 Additional Interrupt Modes Disable 13 1 write-only P14 Additional Interrupt Modes Disable 14 1 write-only P15 Additional Interrupt Modes Disable 15 1 write-only P16 Additional Interrupt Modes Disable 16 1 write-only P17 Additional Interrupt Modes Disable 17 1 write-only P18 Additional Interrupt Modes Disable 18 1 write-only P19 Additional Interrupt Modes Disable 19 1 write-only P20 Additional Interrupt Modes Disable 20 1 write-only P21 Additional Interrupt Modes Disable 21 1 write-only P22 Additional Interrupt Modes Disable 22 1 write-only P23 Additional Interrupt Modes Disable 23 1 write-only P24 Additional Interrupt Modes Disable 24 1 write-only P25 Additional Interrupt Modes Disable 25 1 write-only P26 Additional Interrupt Modes Disable 26 1 write-only P27 Additional Interrupt Modes Disable 27 1 write-only P28 Additional Interrupt Modes Disable 28 1 write-only P29 Additional Interrupt Modes Disable 29 1 write-only P30 Additional Interrupt Modes Disable 30 1 write-only P31 Additional Interrupt Modes Disable 31 1 write-only AIMMR Additional Interrupt Modes Mask Register 0x000000B8 32 read-only 0x00000000 P0 Peripheral CD Status 0 1 read-only P1 Peripheral CD Status 1 1 read-only P2 Peripheral CD Status 2 1 read-only P3 Peripheral CD Status 3 1 read-only P4 Peripheral CD Status 4 1 read-only P5 Peripheral CD Status 5 1 read-only P6 Peripheral CD Status 6 1 read-only P7 Peripheral CD Status 7 1 read-only P8 Peripheral CD Status 8 1 read-only P9 Peripheral CD Status 9 1 read-only P10 Peripheral CD Status 10 1 read-only P11 Peripheral CD Status 11 1 read-only P12 Peripheral CD Status 12 1 read-only P13 Peripheral CD Status 13 1 read-only P14 Peripheral CD Status 14 1 read-only P15 Peripheral CD Status 15 1 read-only P16 Peripheral CD Status 16 1 read-only P17 Peripheral CD Status 17 1 read-only P18 Peripheral CD Status 18 1 read-only P19 Peripheral CD Status 19 1 read-only P20 Peripheral CD Status 20 1 read-only P21 Peripheral CD Status 21 1 read-only P22 Peripheral CD Status 22 1 read-only P23 Peripheral CD Status 23 1 read-only P24 Peripheral CD Status 24 1 read-only P25 Peripheral CD Status 25 1 read-only P26 Peripheral CD Status 26 1 read-only P27 Peripheral CD Status 27 1 read-only P28 Peripheral CD Status 28 1 read-only P29 Peripheral CD Status 29 1 read-only P30 Peripheral CD Status 30 1 read-only P31 Peripheral CD Status 31 1 read-only ESR Edge Select Register 0x000000C0 32 write-only P0 Edge Interrupt Selection 0 1 write-only P1 Edge Interrupt Selection 1 1 write-only P2 Edge Interrupt Selection 2 1 write-only P3 Edge Interrupt Selection 3 1 write-only P4 Edge Interrupt Selection 4 1 write-only P5 Edge Interrupt Selection 5 1 write-only P6 Edge Interrupt Selection 6 1 write-only P7 Edge Interrupt Selection 7 1 write-only P8 Edge Interrupt Selection 8 1 write-only P9 Edge Interrupt Selection 9 1 write-only P10 Edge Interrupt Selection 10 1 write-only P11 Edge Interrupt Selection 11 1 write-only P12 Edge Interrupt Selection 12 1 write-only P13 Edge Interrupt Selection 13 1 write-only P14 Edge Interrupt Selection 14 1 write-only P15 Edge Interrupt Selection 15 1 write-only P16 Edge Interrupt Selection 16 1 write-only P17 Edge Interrupt Selection 17 1 write-only P18 Edge Interrupt Selection 18 1 write-only P19 Edge Interrupt Selection 19 1 write-only P20 Edge Interrupt Selection 20 1 write-only P21 Edge Interrupt Selection 21 1 write-only P22 Edge Interrupt Selection 22 1 write-only P23 Edge Interrupt Selection 23 1 write-only P24 Edge Interrupt Selection 24 1 write-only P25 Edge Interrupt Selection 25 1 write-only P26 Edge Interrupt Selection 26 1 write-only P27 Edge Interrupt Selection 27 1 write-only P28 Edge Interrupt Selection 28 1 write-only P29 Edge Interrupt Selection 29 1 write-only P30 Edge Interrupt Selection 30 1 write-only P31 Edge Interrupt Selection 31 1 write-only LSR Level Select Register 0x000000C4 32 write-only P0 Level Interrupt Selection 0 1 write-only P1 Level Interrupt Selection 1 1 write-only P2 Level Interrupt Selection 2 1 write-only P3 Level Interrupt Selection 3 1 write-only P4 Level Interrupt Selection 4 1 write-only P5 Level Interrupt Selection 5 1 write-only P6 Level Interrupt Selection 6 1 write-only P7 Level Interrupt Selection 7 1 write-only P8 Level Interrupt Selection 8 1 write-only P9 Level Interrupt Selection 9 1 write-only P10 Level Interrupt Selection 10 1 write-only P11 Level Interrupt Selection 11 1 write-only P12 Level Interrupt Selection 12 1 write-only P13 Level Interrupt Selection 13 1 write-only P14 Level Interrupt Selection 14 1 write-only P15 Level Interrupt Selection 15 1 write-only P16 Level Interrupt Selection 16 1 write-only P17 Level Interrupt Selection 17 1 write-only P18 Level Interrupt Selection 18 1 write-only P19 Level Interrupt Selection 19 1 write-only P20 Level Interrupt Selection 20 1 write-only P21 Level Interrupt Selection 21 1 write-only P22 Level Interrupt Selection 22 1 write-only P23 Level Interrupt Selection 23 1 write-only P24 Level Interrupt Selection 24 1 write-only P25 Level Interrupt Selection 25 1 write-only P26 Level Interrupt Selection 26 1 write-only P27 Level Interrupt Selection 27 1 write-only P28 Level Interrupt Selection 28 1 write-only P29 Level Interrupt Selection 29 1 write-only P30 Level Interrupt Selection 30 1 write-only P31 Level Interrupt Selection 31 1 write-only ELSR Edge/Level Status Register 0x000000C8 32 read-only 0x00000000 P0 Edge/Level Interrupt Source Selection 0 1 read-only P1 Edge/Level Interrupt Source Selection 1 1 read-only P2 Edge/Level Interrupt Source Selection 2 1 read-only P3 Edge/Level Interrupt Source Selection 3 1 read-only P4 Edge/Level Interrupt Source Selection 4 1 read-only P5 Edge/Level Interrupt Source Selection 5 1 read-only P6 Edge/Level Interrupt Source Selection 6 1 read-only P7 Edge/Level Interrupt Source Selection 7 1 read-only P8 Edge/Level Interrupt Source Selection 8 1 read-only P9 Edge/Level Interrupt Source Selection 9 1 read-only P10 Edge/Level Interrupt Source Selection 10 1 read-only P11 Edge/Level Interrupt Source Selection 11 1 read-only P12 Edge/Level Interrupt Source Selection 12 1 read-only P13 Edge/Level Interrupt Source Selection 13 1 read-only P14 Edge/Level Interrupt Source Selection 14 1 read-only P15 Edge/Level Interrupt Source Selection 15 1 read-only P16 Edge/Level Interrupt Source Selection 16 1 read-only P17 Edge/Level Interrupt Source Selection 17 1 read-only P18 Edge/Level Interrupt Source Selection 18 1 read-only P19 Edge/Level Interrupt Source Selection 19 1 read-only P20 Edge/Level Interrupt Source Selection 20 1 read-only P21 Edge/Level Interrupt Source Selection 21 1 read-only P22 Edge/Level Interrupt Source Selection 22 1 read-only P23 Edge/Level Interrupt Source Selection 23 1 read-only P24 Edge/Level Interrupt Source Selection 24 1 read-only P25 Edge/Level Interrupt Source Selection 25 1 read-only P26 Edge/Level Interrupt Source Selection 26 1 read-only P27 Edge/Level Interrupt Source Selection 27 1 read-only P28 Edge/Level Interrupt Source Selection 28 1 read-only P29 Edge/Level Interrupt Source Selection 29 1 read-only P30 Edge/Level Interrupt Source Selection 30 1 read-only P31 Edge/Level Interrupt Source Selection 31 1 read-only FELLSR Falling Edge/Low Level Select Register 0x000000D0 32 write-only P0 Falling Edge/Low Level Interrupt Selection 0 1 write-only P1 Falling Edge/Low Level Interrupt Selection 1 1 write-only P2 Falling Edge/Low Level Interrupt Selection 2 1 write-only P3 Falling Edge/Low Level Interrupt Selection 3 1 write-only P4 Falling Edge/Low Level Interrupt Selection 4 1 write-only P5 Falling Edge/Low Level Interrupt Selection 5 1 write-only P6 Falling Edge/Low Level Interrupt Selection 6 1 write-only P7 Falling Edge/Low Level Interrupt Selection 7 1 write-only P8 Falling Edge/Low Level Interrupt Selection 8 1 write-only P9 Falling Edge/Low Level Interrupt Selection 9 1 write-only P10 Falling Edge/Low Level Interrupt Selection 10 1 write-only P11 Falling Edge/Low Level Interrupt Selection 11 1 write-only P12 Falling Edge/Low Level Interrupt Selection 12 1 write-only P13 Falling Edge/Low Level Interrupt Selection 13 1 write-only P14 Falling Edge/Low Level Interrupt Selection 14 1 write-only P15 Falling Edge/Low Level Interrupt Selection 15 1 write-only P16 Falling Edge/Low Level Interrupt Selection 16 1 write-only P17 Falling Edge/Low Level Interrupt Selection 17 1 write-only P18 Falling Edge/Low Level Interrupt Selection 18 1 write-only P19 Falling Edge/Low Level Interrupt Selection 19 1 write-only P20 Falling Edge/Low Level Interrupt Selection 20 1 write-only P21 Falling Edge/Low Level Interrupt Selection 21 1 write-only P22 Falling Edge/Low Level Interrupt Selection 22 1 write-only P23 Falling Edge/Low Level Interrupt Selection 23 1 write-only P24 Falling Edge/Low Level Interrupt Selection 24 1 write-only P25 Falling Edge/Low Level Interrupt Selection 25 1 write-only P26 Falling Edge/Low Level Interrupt Selection 26 1 write-only P27 Falling Edge/Low Level Interrupt Selection 27 1 write-only P28 Falling Edge/Low Level Interrupt Selection 28 1 write-only P29 Falling Edge/Low Level Interrupt Selection 29 1 write-only P30 Falling Edge/Low Level Interrupt Selection 30 1 write-only P31 Falling Edge/Low Level Interrupt Selection 31 1 write-only REHLSR Rising Edge/ High Level Select Register 0x000000D4 32 write-only P0 Rising Edge /High Level Interrupt Selection 0 1 write-only P1 Rising Edge /High Level Interrupt Selection 1 1 write-only P2 Rising Edge /High Level Interrupt Selection 2 1 write-only P3 Rising Edge /High Level Interrupt Selection 3 1 write-only P4 Rising Edge /High Level Interrupt Selection 4 1 write-only P5 Rising Edge /High Level Interrupt Selection 5 1 write-only P6 Rising Edge /High Level Interrupt Selection 6 1 write-only P7 Rising Edge /High Level Interrupt Selection 7 1 write-only P8 Rising Edge /High Level Interrupt Selection 8 1 write-only P9 Rising Edge /High Level Interrupt Selection 9 1 write-only P10 Rising Edge /High Level Interrupt Selection 10 1 write-only P11 Rising Edge /High Level Interrupt Selection 11 1 write-only P12 Rising Edge /High Level Interrupt Selection 12 1 write-only P13 Rising Edge /High Level Interrupt Selection 13 1 write-only P14 Rising Edge /High Level Interrupt Selection 14 1 write-only P15 Rising Edge /High Level Interrupt Selection 15 1 write-only P16 Rising Edge /High Level Interrupt Selection 16 1 write-only P17 Rising Edge /High Level Interrupt Selection 17 1 write-only P18 Rising Edge /High Level Interrupt Selection 18 1 write-only P19 Rising Edge /High Level Interrupt Selection 19 1 write-only P20 Rising Edge /High Level Interrupt Selection 20 1 write-only P21 Rising Edge /High Level Interrupt Selection 21 1 write-only P22 Rising Edge /High Level Interrupt Selection 22 1 write-only P23 Rising Edge /High Level Interrupt Selection 23 1 write-only P24 Rising Edge /High Level Interrupt Selection 24 1 write-only P25 Rising Edge /High Level Interrupt Selection 25 1 write-only P26 Rising Edge /High Level Interrupt Selection 26 1 write-only P27 Rising Edge /High Level Interrupt Selection 27 1 write-only P28 Rising Edge /High Level Interrupt Selection 28 1 write-only P29 Rising Edge /High Level Interrupt Selection 29 1 write-only P30 Rising Edge /High Level Interrupt Selection 30 1 write-only P31 Rising Edge /High Level Interrupt Selection 31 1 write-only FRLHSR Fall/Rise - Low/High Status Register 0x000000D8 32 read-only 0x00000000 P0 Edge /Level Interrupt Source Selection 0 1 read-only P1 Edge /Level Interrupt Source Selection 1 1 read-only P2 Edge /Level Interrupt Source Selection 2 1 read-only P3 Edge /Level Interrupt Source Selection 3 1 read-only P4 Edge /Level Interrupt Source Selection 4 1 read-only P5 Edge /Level Interrupt Source Selection 5 1 read-only P6 Edge /Level Interrupt Source Selection 6 1 read-only P7 Edge /Level Interrupt Source Selection 7 1 read-only P8 Edge /Level Interrupt Source Selection 8 1 read-only P9 Edge /Level Interrupt Source Selection 9 1 read-only P10 Edge /Level Interrupt Source Selection 10 1 read-only P11 Edge /Level Interrupt Source Selection 11 1 read-only P12 Edge /Level Interrupt Source Selection 12 1 read-only P13 Edge /Level Interrupt Source Selection 13 1 read-only P14 Edge /Level Interrupt Source Selection 14 1 read-only P15 Edge /Level Interrupt Source Selection 15 1 read-only P16 Edge /Level Interrupt Source Selection 16 1 read-only P17 Edge /Level Interrupt Source Selection 17 1 read-only P18 Edge /Level Interrupt Source Selection 18 1 read-only P19 Edge /Level Interrupt Source Selection 19 1 read-only P20 Edge /Level Interrupt Source Selection 20 1 read-only P21 Edge /Level Interrupt Source Selection 21 1 read-only P22 Edge /Level Interrupt Source Selection 22 1 read-only P23 Edge /Level Interrupt Source Selection 23 1 read-only P24 Edge /Level Interrupt Source Selection 24 1 read-only P25 Edge /Level Interrupt Source Selection 25 1 read-only P26 Edge /Level Interrupt Source Selection 26 1 read-only P27 Edge /Level Interrupt Source Selection 27 1 read-only P28 Edge /Level Interrupt Source Selection 28 1 read-only P29 Edge /Level Interrupt Source Selection 29 1 read-only P30 Edge /Level Interrupt Source Selection 30 1 read-only P31 Edge /Level Interrupt Source Selection 31 1 read-only WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY. 8 24 read-write PASSWD Writing any other value in this field aborts the write operation of the WPEN bit. Always reads as 0. 0x50494F WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only SCHMITT Schmitt Trigger Register 0x00000100 32 read-write 0x00000000 SCHMITT0 Schmitt Trigger Control 0 1 read-write SCHMITT1 Schmitt Trigger Control 1 1 read-write SCHMITT2 Schmitt Trigger Control 2 1 read-write SCHMITT3 Schmitt Trigger Control 3 1 read-write SCHMITT4 Schmitt Trigger Control 4 1 read-write SCHMITT5 Schmitt Trigger Control 5 1 read-write SCHMITT6 Schmitt Trigger Control 6 1 read-write SCHMITT7 Schmitt Trigger Control 7 1 read-write SCHMITT8 Schmitt Trigger Control 8 1 read-write SCHMITT9 Schmitt Trigger Control 9 1 read-write SCHMITT10 Schmitt Trigger Control 10 1 read-write SCHMITT11 Schmitt Trigger Control 11 1 read-write SCHMITT12 Schmitt Trigger Control 12 1 read-write SCHMITT13 Schmitt Trigger Control 13 1 read-write SCHMITT14 Schmitt Trigger Control 14 1 read-write SCHMITT15 Schmitt Trigger Control 15 1 read-write SCHMITT16 Schmitt Trigger Control 16 1 read-write SCHMITT17 Schmitt Trigger Control 17 1 read-write SCHMITT18 Schmitt Trigger Control 18 1 read-write SCHMITT19 Schmitt Trigger Control 19 1 read-write SCHMITT20 Schmitt Trigger Control 20 1 read-write SCHMITT21 Schmitt Trigger Control 21 1 read-write SCHMITT22 Schmitt Trigger Control 22 1 read-write SCHMITT23 Schmitt Trigger Control 23 1 read-write SCHMITT24 Schmitt Trigger Control 24 1 read-write SCHMITT25 Schmitt Trigger Control 25 1 read-write SCHMITT26 Schmitt Trigger Control 26 1 read-write SCHMITT27 Schmitt Trigger Control 27 1 read-write SCHMITT28 Schmitt Trigger Control 28 1 read-write SCHMITT29 Schmitt Trigger Control 29 1 read-write SCHMITT30 Schmitt Trigger Control 30 1 read-write SCHMITT31 Schmitt Trigger Control 31 1 read-write RPR Receive Pointer Register 0x00000104 32 read-write 0x00000000 RXPTR Receive Pointer Register 0 32 read-write RCR Receive Counter Register 0x00000108 32 read-write 0x00000000 RXCTR Receive Counter Register 0 16 read-write RNPR Receive Next Pointer Register 0x00000114 32 read-write 0x00000000 RXNPTR Receive Next Pointer 0 32 read-write RNCR Receive Next Counter Register 0x00000118 32 read-write 0x00000000 RXNCTR Receive Next Counter 0 16 read-write PTCR Transfer Control Register 0x00000124 32 write-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 write-only RXTDIS Receiver Transfer Disable 1 1 write-only TXTEN Transmitter Transfer Enable 8 1 write-only TXTDIS Transmitter Transfer Disable 9 1 write-only PTSR Transfer Status Register 0x00000128 32 read-only 0x00000000 RXTEN Receiver Transfer Enable 0 1 read-only TXTEN Transmitter Transfer Enable 8 1 read-only PIOB 11004J Parallel Input/Output Controller B PIO PIOB_ 0x400E1000 0 0x200 registers PIOB 12 PER PIO Enable Register 0x00000000 32 write-only P0 PIO Enable 0 1 write-only P1 PIO Enable 1 1 write-only P2 PIO Enable 2 1 write-only P3 PIO Enable 3 1 write-only P4 PIO Enable 4 1 write-only P5 PIO Enable 5 1 write-only P6 PIO Enable 6 1 write-only P7 PIO Enable 7 1 write-only P8 PIO Enable 8 1 write-only P9 PIO Enable 9 1 write-only P10 PIO Enable 10 1 write-only P11 PIO Enable 11 1 write-only P12 PIO Enable 12 1 write-only P13 PIO Enable 13 1 write-only P14 PIO Enable 14 1 write-only P15 PIO Enable 15 1 write-only P16 PIO Enable 16 1 write-only P17 PIO Enable 17 1 write-only P18 PIO Enable 18 1 write-only P19 PIO Enable 19 1 write-only P20 PIO Enable 20 1 write-only P21 PIO Enable 21 1 write-only P22 PIO Enable 22 1 write-only P23 PIO Enable 23 1 write-only P24 PIO Enable 24 1 write-only P25 PIO Enable 25 1 write-only P26 PIO Enable 26 1 write-only P27 PIO Enable 27 1 write-only P28 PIO Enable 28 1 write-only P29 PIO Enable 29 1 write-only P30 PIO Enable 30 1 write-only P31 PIO Enable 31 1 write-only PDR PIO Disable Register 0x00000004 32 write-only P0 PIO Disable 0 1 write-only P1 PIO Disable 1 1 write-only P2 PIO Disable 2 1 write-only P3 PIO Disable 3 1 write-only P4 PIO Disable 4 1 write-only P5 PIO Disable 5 1 write-only P6 PIO Disable 6 1 write-only P7 PIO Disable 7 1 write-only P8 PIO Disable 8 1 write-only P9 PIO Disable 9 1 write-only P10 PIO Disable 10 1 write-only P11 PIO Disable 11 1 write-only P12 PIO Disable 12 1 write-only P13 PIO Disable 13 1 write-only P14 PIO Disable 14 1 write-only P15 PIO Disable 15 1 write-only P16 PIO Disable 16 1 write-only P17 PIO Disable 17 1 write-only P18 PIO Disable 18 1 write-only P19 PIO Disable 19 1 write-only P20 PIO Disable 20 1 write-only P21 PIO Disable 21 1 write-only P22 PIO Disable 22 1 write-only P23 PIO Disable 23 1 write-only P24 PIO Disable 24 1 write-only P25 PIO Disable 25 1 write-only P26 PIO Disable 26 1 write-only P27 PIO Disable 27 1 write-only P28 PIO Disable 28 1 write-only P29 PIO Disable 29 1 write-only P30 PIO Disable 30 1 write-only P31 PIO Disable 31 1 write-only PSR PIO Status Register 0x00000008 32 read-only P0 PIO Status 0 1 read-only P1 PIO Status 1 1 read-only P2 PIO Status 2 1 read-only P3 PIO Status 3 1 read-only P4 PIO Status 4 1 read-only P5 PIO Status 5 1 read-only P6 PIO Status 6 1 read-only P7 PIO Status 7 1 read-only P8 PIO Status 8 1 read-only P9 PIO Status 9 1 read-only P10 PIO Status 10 1 read-only P11 PIO Status 11 1 read-only P12 PIO Status 12 1 read-only P13 PIO Status 13 1 read-only P14 PIO Status 14 1 read-only P15 PIO Status 15 1 read-only P16 PIO Status 16 1 read-only P17 PIO Status 17 1 read-only P18 PIO Status 18 1 read-only P19 PIO Status 19 1 read-only P20 PIO Status 20 1 read-only P21 PIO Status 21 1 read-only P22 PIO Status 22 1 read-only P23 PIO Status 23 1 read-only P24 PIO Status 24 1 read-only P25 PIO Status 25 1 read-only P26 PIO Status 26 1 read-only P27 PIO Status 27 1 read-only P28 PIO Status 28 1 read-only P29 PIO Status 29 1 read-only P30 PIO Status 30 1 read-only P31 PIO Status 31 1 read-only OER Output Enable Register 0x00000010 32 write-only P0 Output Enable 0 1 write-only P1 Output Enable 1 1 write-only P2 Output Enable 2 1 write-only P3 Output Enable 3 1 write-only P4 Output Enable 4 1 write-only P5 Output Enable 5 1 write-only P6 Output Enable 6 1 write-only P7 Output Enable 7 1 write-only P8 Output Enable 8 1 write-only P9 Output Enable 9 1 write-only P10 Output Enable 10 1 write-only P11 Output Enable 11 1 write-only P12 Output Enable 12 1 write-only P13 Output Enable 13 1 write-only P14 Output Enable 14 1 write-only P15 Output Enable 15 1 write-only P16 Output Enable 16 1 write-only P17 Output Enable 17 1 write-only P18 Output Enable 18 1 write-only P19 Output Enable 19 1 write-only P20 Output Enable 20 1 write-only P21 Output Enable 21 1 write-only P22 Output Enable 22 1 write-only P23 Output Enable 23 1 write-only P24 Output Enable 24 1 write-only P25 Output Enable 25 1 write-only P26 Output Enable 26 1 write-only P27 Output Enable 27 1 write-only P28 Output Enable 28 1 write-only P29 Output Enable 29 1 write-only P30 Output Enable 30 1 write-only P31 Output Enable 31 1 write-only ODR Output Disable Register 0x00000014 32 write-only P0 Output Disable 0 1 write-only P1 Output Disable 1 1 write-only P2 Output Disable 2 1 write-only P3 Output Disable 3 1 write-only P4 Output Disable 4 1 write-only P5 Output Disable 5 1 write-only P6 Output Disable 6 1 write-only P7 Output Disable 7 1 write-only P8 Output Disable 8 1 write-only P9 Output Disable 9 1 write-only P10 Output Disable 10 1 write-only P11 Output Disable 11 1 write-only P12 Output Disable 12 1 write-only P13 Output Disable 13 1 write-only P14 Output Disable 14 1 write-only P15 Output Disable 15 1 write-only P16 Output Disable 16 1 write-only P17 Output Disable 17 1 write-only P18 Output Disable 18 1 write-only P19 Output Disable 19 1 write-only P20 Output Disable 20 1 write-only P21 Output Disable 21 1 write-only P22 Output Disable 22 1 write-only P23 Output Disable 23 1 write-only P24 Output Disable 24 1 write-only P25 Output Disable 25 1 write-only P26 Output Disable 26 1 write-only P27 Output Disable 27 1 write-only P28 Output Disable 28 1 write-only P29 Output Disable 29 1 write-only P30 Output Disable 30 1 write-only P31 Output Disable 31 1 write-only OSR Output Status Register 0x00000018 32 read-only 0x00000000 P0 Output Status 0 1 read-only P1 Output Status 1 1 read-only P2 Output Status 2 1 read-only P3 Output Status 3 1 read-only P4 Output Status 4 1 read-only P5 Output Status 5 1 read-only P6 Output Status 6 1 read-only P7 Output Status 7 1 read-only P8 Output Status 8 1 read-only P9 Output Status 9 1 read-only P10 Output Status 10 1 read-only P11 Output Status 11 1 read-only P12 Output Status 12 1 read-only P13 Output Status 13 1 read-only P14 Output Status 14 1 read-only P15 Output Status 15 1 read-only P16 Output Status 16 1 read-only P17 Output Status 17 1 read-only P18 Output Status 18 1 read-only P19 Output Status 19 1 read-only P20 Output Status 20 1 read-only P21 Output Status 21 1 read-only P22 Output Status 22 1 read-only P23 Output Status 23 1 read-only P24 Output Status 24 1 read-only P25 Output Status 25 1 read-only P26 Output Status 26 1 read-only P27 Output Status 27 1 read-only P28 Output Status 28 1 read-only P29 Output Status 29 1 read-only P30 Output Status 30 1 read-only P31 Output Status 31 1 read-only IFER Glitch Input Filter Enable Register 0x00000020 32 write-only P0 Input Filter Enable 0 1 write-only P1 Input Filter Enable 1 1 write-only P2 Input Filter Enable 2 1 write-only P3 Input Filter Enable 3 1 write-only P4 Input Filter Enable 4 1 write-only P5 Input Filter Enable 5 1 write-only P6 Input Filter Enable 6 1 write-only P7 Input Filter Enable 7 1 write-only P8 Input Filter Enable 8 1 write-only P9 Input Filter Enable 9 1 write-only P10 Input Filter Enable 10 1 write-only P11 Input Filter Enable 11 1 write-only P12 Input Filter Enable 12 1 write-only P13 Input Filter Enable 13 1 write-only P14 Input Filter Enable 14 1 write-only P15 Input Filter Enable 15 1 write-only P16 Input Filter Enable 16 1 write-only P17 Input Filter Enable 17 1 write-only P18 Input Filter Enable 18 1 write-only P19 Input Filter Enable 19 1 write-only P20 Input Filter Enable 20 1 write-only P21 Input Filter Enable 21 1 write-only P22 Input Filter Enable 22 1 write-only P23 Input Filter Enable 23 1 write-only P24 Input Filter Enable 24 1 write-only P25 Input Filter Enable 25 1 write-only P26 Input Filter Enable 26 1 write-only P27 Input Filter Enable 27 1 write-only P28 Input Filter Enable 28 1 write-only P29 Input Filter Enable 29 1 write-only P30 Input Filter Enable 30 1 write-only P31 Input Filter Enable 31 1 write-only IFDR Glitch Input Filter Disable Register 0x00000024 32 write-only P0 Input Filter Disable 0 1 write-only P1 Input Filter Disable 1 1 write-only P2 Input Filter Disable 2 1 write-only P3 Input Filter Disable 3 1 write-only P4 Input Filter Disable 4 1 write-only P5 Input Filter Disable 5 1 write-only P6 Input Filter Disable 6 1 write-only P7 Input Filter Disable 7 1 write-only P8 Input Filter Disable 8 1 write-only P9 Input Filter Disable 9 1 write-only P10 Input Filter Disable 10 1 write-only P11 Input Filter Disable 11 1 write-only P12 Input Filter Disable 12 1 write-only P13 Input Filter Disable 13 1 write-only P14 Input Filter Disable 14 1 write-only P15 Input Filter Disable 15 1 write-only P16 Input Filter Disable 16 1 write-only P17 Input Filter Disable 17 1 write-only P18 Input Filter Disable 18 1 write-only P19 Input Filter Disable 19 1 write-only P20 Input Filter Disable 20 1 write-only P21 Input Filter Disable 21 1 write-only P22 Input Filter Disable 22 1 write-only P23 Input Filter Disable 23 1 write-only P24 Input Filter Disable 24 1 write-only P25 Input Filter Disable 25 1 write-only P26 Input Filter Disable 26 1 write-only P27 Input Filter Disable 27 1 write-only P28 Input Filter Disable 28 1 write-only P29 Input Filter Disable 29 1 write-only P30 Input Filter Disable 30 1 write-only P31 Input Filter Disable 31 1 write-only IFSR Glitch Input Filter Status Register 0x00000028 32 read-only 0x00000000 P0 Input Filer Status 0 1 read-only P1 Input Filer Status 1 1 read-only P2 Input Filer Status 2 1 read-only P3 Input Filer Status 3 1 read-only P4 Input Filer Status 4 1 read-only P5 Input Filer Status 5 1 read-only P6 Input Filer Status 6 1 read-only P7 Input Filer Status 7 1 read-only P8 Input Filer Status 8 1 read-only P9 Input Filer Status 9 1 read-only P10 Input Filer Status 10 1 read-only P11 Input Filer Status 11 1 read-only P12 Input Filer Status 12 1 read-only P13 Input Filer Status 13 1 read-only P14 Input Filer Status 14 1 read-only P15 Input Filer Status 15 1 read-only P16 Input Filer Status 16 1 read-only P17 Input Filer Status 17 1 read-only P18 Input Filer Status 18 1 read-only P19 Input Filer Status 19 1 read-only P20 Input Filer Status 20 1 read-only P21 Input Filer Status 21 1 read-only P22 Input Filer Status 22 1 read-only P23 Input Filer Status 23 1 read-only P24 Input Filer Status 24 1 read-only P25 Input Filer Status 25 1 read-only P26 Input Filer Status 26 1 read-only P27 Input Filer Status 27 1 read-only P28 Input Filer Status 28 1 read-only P29 Input Filer Status 29 1 read-only P30 Input Filer Status 30 1 read-only P31 Input Filer Status 31 1 read-only SODR Set Output Data Register 0x00000030 32 write-only P0 Set Output Data 0 1 write-only P1 Set Output Data 1 1 write-only P2 Set Output Data 2 1 write-only P3 Set Output Data 3 1 write-only P4 Set Output Data 4 1 write-only P5 Set Output Data 5 1 write-only P6 Set Output Data 6 1 write-only P7 Set Output Data 7 1 write-only P8 Set Output Data 8 1 write-only P9 Set Output Data 9 1 write-only P10 Set Output Data 10 1 write-only P11 Set Output Data 11 1 write-only P12 Set Output Data 12 1 write-only P13 Set Output Data 13 1 write-only P14 Set Output Data 14 1 write-only P15 Set Output Data 15 1 write-only P16 Set Output Data 16 1 write-only P17 Set Output Data 17 1 write-only P18 Set Output Data 18 1 write-only P19 Set Output Data 19 1 write-only P20 Set Output Data 20 1 write-only P21 Set Output Data 21 1 write-only P22 Set Output Data 22 1 write-only P23 Set Output Data 23 1 write-only P24 Set Output Data 24 1 write-only P25 Set Output Data 25 1 write-only P26 Set Output Data 26 1 write-only P27 Set Output Data 27 1 write-only P28 Set Output Data 28 1 write-only P29 Set Output Data 29 1 write-only P30 Set Output Data 30 1 write-only P31 Set Output Data 31 1 write-only CODR Clear Output Data Register 0x00000034 32 write-only P0 Clear Output Data 0 1 write-only P1 Clear Output Data 1 1 write-only P2 Clear Output Data 2 1 write-only P3 Clear Output Data 3 1 write-only P4 Clear Output Data 4 1 write-only P5 Clear Output Data 5 1 write-only P6 Clear Output Data 6 1 write-only P7 Clear Output Data 7 1 write-only P8 Clear Output Data 8 1 write-only P9 Clear Output Data 9 1 write-only P10 Clear Output Data 10 1 write-only P11 Clear Output Data 11 1 write-only P12 Clear Output Data 12 1 write-only P13 Clear Output Data 13 1 write-only P14 Clear Output Data 14 1 write-only P15 Clear Output Data 15 1 write-only P16 Clear Output Data 16 1 write-only P17 Clear Output Data 17 1 write-only P18 Clear Output Data 18 1 write-only P19 Clear Output Data 19 1 write-only P20 Clear Output Data 20 1 write-only P21 Clear Output Data 21 1 write-only P22 Clear Output Data 22 1 write-only P23 Clear Output Data 23 1 write-only P24 Clear Output Data 24 1 write-only P25 Clear Output Data 25 1 write-only P26 Clear Output Data 26 1 write-only P27 Clear Output Data 27 1 write-only P28 Clear Output Data 28 1 write-only P29 Clear Output Data 29 1 write-only P30 Clear Output Data 30 1 write-only P31 Clear Output Data 31 1 write-only ODSR Output Data Status Register 0x00000038 32 read-write P0 Output Data Status 0 1 read-write P1 Output Data Status 1 1 read-write P2 Output Data Status 2 1 read-write P3 Output Data Status 3 1 read-write P4 Output Data Status 4 1 read-write P5 Output Data Status 5 1 read-write P6 Output Data Status 6 1 read-write P7 Output Data Status 7 1 read-write P8 Output Data Status 8 1 read-write P9 Output Data Status 9 1 read-write P10 Output Data Status 10 1 read-write P11 Output Data Status 11 1 read-write P12 Output Data Status 12 1 read-write P13 Output Data Status 13 1 read-write P14 Output Data Status 14 1 read-write P15 Output Data Status 15 1 read-write P16 Output Data Status 16 1 read-write P17 Output Data Status 17 1 read-write P18 Output Data Status 18 1 read-write P19 Output Data Status 19 1 read-write P20 Output Data Status 20 1 read-write P21 Output Data Status 21 1 read-write P22 Output Data Status 22 1 read-write P23 Output Data Status 23 1 read-write P24 Output Data Status 24 1 read-write P25 Output Data Status 25 1 read-write P26 Output Data Status 26 1 read-write P27 Output Data Status 27 1 read-write P28 Output Data Status 28 1 read-write P29 Output Data Status 29 1 read-write P30 Output Data Status 30 1 read-write P31 Output Data Status 31 1 read-write PDSR Pin Data Status Register 0x0000003C 32 read-only P0 Output Data Status 0 1 read-only P1 Output Data Status 1 1 read-only P2 Output Data Status 2 1 read-only P3 Output Data Status 3 1 read-only P4 Output Data Status 4 1 read-only P5 Output Data Status 5 1 read-only P6 Output Data Status 6 1 read-only P7 Output Data Status 7 1 read-only P8 Output Data Status 8 1 read-only P9 Output Data Status 9 1 read-only P10 Output Data Status 10 1 read-only P11 Output Data Status 11 1 read-only P12 Output Data Status 12 1 read-only P13 Output Data Status 13 1 read-only P14 Output Data Status 14 1 read-only P15 Output Data Status 15 1 read-only P16 Output Data Status 16 1 read-only P17 Output Data Status 17 1 read-only P18 Output Data Status 18 1 read-only P19 Output Data Status 19 1 read-only P20 Output Data Status 20 1 read-only P21 Output Data Status 21 1 read-only P22 Output Data Status 22 1 read-only P23 Output Data Status 23 1 read-only P24 Output Data Status 24 1 read-only P25 Output Data Status 25 1 read-only P26 Output Data Status 26 1 read-only P27 Output Data Status 27 1 read-only P28 Output Data Status 28 1 read-only P29 Output Data Status 29 1 read-only P30 Output Data Status 30 1 read-only P31 Output Data Status 31 1 read-only IER Interrupt Enable Register 0x00000040 32 write-only P0 Input Change Interrupt Enable 0 1 write-only P1 Input Change Interrupt Enable 1 1 write-only P2 Input Change Interrupt Enable 2 1 write-only P3 Input Change Interrupt Enable 3 1 write-only P4 Input Change Interrupt Enable 4 1 write-only P5 Input Change Interrupt Enable 5 1 write-only P6 Input Change Interrupt Enable 6 1 write-only P7 Input Change Interrupt Enable 7 1 write-only P8 Input Change Interrupt Enable 8 1 write-only P9 Input Change Interrupt Enable 9 1 write-only P10 Input Change Interrupt Enable 10 1 write-only P11 Input Change Interrupt Enable 11 1 write-only P12 Input Change Interrupt Enable 12 1 write-only P13 Input Change Interrupt Enable 13 1 write-only P14 Input Change Interrupt Enable 14 1 write-only P15 Input Change Interrupt Enable 15 1 write-only P16 Input Change Interrupt Enable 16 1 write-only P17 Input Change Interrupt Enable 17 1 write-only P18 Input Change Interrupt Enable 18 1 write-only P19 Input Change Interrupt Enable 19 1 write-only P20 Input Change Interrupt Enable 20 1 write-only P21 Input Change Interrupt Enable 21 1 write-only P22 Input Change Interrupt Enable 22 1 write-only P23 Input Change Interrupt Enable 23 1 write-only P24 Input Change Interrupt Enable 24 1 write-only P25 Input Change Interrupt Enable 25 1 write-only P26 Input Change Interrupt Enable 26 1 write-only P27 Input Change Interrupt Enable 27 1 write-only P28 Input Change Interrupt Enable 28 1 write-only P29 Input Change Interrupt Enable 29 1 write-only P30 Input Change Interrupt Enable 30 1 write-only P31 Input Change Interrupt Enable 31 1 write-only IDR Interrupt Disable Register 0x00000044 32 write-only P0 Input Change Interrupt Disable 0 1 write-only P1 Input Change Interrupt Disable 1 1 write-only P2 Input Change Interrupt Disable 2 1 write-only P3 Input Change Interrupt Disable 3 1 write-only P4 Input Change Interrupt Disable 4 1 write-only P5 Input Change Interrupt Disable 5 1 write-only P6 Input Change Interrupt Disable 6 1 write-only P7 Input Change Interrupt Disable 7 1 write-only P8 Input Change Interrupt Disable 8 1 write-only P9 Input Change Interrupt Disable 9 1 write-only P10 Input Change Interrupt Disable 10 1 write-only P11 Input Change Interrupt Disable 11 1 write-only P12 Input Change Interrupt Disable 12 1 write-only P13 Input Change Interrupt Disable 13 1 write-only P14 Input Change Interrupt Disable 14 1 write-only P15 Input Change Interrupt Disable 15 1 write-only P16 Input Change Interrupt Disable 16 1 write-only P17 Input Change Interrupt Disable 17 1 write-only P18 Input Change Interrupt Disable 18 1 write-only P19 Input Change Interrupt Disable 19 1 write-only P20 Input Change Interrupt Disable 20 1 write-only P21 Input Change Interrupt Disable 21 1 write-only P22 Input Change Interrupt Disable 22 1 write-only P23 Input Change Interrupt Disable 23 1 write-only P24 Input Change Interrupt Disable 24 1 write-only P25 Input Change Interrupt Disable 25 1 write-only P26 Input Change Interrupt Disable 26 1 write-only P27 Input Change Interrupt Disable 27 1 write-only P28 Input Change Interrupt Disable 28 1 write-only P29 Input Change Interrupt Disable 29 1 write-only P30 Input Change Interrupt Disable 30 1 write-only P31 Input Change Interrupt Disable 31 1 write-only IMR Interrupt Mask Register 0x00000048 32 read-only 0x00000000 P0 Input Change Interrupt Mask 0 1 read-only P1 Input Change Interrupt Mask 1 1 read-only P2 Input Change Interrupt Mask 2 1 read-only P3 Input Change Interrupt Mask 3 1 read-only P4 Input Change Interrupt Mask 4 1 read-only P5 Input Change Interrupt Mask 5 1 read-only P6 Input Change Interrupt Mask 6 1 read-only P7 Input Change Interrupt Mask 7 1 read-only P8 Input Change Interrupt Mask 8 1 read-only P9 Input Change Interrupt Mask 9 1 read-only P10 Input Change Interrupt Mask 10 1 read-only P11 Input Change Interrupt Mask 11 1 read-only P12 Input Change Interrupt Mask 12 1 read-only P13 Input Change Interrupt Mask 13 1 read-only P14 Input Change Interrupt Mask 14 1 read-only P15 Input Change Interrupt Mask 15 1 read-only P16 Input Change Interrupt Mask 16 1 read-only P17 Input Change Interrupt Mask 17 1 read-only P18 Input Change Interrupt Mask 18 1 read-only P19 Input Change Interrupt Mask 19 1 read-only P20 Input Change Interrupt Mask 20 1 read-only P21 Input Change Interrupt Mask 21 1 read-only P22 Input Change Interrupt Mask 22 1 read-only P23 Input Change Interrupt Mask 23 1 read-only P24 Input Change Interrupt Mask 24 1 read-only P25 Input Change Interrupt Mask 25 1 read-only P26 Input Change Interrupt Mask 26 1 read-only P27 Input Change Interrupt Mask 27 1 read-only P28 Input Change Interrupt Mask 28 1 read-only P29 Input Change Interrupt Mask 29 1 read-only P30 Input Change Interrupt Mask 30 1 read-only P31 Input Change Interrupt Mask 31 1 read-only ISR Interrupt Status Register 0x0000004C 32 read-only 0x00000000 P0 Input Change Interrupt Status 0 1 read-only P1 Input Change Interrupt Status 1 1 read-only P2 Input Change Interrupt Status 2 1 read-only P3 Input Change Interrupt Status 3 1 read-only P4 Input Change Interrupt Status 4 1 read-only P5 Input Change Interrupt Status 5 1 read-only P6 Input Change Interrupt Status 6 1 read-only P7 Input Change Interrupt Status 7 1 read-only P8 Input Change Interrupt Status 8 1 read-only P9 Input Change Interrupt Status 9 1 read-only P10 Input Change Interrupt Status 10 1 read-only P11 Input Change Interrupt Status 11 1 read-only P12 Input Change Interrupt Status 12 1 read-only P13 Input Change Interrupt Status 13 1 read-only P14 Input Change Interrupt Status 14 1 read-only P15 Input Change Interrupt Status 15 1 read-only P16 Input Change Interrupt Status 16 1 read-only P17 Input Change Interrupt Status 17 1 read-only P18 Input Change Interrupt Status 18 1 read-only P19 Input Change Interrupt Status 19 1 read-only P20 Input Change Interrupt Status 20 1 read-only P21 Input Change Interrupt Status 21 1 read-only P22 Input Change Interrupt Status 22 1 read-only P23 Input Change Interrupt Status 23 1 read-only P24 Input Change Interrupt Status 24 1 read-only P25 Input Change Interrupt Status 25 1 read-only P26 Input Change Interrupt Status 26 1 read-only P27 Input Change Interrupt Status 27 1 read-only P28 Input Change Interrupt Status 28 1 read-only P29 Input Change Interrupt Status 29 1 read-only P30 Input Change Interrupt Status 30 1 read-only P31 Input Change Interrupt Status 31 1 read-only MDER Multi-driver Enable Register 0x00000050 32 write-only P0 Multi Drive Enable 0 1 write-only P1 Multi Drive Enable 1 1 write-only P2 Multi Drive Enable 2 1 write-only P3 Multi Drive Enable 3 1 write-only P4 Multi Drive Enable 4 1 write-only P5 Multi Drive Enable 5 1 write-only P6 Multi Drive Enable 6 1 write-only P7 Multi Drive Enable 7 1 write-only P8 Multi Drive Enable 8 1 write-only P9 Multi Drive Enable 9 1 write-only P10 Multi Drive Enable 10 1 write-only P11 Multi Drive Enable 11 1 write-only P12 Multi Drive Enable 12 1 write-only P13 Multi Drive Enable 13 1 write-only P14 Multi Drive Enable 14 1 write-only P15 Multi Drive Enable 15 1 write-only P16 Multi Drive Enable 16 1 write-only P17 Multi Drive Enable 17 1 write-only P18 Multi Drive Enable 18 1 write-only P19 Multi Drive Enable 19 1 write-only P20 Multi Drive Enable 20 1 write-only P21 Multi Drive Enable 21 1 write-only P22 Multi Drive Enable 22 1 write-only P23 Multi Drive Enable 23 1 write-only P24 Multi Drive Enable 24 1 write-only P25 Multi Drive Enable 25 1 write-only P26 Multi Drive Enable 26 1 write-only P27 Multi Drive Enable 27 1 write-only P28 Multi Drive Enable 28 1 write-only P29 Multi Drive Enable 29 1 write-only P30 Multi Drive Enable 30 1 write-only P31 Multi Drive Enable 31 1 write-only MDDR Multi-driver Disable Register 0x00000054 32 write-only P0 Multi Drive Disable. 0 1 write-only P1 Multi Drive Disable. 1 1 write-only P2 Multi Drive Disable. 2 1 write-only P3 Multi Drive Disable. 3 1 write-only P4 Multi Drive Disable. 4 1 write-only P5 Multi Drive Disable. 5 1 write-only P6 Multi Drive Disable. 6 1 write-only P7 Multi Drive Disable. 7 1 write-only P8 Multi Drive Disable. 8 1 write-only P9 Multi Drive Disable. 9 1 write-only P10 Multi Drive Disable. 10 1 write-only P11 Multi Drive Disable. 11 1 write-only P12 Multi Drive Disable. 12 1 write-only P13 Multi Drive Disable. 13 1 write-only P14 Multi Drive Disable. 14 1 write-only P15 Multi Drive Disable. 15 1 write-only P16 Multi Drive Disable. 16 1 write-only P17 Multi Drive Disable. 17 1 write-only P18 Multi Drive Disable. 18 1 write-only P19 Multi Drive Disable. 19 1 write-only P20 Multi Drive Disable. 20 1 write-only P21 Multi Drive Disable. 21 1 write-only P22 Multi Drive Disable. 22 1 write-only P23 Multi Drive Disable. 23 1 write-only P24 Multi Drive Disable. 24 1 write-only P25 Multi Drive Disable. 25 1 write-only P26 Multi Drive Disable. 26 1 write-only P27 Multi Drive Disable. 27 1 write-only P28 Multi Drive Disable. 28 1 write-only P29 Multi Drive Disable. 29 1 write-only P30 Multi Drive Disable. 30 1 write-only P31 Multi Drive Disable. 31 1 write-only MDSR Multi-driver Status Register 0x00000058 32 read-only 0x00000000 P0 Multi Drive Status. 0 1 read-only P1 Multi Drive Status. 1 1 read-only P2 Multi Drive Status. 2 1 read-only P3 Multi Drive Status. 3 1 read-only P4 Multi Drive Status. 4 1 read-only P5 Multi Drive Status. 5 1 read-only P6 Multi Drive Status. 6 1 read-only P7 Multi Drive Status. 7 1 read-only P8 Multi Drive Status. 8 1 read-only P9 Multi Drive Status. 9 1 read-only P10 Multi Drive Status. 10 1 read-only P11 Multi Drive Status. 11 1 read-only P12 Multi Drive Status. 12 1 read-only P13 Multi Drive Status. 13 1 read-only P14 Multi Drive Status. 14 1 read-only P15 Multi Drive Status. 15 1 read-only P16 Multi Drive Status. 16 1 read-only P17 Multi Drive Status. 17 1 read-only P18 Multi Drive Status. 18 1 read-only P19 Multi Drive Status. 19 1 read-only P20 Multi Drive Status. 20 1 read-only P21 Multi Drive Status. 21 1 read-only P22 Multi Drive Status. 22 1 read-only P23 Multi Drive Status. 23 1 read-only P24 Multi Drive Status. 24 1 read-only P25 Multi Drive Status. 25 1 read-only P26 Multi Drive Status. 26 1 read-only P27 Multi Drive Status. 27 1 read-only P28 Multi Drive Status. 28 1 read-only P29 Multi Drive Status. 29 1 read-only P30 Multi Drive Status. 30 1 read-only P31 Multi Drive Status. 31 1 read-only PUDR Pull-up Disable Register 0x00000060 32 write-only P0 Pull Up Disable. 0 1 write-only P1 Pull Up Disable. 1 1 write-only P2 Pull Up Disable. 2 1 write-only P3 Pull Up Disable. 3 1 write-only P4 Pull Up Disable. 4 1 write-only P5 Pull Up Disable. 5 1 write-only P6 Pull Up Disable. 6 1 write-only P7 Pull Up Disable. 7 1 write-only P8 Pull Up Disable. 8 1 write-only P9 Pull Up Disable. 9 1 write-only P10 Pull Up Disable. 10 1 write-only P11 Pull Up Disable. 11 1 write-only P12 Pull Up Disable. 12 1 write-only P13 Pull Up Disable. 13 1 write-only P14 Pull Up Disable. 14 1 write-only P15 Pull Up Disable. 15 1 write-only P16 Pull Up Disable. 16 1 write-only P17 Pull Up Disable. 17 1 write-only P18 Pull Up Disable. 18 1 write-only P19 Pull Up Disable. 19 1 write-only P20 Pull Up Disable. 20 1 write-only P21 Pull Up Disable. 21 1 write-only P22 Pull Up Disable. 22 1 write-only P23 Pull Up Disable. 23 1 write-only P24 Pull Up Disable. 24 1 write-only P25 Pull Up Disable. 25 1 write-only P26 Pull Up Disable. 26 1 write-only P27 Pull Up Disable. 27 1 write-only P28 Pull Up Disable. 28 1 write-only P29 Pull Up Disable. 29 1 write-only P30 Pull Up Disable. 30 1 write-only P31 Pull Up Disable. 31 1 write-only PUER Pull-up Enable Register 0x00000064 32 write-only P0 Pull Up Enable. 0 1 write-only P1 Pull Up Enable. 1 1 write-only P2 Pull Up Enable. 2 1 write-only P3 Pull Up Enable. 3 1 write-only P4 Pull Up Enable. 4 1 write-only P5 Pull Up Enable. 5 1 write-only P6 Pull Up Enable. 6 1 write-only P7 Pull Up Enable. 7 1 write-only P8 Pull Up Enable. 8 1 write-only P9 Pull Up Enable. 9 1 write-only P10 Pull Up Enable. 10 1 write-only P11 Pull Up Enable. 11 1 write-only P12 Pull Up Enable. 12 1 write-only P13 Pull Up Enable. 13 1 write-only P14 Pull Up Enable. 14 1 write-only P15 Pull Up Enable. 15 1 write-only P16 Pull Up Enable. 16 1 write-only P17 Pull Up Enable. 17 1 write-only P18 Pull Up Enable. 18 1 write-only P19 Pull Up Enable. 19 1 write-only P20 Pull Up Enable. 20 1 write-only P21 Pull Up Enable. 21 1 write-only P22 Pull Up Enable. 22 1 write-only P23 Pull Up Enable. 23 1 write-only P24 Pull Up Enable. 24 1 write-only P25 Pull Up Enable. 25 1 write-only P26 Pull Up Enable. 26 1 write-only P27 Pull Up Enable. 27 1 write-only P28 Pull Up Enable. 28 1 write-only P29 Pull Up Enable. 29 1 write-only P30 Pull Up Enable. 30 1 write-only P31 Pull Up Enable. 31 1 write-only PUSR Pad Pull-up Status Register 0x00000068 32 read-only P0 Pull Up Status. 0 1 read-only P1 Pull Up Status. 1 1 read-only P2 Pull Up Status. 2 1 read-only P3 Pull Up Status. 3 1 read-only P4 Pull Up Status. 4 1 read-only P5 Pull Up Status. 5 1 read-only P6 Pull Up Status. 6 1 read-only P7 Pull Up Status. 7 1 read-only P8 Pull Up Status. 8 1 read-only P9 Pull Up Status. 9 1 read-only P10 Pull Up Status. 10 1 read-only P11 Pull Up Status. 11 1 read-only P12 Pull Up Status. 12 1 read-only P13 Pull Up Status. 13 1 read-only P14 Pull Up Status. 14 1 read-only P15 Pull Up Status. 15 1 read-only P16 Pull Up Status. 16 1 read-only P17 Pull Up Status. 17 1 read-only P18 Pull Up Status. 18 1 read-only P19 Pull Up Status. 19 1 read-only P20 Pull Up Status. 20 1 read-only P21 Pull Up Status. 21 1 read-only P22 Pull Up Status. 22 1 read-only P23 Pull Up Status. 23 1 read-only P24 Pull Up Status. 24 1 read-only P25 Pull Up Status. 25 1 read-only P26 Pull Up Status. 26 1 read-only P27 Pull Up Status. 27 1 read-only P28 Pull Up Status. 28 1 read-only P29 Pull Up Status. 29 1 read-only P30 Pull Up Status. 30 1 read-only P31 Pull Up Status. 31 1 read-only 2 4 0-1 ABCDSR[%s] Peripheral Select Register 0x00000070 32 read-write P0 Peripheral Select. 0 1 read-write P1 Peripheral Select. 1 1 read-write P2 Peripheral Select. 2 1 read-write P3 Peripheral Select. 3 1 read-write P4 Peripheral Select. 4 1 read-write P5 Peripheral Select. 5 1 read-write P6 Peripheral Select. 6 1 read-write P7 Peripheral Select. 7 1 read-write P8 Peripheral Select. 8 1 read-write P9 Peripheral Select. 9 1 read-write P10 Peripheral Select. 10 1 read-write P11 Peripheral Select. 11 1 read-write P12 Peripheral Select. 12 1 read-write P13 Peripheral Select. 13 1 read-write P14 Peripheral Select. 14 1 read-write P15 Peripheral Select. 15 1 read-write P16 Peripheral Select. 16 1 read-write P17 Peripheral Select. 17 1 read-write P18 Peripheral Select. 18 1 read-write P19 Peripheral Select. 19 1 read-write P20 Peripheral Select. 20 1 read-write P21 Peripheral Select. 21 1 read-write P22 Peripheral Select. 22 1 read-write P23 Peripheral Select. 23 1 read-write P24 Peripheral Select. 24 1 read-write P25 Peripheral Select. 25 1 read-write P26 Peripheral Select. 26 1 read-write P27 Peripheral Select. 27 1 read-write P28 Peripheral Select. 28 1 read-write P29 Peripheral Select. 29 1 read-write P30 Peripheral Select. 30 1 read-write P31 Peripheral Select. 31 1 read-write IFSCDR Input Filter Slow Clock Disable Register 0x00000080 32 write-only P0 PIO Clock Glitch Filtering Select. 0 1 write-only P1 PIO Clock Glitch Filtering Select. 1 1 write-only P2 PIO Clock Glitch Filtering Select. 2 1 write-only P3 PIO Clock Glitch Filtering Select. 3 1 write-only P4 PIO Clock Glitch Filtering Select. 4 1 write-only P5 PIO Clock Glitch Filtering Select. 5 1 write-only P6 PIO Clock Glitch Filtering Select. 6 1 write-only P7 PIO Clock Glitch Filtering Select. 7 1 write-only P8 PIO Clock Glitch Filtering Select. 8 1 write-only P9 PIO Clock Glitch Filtering Select. 9 1 write-only P10 PIO Clock Glitch Filtering Select. 10 1 write-only P11 PIO Clock Glitch Filtering Select. 11 1 write-only P12 PIO Clock Glitch Filtering Select. 12 1 write-only P13 PIO Clock Glitch Filtering Select. 13 1 write-only P14 PIO Clock Glitch Filtering Select. 14 1 write-only P15 PIO Clock Glitch Filtering Select. 15 1 write-only P16 PIO Clock Glitch Filtering Select. 16 1 write-only P17 PIO Clock Glitch Filtering Select. 17 1 write-only P18 PIO Clock Glitch Filtering Select. 18 1 write-only P19 PIO Clock Glitch Filtering Select. 19 1 write-only P20 PIO Clock Glitch Filtering Select. 20 1 write-only P21 PIO Clock Glitch Filtering Select. 21 1 write-only P22 PIO Clock Glitch Filtering Select. 22 1 write-only P23 PIO Clock Glitch Filtering Select. 23 1 write-only P24 PIO Clock Glitch Filtering Select. 24 1 write-only P25 PIO Clock Glitch Filtering Select. 25 1 write-only P26 PIO Clock Glitch Filtering Select. 26 1 write-only P27 PIO Clock Glitch Filtering Select. 27 1 write-only P28 PIO Clock Glitch Filtering Select. 28 1 write-only P29 PIO Clock Glitch Filtering Select. 29 1 write-only P30 PIO Clock Glitch Filtering Select. 30 1 write-only P31 PIO Clock Glitch Filtering Select. 31 1 write-only IFSCER Input Filter Slow Clock Enable Register 0x00000084 32 write-only P0 Debouncing Filtering Select. 0 1 write-only P1 Debouncing Filtering Select. 1 1 write-only P2 Debouncing Filtering Select. 2 1 write-only P3 Debouncing Filtering Select. 3 1 write-only P4 Debouncing Filtering Select. 4 1 write-only P5 Debouncing Filtering Select. 5 1 write-only P6 Debouncing Filtering Select. 6 1 write-only P7 Debouncing Filtering Select. 7 1 write-only P8 Debouncing Filtering Select. 8 1 write-only P9 Debouncing Filtering Select. 9 1 write-only P10 Debouncing Filtering Select. 10 1 write-only P11 Debouncing Filtering Select. 11 1 write-only P12 Debouncing Filtering Select. 12 1 write-only P13 Debouncing Filtering Select. 13 1 write-only P14 Debouncing Filtering Select. 14 1 write-only P15 Debouncing Filtering Select. 15 1 write-only P16 Debouncing Filtering Select. 16 1 write-only P17 Debouncing Filtering Select. 17 1 write-only P18 Debouncing Filtering Select. 18 1 write-only P19 Debouncing Filtering Select. 19 1 write-only P20 Debouncing Filtering Select. 20 1 write-only P21 Debouncing Filtering Select. 21 1 write-only P22 Debouncing Filtering Select. 22 1 write-only P23 Debouncing Filtering Select. 23 1 write-only P24 Debouncing Filtering Select. 24 1 write-only P25 Debouncing Filtering Select. 25 1 write-only P26 Debouncing Filtering Select. 26 1 write-only P27 Debouncing Filtering Select. 27 1 write-only P28 Debouncing Filtering Select. 28 1 write-only P29 Debouncing Filtering Select. 29 1 write-only P30 Debouncing Filtering Select. 30 1 write-only P31 Debouncing Filtering Select. 31 1 write-only IFSCSR Input Filter Slow Clock Status Register 0x00000088 32 read-only 0x00000000 P0 Glitch or Debouncing Filter Selection Status 0 1 read-only P1 Glitch or Debouncing Filter Selection Status 1 1 read-only P2 Glitch or Debouncing Filter Selection Status 2 1 read-only P3 Glitch or Debouncing Filter Selection Status 3 1 read-only P4 Glitch or Debouncing Filter Selection Status 4 1 read-only P5 Glitch or Debouncing Filter Selection Status 5 1 read-only P6 Glitch or Debouncing Filter Selection Status 6 1 read-only P7 Glitch or Debouncing Filter Selection Status 7 1 read-only P8 Glitch or Debouncing Filter Selection Status 8 1 read-only P9 Glitch or Debouncing Filter Selection Status 9 1 read-only P10 Glitch or Debouncing Filter Selection Status 10 1 read-only P11 Glitch or Debouncing Filter Selection Status 11 1 read-only P12 Glitch or Debouncing Filter Selection Status 12 1 read-only P13 Glitch or Debouncing Filter Selection Status 13 1 read-only P14 Glitch or Debouncing Filter Selection Status 14 1 read-only P15 Glitch or Debouncing Filter Selection Status 15 1 read-only P16 Glitch or Debouncing Filter Selection Status 16 1 read-only P17 Glitch or Debouncing Filter Selection Status 17 1 read-only P18 Glitch or Debouncing Filter Selection Status 18 1 read-only P19 Glitch or Debouncing Filter Selection Status 19 1 read-only P20 Glitch or Debouncing Filter Selection Status 20 1 read-only P21 Glitch or Debouncing Filter Selection Status 21 1 read-only P22 Glitch or Debouncing Filter Selection Status 22 1 read-only P23 Glitch or Debouncing Filter Selection Status 23 1 read-only P24 Glitch or Debouncing Filter Selection Status 24 1 read-only P25 Glitch or Debouncing Filter Selection Status 25 1 read-only P26 Glitch or Debouncing Filter Selection Status 26 1 read-only P27 Glitch or Debouncing Filter Selection Status 27 1 read-only P28 Glitch or Debouncing Filter Selection Status 28 1 read-only P29 Glitch or Debouncing Filter Selection Status 29 1 read-only P30 Glitch or Debouncing Filter Selection Status 30 1 read-only P31 Glitch or Debouncing Filter Selection Status 31 1 read-only SCDR Slow Clock Divider Debouncing Register 0x0000008C 32 read-write 0x00000000 DIV Slow Clock Divider Selection for Debouncing 0 14 read-write PPDDR Pad Pull-down Disable Register 0x00000090 32 write-only P0 Pull Down Disable 0 1 write-only P1 Pull Down Disable 1 1 write-only P2 Pull Down Disable 2 1 write-only P3 Pull Down Disable 3 1 write-only P4 Pull Down Disable 4 1 write-only P5 Pull Down Disable 5 1 write-only P6 Pull Down Disable 6 1 write-only P7 Pull Down Disable 7 1 write-only P8 Pull Down Disable 8 1 write-only P9 Pull Down Disable 9 1 write-only P10 Pull Down Disable 10 1 write-only P11 Pull Down Disable 11 1 write-only P12 Pull Down Disable 12 1 write-only P13 Pull Down Disable 13 1 write-only P14 Pull Down Disable 14 1 write-only P15 Pull Down Disable 15 1 write-only P16 Pull Down Disable 16 1 write-only P17 Pull Down Disable 17 1 write-only P18 Pull Down Disable 18 1 write-only P19 Pull Down Disable 19 1 write-only P20 Pull Down Disable 20 1 write-only P21 Pull Down Disable 21 1 write-only P22 Pull Down Disable 22 1 write-only P23 Pull Down Disable 23 1 write-only P24 Pull Down Disable 24 1 write-only P25 Pull Down Disable 25 1 write-only P26 Pull Down Disable 26 1 write-only P27 Pull Down Disable 27 1 write-only P28 Pull Down Disable 28 1 write-only P29 Pull Down Disable 29 1 write-only P30 Pull Down Disable 30 1 write-only P31 Pull Down Disable 31 1 write-only PPDER Pad Pull-down Enable Register 0x00000094 32 write-only P0 Pull Down Enable 0 1 write-only P1 Pull Down Enable 1 1 write-only P2 Pull Down Enable 2 1 write-only P3 Pull Down Enable 3 1 write-only P4 Pull Down Enable 4 1 write-only P5 Pull Down Enable 5 1 write-only P6 Pull Down Enable 6 1 write-only P7 Pull Down Enable 7 1 write-only P8 Pull Down Enable 8 1 write-only P9 Pull Down Enable 9 1 write-only P10 Pull Down Enable 10 1 write-only P11 Pull Down Enable 11 1 write-only P12 Pull Down Enable 12 1 write-only P13 Pull Down Enable 13 1 write-only P14 Pull Down Enable 14 1 write-only P15 Pull Down Enable 15 1 write-only P16 Pull Down Enable 16 1 write-only P17 Pull Down Enable 17 1 write-only P18 Pull Down Enable 18 1 write-only P19 Pull Down Enable 19 1 write-only P20 Pull Down Enable 20 1 write-only P21 Pull Down Enable 21 1 write-only P22 Pull Down Enable 22 1 write-only P23 Pull Down Enable 23 1 write-only P24 Pull Down Enable 24 1 write-only P25 Pull Down Enable 25 1 write-only P26 Pull Down Enable 26 1 write-only P27 Pull Down Enable 27 1 write-only P28 Pull Down Enable 28 1 write-only P29 Pull Down Enable 29 1 write-only P30 Pull Down Enable 30 1 write-only P31 Pull Down Enable 31 1 write-only PPDSR Pad Pull-down Status Register 0x00000098 32 read-only P0 Pull Down Status 0 1 read-only P1 Pull Down Status 1 1 read-only P2 Pull Down Status 2 1 read-only P3 Pull Down Status 3 1 read-only P4 Pull Down Status 4 1 read-only P5 Pull Down Status 5 1 read-only P6 Pull Down Status 6 1 read-only P7 Pull Down Status 7 1 read-only P8 Pull Down Status 8 1 read-only P9 Pull Down Status 9 1 read-only P10 Pull Down Status 10 1 read-only P11 Pull Down Status 11 1 read-only P12 Pull Down Status 12 1 read-only P13 Pull Down Status 13 1 read-only P14 Pull Down Status 14 1 read-only P15 Pull Down Status 15 1 read-only P16 Pull Down Status 16 1 read-only P17 Pull Down Status 17 1 read-only P18 Pull Down Status 18 1 read-only P19 Pull Down Status 19 1 read-only P20 Pull Down Status 20 1 read-only P21 Pull Down Status 21 1 read-only P22 Pull Down Status 22 1 read-only P23 Pull Down Status 23 1 read-only P24 Pull Down Status 24 1 read-only P25 Pull Down Status 25 1 read-only P26 Pull Down Status 26 1 read-only P27 Pull Down Status 27 1 read-only P28 Pull Down Status 28 1 read-only P29 Pull Down Status 29 1 read-only P30 Pull Down Status 30 1 read-only P31 Pull Down Status 31 1 read-only OWER Output Write Enable 0x000000A0 32 write-only P0 Output Write Enable 0 1 write-only P1 Output Write Enable 1 1 write-only P2 Output Write Enable 2 1 write-only P3 Output Write Enable 3 1 write-only P4 Output Write Enable 4 1 write-only P5 Output Write Enable 5 1 write-only P6 Output Write Enable 6 1 write-only P7 Output Write Enable 7 1 write-only P8 Output Write Enable 8 1 write-only P9 Output Write Enable 9 1 write-only P10 Output Write Enable 10 1 write-only P11 Output Write Enable 11 1 write-only P12 Output Write Enable 12 1 write-only P13 Output Write Enable 13 1 write-only P14 Output Write Enable 14 1 write-only P15 Output Write Enable 15 1 write-only P16 Output Write Enable 16 1 write-only P17 Output Write Enable 17 1 write-only P18 Output Write Enable 18 1 write-only P19 Output Write Enable 19 1 write-only P20 Output Write Enable 20 1 write-only P21 Output Write Enable 21 1 write-only P22 Output Write Enable 22 1 write-only P23 Output Write Enable 23 1 write-only P24 Output Write Enable 24 1 write-only P25 Output Write Enable 25 1 write-only P26 Output Write Enable 26 1 write-only P27 Output Write Enable 27 1 write-only P28 Output Write Enable 28 1 write-only P29 Output Write Enable 29 1 write-only P30 Output Write Enable 30 1 write-only P31 Output Write Enable 31 1 write-only OWDR Output Write Disable 0x000000A4 32 write-only P0 Output Write Disable 0 1 write-only P1 Output Write Disable 1 1 write-only P2 Output Write Disable 2 1 write-only P3 Output Write Disable 3 1 write-only P4 Output Write Disable 4 1 write-only P5 Output Write Disable 5 1 write-only P6 Output Write Disable 6 1 write-only P7 Output Write Disable 7 1 write-only P8 Output Write Disable 8 1 write-only P9 Output Write Disable 9 1 write-only P10 Output Write Disable 10 1 write-only P11 Output Write Disable 11 1 write-only P12 Output Write Disable 12 1 write-only P13 Output Write Disable 13 1 write-only P14 Output Write Disable 14 1 write-only P15 Output Write Disable 15 1 write-only P16 Output Write Disable 16 1 write-only P17 Output Write Disable 17 1 write-only P18 Output Write Disable 18 1 write-only P19 Output Write Disable 19 1 write-only P20 Output Write Disable 20 1 write-only P21 Output Write Disable 21 1 write-only P22 Output Write Disable 22 1 write-only P23 Output Write Disable 23 1 write-only P24 Output Write Disable 24 1 write-only P25 Output Write Disable 25 1 write-only P26 Output Write Disable 26 1 write-only P27 Output Write Disable 27 1 write-only P28 Output Write Disable 28 1 write-only P29 Output Write Disable 29 1 write-only P30 Output Write Disable 30 1 write-only P31 Output Write Disable 31 1 write-only OWSR Output Write Status Register 0x000000A8 32 read-only 0x00000000 P0 Output Write Status 0 1 read-only P1 Output Write Status 1 1 read-only P2 Output Write Status 2 1 read-only P3 Output Write Status 3 1 read-only P4 Output Write Status 4 1 read-only P5 Output Write Status 5 1 read-only P6 Output Write Status 6 1 read-only P7 Output Write Status 7 1 read-only P8 Output Write Status 8 1 read-only P9 Output Write Status 9 1 read-only P10 Output Write Status 10 1 read-only P11 Output Write Status 11 1 read-only P12 Output Write Status 12 1 read-only P13 Output Write Status 13 1 read-only P14 Output Write Status 14 1 read-only P15 Output Write Status 15 1 read-only P16 Output Write Status 16 1 read-only P17 Output Write Status 17 1 read-only P18 Output Write Status 18 1 read-only P19 Output Write Status 19 1 read-only P20 Output Write Status 20 1 read-only P21 Output Write Status 21 1 read-only P22 Output Write Status 22 1 read-only P23 Output Write Status 23 1 read-only P24 Output Write Status 24 1 read-only P25 Output Write Status 25 1 read-only P26 Output Write Status 26 1 read-only P27 Output Write Status 27 1 read-only P28 Output Write Status 28 1 read-only P29 Output Write Status 29 1 read-only P30 Output Write Status 30 1 read-only P31 Output Write Status 31 1 read-only AIMER Additional Interrupt Modes Enable Register 0x000000B0 32 write-only P0 Additional Interrupt Modes Enable 0 1 write-only P1 Additional Interrupt Modes Enable 1 1 write-only P2 Additional Interrupt Modes Enable 2 1 write-only P3 Additional Interrupt Modes Enable 3 1 write-only P4 Additional Interrupt Modes Enable 4 1 write-only P5 Additional Interrupt Modes Enable 5 1 write-only P6 Additional Interrupt Modes Enable 6 1 write-only P7 Additional Interrupt Modes Enable 7 1 write-only P8 Additional Interrupt Modes Enable 8 1 write-only P9 Additional Interrupt Modes Enable 9 1 write-only P10 Additional Interrupt Modes Enable 10 1 write-only P11 Additional Interrupt Modes Enable 11 1 write-only P12 Additional Interrupt Modes Enable 12 1 write-only P13 Additional Interrupt Modes Enable 13 1 write-only P14 Additional Interrupt Modes Enable 14 1 write-only P15 Additional Interrupt Modes Enable 15 1 write-only P16 Additional Interrupt Modes Enable 16 1 write-only P17 Additional Interrupt Modes Enable 17 1 write-only P18 Additional Interrupt Modes Enable 18 1 write-only P19 Additional Interrupt Modes Enable 19 1 write-only P20 Additional Interrupt Modes Enable 20 1 write-only P21 Additional Interrupt Modes Enable 21 1 write-only P22 Additional Interrupt Modes Enable 22 1 write-only P23 Additional Interrupt Modes Enable 23 1 write-only P24 Additional Interrupt Modes Enable 24 1 write-only P25 Additional Interrupt Modes Enable 25 1 write-only P26 Additional Interrupt Modes Enable 26 1 write-only P27 Additional Interrupt Modes Enable 27 1 write-only P28 Additional Interrupt Modes Enable 28 1 write-only P29 Additional Interrupt Modes Enable 29 1 write-only P30 Additional Interrupt Modes Enable 30 1 write-only P31 Additional Interrupt Modes Enable 31 1 write-only AIMDR Additional Interrupt Modes Disables Register 0x000000B4 32 write-only P0 Additional Interrupt Modes Disable 0 1 write-only P1 Additional Interrupt Modes Disable 1 1 write-only P2 Additional Interrupt Modes Disable 2 1 write-only P3 Additional Interrupt Modes Disable 3 1 write-only P4 Additional Interrupt Modes Disable 4 1 write-only P5 Additional Interrupt Modes Disable 5 1 write-only P6 Additional Interrupt Modes Disable 6 1 write-only P7 Additional Interrupt Modes Disable 7 1 write-only P8 Additional Interrupt Modes Disable 8 1 write-only P9 Additional Interrupt Modes Disable 9 1 write-only P10 Additional Interrupt Modes Disable 10 1 write-only P11 Additional Interrupt Modes Disable 11 1 write-only P12 Additional Interrupt Modes Disable 12 1 write-only P13 Additional Interrupt Modes Disable 13 1 write-only P14 Additional Interrupt Modes Disable 14 1 write-only P15 Additional Interrupt Modes Disable 15 1 write-only P16 Additional Interrupt Modes Disable 16 1 write-only P17 Additional Interrupt Modes Disable 17 1 write-only P18 Additional Interrupt Modes Disable 18 1 write-only P19 Additional Interrupt Modes Disable 19 1 write-only P20 Additional Interrupt Modes Disable 20 1 write-only P21 Additional Interrupt Modes Disable 21 1 write-only P22 Additional Interrupt Modes Disable 22 1 write-only P23 Additional Interrupt Modes Disable 23 1 write-only P24 Additional Interrupt Modes Disable 24 1 write-only P25 Additional Interrupt Modes Disable 25 1 write-only P26 Additional Interrupt Modes Disable 26 1 write-only P27 Additional Interrupt Modes Disable 27 1 write-only P28 Additional Interrupt Modes Disable 28 1 write-only P29 Additional Interrupt Modes Disable 29 1 write-only P30 Additional Interrupt Modes Disable 30 1 write-only P31 Additional Interrupt Modes Disable 31 1 write-only AIMMR Additional Interrupt Modes Mask Register 0x000000B8 32 read-only 0x00000000 P0 Peripheral CD Status 0 1 read-only P1 Peripheral CD Status 1 1 read-only P2 Peripheral CD Status 2 1 read-only P3 Peripheral CD Status 3 1 read-only P4 Peripheral CD Status 4 1 read-only P5 Peripheral CD Status 5 1 read-only P6 Peripheral CD Status 6 1 read-only P7 Peripheral CD Status 7 1 read-only P8 Peripheral CD Status 8 1 read-only P9 Peripheral CD Status 9 1 read-only P10 Peripheral CD Status 10 1 read-only P11 Peripheral CD Status 11 1 read-only P12 Peripheral CD Status 12 1 read-only P13 Peripheral CD Status 13 1 read-only P14 Peripheral CD Status 14 1 read-only P15 Peripheral CD Status 15 1 read-only P16 Peripheral CD Status 16 1 read-only P17 Peripheral CD Status 17 1 read-only P18 Peripheral CD Status 18 1 read-only P19 Peripheral CD Status 19 1 read-only P20 Peripheral CD Status 20 1 read-only P21 Peripheral CD Status 21 1 read-only P22 Peripheral CD Status 22 1 read-only P23 Peripheral CD Status 23 1 read-only P24 Peripheral CD Status 24 1 read-only P25 Peripheral CD Status 25 1 read-only P26 Peripheral CD Status 26 1 read-only P27 Peripheral CD Status 27 1 read-only P28 Peripheral CD Status 28 1 read-only P29 Peripheral CD Status 29 1 read-only P30 Peripheral CD Status 30 1 read-only P31 Peripheral CD Status 31 1 read-only ESR Edge Select Register 0x000000C0 32 write-only P0 Edge Interrupt Selection 0 1 write-only P1 Edge Interrupt Selection 1 1 write-only P2 Edge Interrupt Selection 2 1 write-only P3 Edge Interrupt Selection 3 1 write-only P4 Edge Interrupt Selection 4 1 write-only P5 Edge Interrupt Selection 5 1 write-only P6 Edge Interrupt Selection 6 1 write-only P7 Edge Interrupt Selection 7 1 write-only P8 Edge Interrupt Selection 8 1 write-only P9 Edge Interrupt Selection 9 1 write-only P10 Edge Interrupt Selection 10 1 write-only P11 Edge Interrupt Selection 11 1 write-only P12 Edge Interrupt Selection 12 1 write-only P13 Edge Interrupt Selection 13 1 write-only P14 Edge Interrupt Selection 14 1 write-only P15 Edge Interrupt Selection 15 1 write-only P16 Edge Interrupt Selection 16 1 write-only P17 Edge Interrupt Selection 17 1 write-only P18 Edge Interrupt Selection 18 1 write-only P19 Edge Interrupt Selection 19 1 write-only P20 Edge Interrupt Selection 20 1 write-only P21 Edge Interrupt Selection 21 1 write-only P22 Edge Interrupt Selection 22 1 write-only P23 Edge Interrupt Selection 23 1 write-only P24 Edge Interrupt Selection 24 1 write-only P25 Edge Interrupt Selection 25 1 write-only P26 Edge Interrupt Selection 26 1 write-only P27 Edge Interrupt Selection 27 1 write-only P28 Edge Interrupt Selection 28 1 write-only P29 Edge Interrupt Selection 29 1 write-only P30 Edge Interrupt Selection 30 1 write-only P31 Edge Interrupt Selection 31 1 write-only LSR Level Select Register 0x000000C4 32 write-only P0 Level Interrupt Selection 0 1 write-only P1 Level Interrupt Selection 1 1 write-only P2 Level Interrupt Selection 2 1 write-only P3 Level Interrupt Selection 3 1 write-only P4 Level Interrupt Selection 4 1 write-only P5 Level Interrupt Selection 5 1 write-only P6 Level Interrupt Selection 6 1 write-only P7 Level Interrupt Selection 7 1 write-only P8 Level Interrupt Selection 8 1 write-only P9 Level Interrupt Selection 9 1 write-only P10 Level Interrupt Selection 10 1 write-only P11 Level Interrupt Selection 11 1 write-only P12 Level Interrupt Selection 12 1 write-only P13 Level Interrupt Selection 13 1 write-only P14 Level Interrupt Selection 14 1 write-only P15 Level Interrupt Selection 15 1 write-only P16 Level Interrupt Selection 16 1 write-only P17 Level Interrupt Selection 17 1 write-only P18 Level Interrupt Selection 18 1 write-only P19 Level Interrupt Selection 19 1 write-only P20 Level Interrupt Selection 20 1 write-only P21 Level Interrupt Selection 21 1 write-only P22 Level Interrupt Selection 22 1 write-only P23 Level Interrupt Selection 23 1 write-only P24 Level Interrupt Selection 24 1 write-only P25 Level Interrupt Selection 25 1 write-only P26 Level Interrupt Selection 26 1 write-only P27 Level Interrupt Selection 27 1 write-only P28 Level Interrupt Selection 28 1 write-only P29 Level Interrupt Selection 29 1 write-only P30 Level Interrupt Selection 30 1 write-only P31 Level Interrupt Selection 31 1 write-only ELSR Edge/Level Status Register 0x000000C8 32 read-only 0x00000000 P0 Edge/Level Interrupt Source Selection 0 1 read-only P1 Edge/Level Interrupt Source Selection 1 1 read-only P2 Edge/Level Interrupt Source Selection 2 1 read-only P3 Edge/Level Interrupt Source Selection 3 1 read-only P4 Edge/Level Interrupt Source Selection 4 1 read-only P5 Edge/Level Interrupt Source Selection 5 1 read-only P6 Edge/Level Interrupt Source Selection 6 1 read-only P7 Edge/Level Interrupt Source Selection 7 1 read-only P8 Edge/Level Interrupt Source Selection 8 1 read-only P9 Edge/Level Interrupt Source Selection 9 1 read-only P10 Edge/Level Interrupt Source Selection 10 1 read-only P11 Edge/Level Interrupt Source Selection 11 1 read-only P12 Edge/Level Interrupt Source Selection 12 1 read-only P13 Edge/Level Interrupt Source Selection 13 1 read-only P14 Edge/Level Interrupt Source Selection 14 1 read-only P15 Edge/Level Interrupt Source Selection 15 1 read-only P16 Edge/Level Interrupt Source Selection 16 1 read-only P17 Edge/Level Interrupt Source Selection 17 1 read-only P18 Edge/Level Interrupt Source Selection 18 1 read-only P19 Edge/Level Interrupt Source Selection 19 1 read-only P20 Edge/Level Interrupt Source Selection 20 1 read-only P21 Edge/Level Interrupt Source Selection 21 1 read-only P22 Edge/Level Interrupt Source Selection 22 1 read-only P23 Edge/Level Interrupt Source Selection 23 1 read-only P24 Edge/Level Interrupt Source Selection 24 1 read-only P25 Edge/Level Interrupt Source Selection 25 1 read-only P26 Edge/Level Interrupt Source Selection 26 1 read-only P27 Edge/Level Interrupt Source Selection 27 1 read-only P28 Edge/Level Interrupt Source Selection 28 1 read-only P29 Edge/Level Interrupt Source Selection 29 1 read-only P30 Edge/Level Interrupt Source Selection 30 1 read-only P31 Edge/Level Interrupt Source Selection 31 1 read-only FELLSR Falling Edge/Low Level Select Register 0x000000D0 32 write-only P0 Falling Edge/Low Level Interrupt Selection 0 1 write-only P1 Falling Edge/Low Level Interrupt Selection 1 1 write-only P2 Falling Edge/Low Level Interrupt Selection 2 1 write-only P3 Falling Edge/Low Level Interrupt Selection 3 1 write-only P4 Falling Edge/Low Level Interrupt Selection 4 1 write-only P5 Falling Edge/Low Level Interrupt Selection 5 1 write-only P6 Falling Edge/Low Level Interrupt Selection 6 1 write-only P7 Falling Edge/Low Level Interrupt Selection 7 1 write-only P8 Falling Edge/Low Level Interrupt Selection 8 1 write-only P9 Falling Edge/Low Level Interrupt Selection 9 1 write-only P10 Falling Edge/Low Level Interrupt Selection 10 1 write-only P11 Falling Edge/Low Level Interrupt Selection 11 1 write-only P12 Falling Edge/Low Level Interrupt Selection 12 1 write-only P13 Falling Edge/Low Level Interrupt Selection 13 1 write-only P14 Falling Edge/Low Level Interrupt Selection 14 1 write-only P15 Falling Edge/Low Level Interrupt Selection 15 1 write-only P16 Falling Edge/Low Level Interrupt Selection 16 1 write-only P17 Falling Edge/Low Level Interrupt Selection 17 1 write-only P18 Falling Edge/Low Level Interrupt Selection 18 1 write-only P19 Falling Edge/Low Level Interrupt Selection 19 1 write-only P20 Falling Edge/Low Level Interrupt Selection 20 1 write-only P21 Falling Edge/Low Level Interrupt Selection 21 1 write-only P22 Falling Edge/Low Level Interrupt Selection 22 1 write-only P23 Falling Edge/Low Level Interrupt Selection 23 1 write-only P24 Falling Edge/Low Level Interrupt Selection 24 1 write-only P25 Falling Edge/Low Level Interrupt Selection 25 1 write-only P26 Falling Edge/Low Level Interrupt Selection 26 1 write-only P27 Falling Edge/Low Level Interrupt Selection 27 1 write-only P28 Falling Edge/Low Level Interrupt Selection 28 1 write-only P29 Falling Edge/Low Level Interrupt Selection 29 1 write-only P30 Falling Edge/Low Level Interrupt Selection 30 1 write-only P31 Falling Edge/Low Level Interrupt Selection 31 1 write-only REHLSR Rising Edge/ High Level Select Register 0x000000D4 32 write-only P0 Rising Edge /High Level Interrupt Selection 0 1 write-only P1 Rising Edge /High Level Interrupt Selection 1 1 write-only P2 Rising Edge /High Level Interrupt Selection 2 1 write-only P3 Rising Edge /High Level Interrupt Selection 3 1 write-only P4 Rising Edge /High Level Interrupt Selection 4 1 write-only P5 Rising Edge /High Level Interrupt Selection 5 1 write-only P6 Rising Edge /High Level Interrupt Selection 6 1 write-only P7 Rising Edge /High Level Interrupt Selection 7 1 write-only P8 Rising Edge /High Level Interrupt Selection 8 1 write-only P9 Rising Edge /High Level Interrupt Selection 9 1 write-only P10 Rising Edge /High Level Interrupt Selection 10 1 write-only P11 Rising Edge /High Level Interrupt Selection 11 1 write-only P12 Rising Edge /High Level Interrupt Selection 12 1 write-only P13 Rising Edge /High Level Interrupt Selection 13 1 write-only P14 Rising Edge /High Level Interrupt Selection 14 1 write-only P15 Rising Edge /High Level Interrupt Selection 15 1 write-only P16 Rising Edge /High Level Interrupt Selection 16 1 write-only P17 Rising Edge /High Level Interrupt Selection 17 1 write-only P18 Rising Edge /High Level Interrupt Selection 18 1 write-only P19 Rising Edge /High Level Interrupt Selection 19 1 write-only P20 Rising Edge /High Level Interrupt Selection 20 1 write-only P21 Rising Edge /High Level Interrupt Selection 21 1 write-only P22 Rising Edge /High Level Interrupt Selection 22 1 write-only P23 Rising Edge /High Level Interrupt Selection 23 1 write-only P24 Rising Edge /High Level Interrupt Selection 24 1 write-only P25 Rising Edge /High Level Interrupt Selection 25 1 write-only P26 Rising Edge /High Level Interrupt Selection 26 1 write-only P27 Rising Edge /High Level Interrupt Selection 27 1 write-only P28 Rising Edge /High Level Interrupt Selection 28 1 write-only P29 Rising Edge /High Level Interrupt Selection 29 1 write-only P30 Rising Edge /High Level Interrupt Selection 30 1 write-only P31 Rising Edge /High Level Interrupt Selection 31 1 write-only FRLHSR Fall/Rise - Low/High Status Register 0x000000D8 32 read-only 0x00000000 P0 Edge /Level Interrupt Source Selection 0 1 read-only P1 Edge /Level Interrupt Source Selection 1 1 read-only P2 Edge /Level Interrupt Source Selection 2 1 read-only P3 Edge /Level Interrupt Source Selection 3 1 read-only P4 Edge /Level Interrupt Source Selection 4 1 read-only P5 Edge /Level Interrupt Source Selection 5 1 read-only P6 Edge /Level Interrupt Source Selection 6 1 read-only P7 Edge /Level Interrupt Source Selection 7 1 read-only P8 Edge /Level Interrupt Source Selection 8 1 read-only P9 Edge /Level Interrupt Source Selection 9 1 read-only P10 Edge /Level Interrupt Source Selection 10 1 read-only P11 Edge /Level Interrupt Source Selection 11 1 read-only P12 Edge /Level Interrupt Source Selection 12 1 read-only P13 Edge /Level Interrupt Source Selection 13 1 read-only P14 Edge /Level Interrupt Source Selection 14 1 read-only P15 Edge /Level Interrupt Source Selection 15 1 read-only P16 Edge /Level Interrupt Source Selection 16 1 read-only P17 Edge /Level Interrupt Source Selection 17 1 read-only P18 Edge /Level Interrupt Source Selection 18 1 read-only P19 Edge /Level Interrupt Source Selection 19 1 read-only P20 Edge /Level Interrupt Source Selection 20 1 read-only P21 Edge /Level Interrupt Source Selection 21 1 read-only P22 Edge /Level Interrupt Source Selection 22 1 read-only P23 Edge /Level Interrupt Source Selection 23 1 read-only P24 Edge /Level Interrupt Source Selection 24 1 read-only P25 Edge /Level Interrupt Source Selection 25 1 read-only P26 Edge /Level Interrupt Source Selection 26 1 read-only P27 Edge /Level Interrupt Source Selection 27 1 read-only P28 Edge /Level Interrupt Source Selection 28 1 read-only P29 Edge /Level Interrupt Source Selection 29 1 read-only P30 Edge /Level Interrupt Source Selection 30 1 read-only P31 Edge /Level Interrupt Source Selection 31 1 read-only WPMR Write Protect Mode Register 0x000000E4 32 read-write 0x00000000 WPEN Write Protect Enable 0 1 read-write WPKEY Write Protect KEY. 8 24 read-write PASSWD Writing any other value in this field aborts the write operation of the WPEN bit. Always reads as 0. 0x50494F WPSR Write Protect Status Register 0x000000E8 32 read-only 0x00000000 WPVS Write Protect Violation Status 0 1 read-only WPVSRC Write Protect Violation Source 8 16 read-only SCHMITT Schmitt Trigger Register 0x00000100 32 read-write 0x00000000 SCHMITT0 Schmitt Trigger Control 0 1 read-write SCHMITT1 Schmitt Trigger Control 1 1 read-write SCHMITT2 Schmitt Trigger Control 2 1 read-write SCHMITT3 Schmitt Trigger Control 3 1 read-write SCHMITT4 Schmitt Trigger Control 4 1 read-write SCHMITT5 Schmitt Trigger Control 5 1 read-write SCHMITT6 Schmitt Trigger Control 6 1 read-write SCHMITT7 Schmitt Trigger Control 7 1 read-write SCHMITT8 Schmitt Trigger Control 8 1 read-write SCHMITT9 Schmitt Trigger Control 9 1 read-write SCHMITT10 Schmitt Trigger Control 10 1 read-write SCHMITT11 Schmitt Trigger Control 11 1 read-write SCHMITT12 Schmitt Trigger Control 12 1 read-write SCHMITT13 Schmitt Trigger Control 13 1 read-write SCHMITT14 Schmitt Trigger Control 14 1 read-write SCHMITT15 Schmitt Trigger Control 15 1 read-write SCHMITT16 Schmitt Trigger Control 16 1 read-write SCHMITT17 Schmitt Trigger Control 17 1 read-write SCHMITT18 Schmitt Trigger Control 18 1 read-write SCHMITT19 Schmitt Trigger Control 19 1 read-write SCHMITT20 Schmitt Trigger Control 20 1 read-write SCHMITT21 Schmitt Trigger Control 21 1 read-write SCHMITT22 Schmitt Trigger Control 22 1 read-write SCHMITT23 Schmitt Trigger Control 23 1 read-write SCHMITT24 Schmitt Trigger Control 24 1 read-write SCHMITT25 Schmitt Trigger Control 25 1 read-write SCHMITT26 Schmitt Trigger Control 26 1 read-write SCHMITT27 Schmitt Trigger Control 27 1 read-write SCHMITT28 Schmitt Trigger Control 28 1 read-write SCHMITT29 Schmitt Trigger Control 29 1 read-write SCHMITT30 Schmitt Trigger Control 30 1 read-write SCHMITT31 Schmitt Trigger Control 31 1 read-write RSTC 11009C Reset Controller SYSC RSTC_ 0x400E1400 0 0x200 registers CR Control Register 0x00000000 32 write-only PROCRST Processor Reset 0 1 write-only PERRST Peripheral Reset 2 1 write-only EXTRST External Reset 3 1 write-only KEY System Reset Key 24 8 write-only SR Status Register 0x00000004 32 read-only 0x00000000 URSTS User Reset Status 0 1 read-only RSTTYP Reset Type 8 3 read-only NRSTL NRST Pin Level 16 1 read-only SRCMP Software Reset Command in Progress 17 1 read-only MR Mode Register 0x00000008 32 read-write 0x00000001 URSTEN User Reset Enable 0 1 read-write URSTIEN User Reset Interrupt Enable 4 1 read-write ERSTL External Reset Length 8 4 read-write KEY Password 24 8 read-write SUPC 6452S Supply Controller SYSC SUPC_ 0x400E1410 0 0x200 registers CR Supply Controller Control Register 0x00000000 32 write-only VROFF Voltage Regulator Off 2 1 write-only NO_EFFECT no effect. 0 STOP_VREG if KEY is correct, asserts the vddcore_nreset and stops the voltage regulator. 1 XTALSEL Crystal Oscillator Select 3 1 write-only NO_EFFECT no effect. 0 CRYSTAL_SEL if KEY is correct, switches the slow clock on the crystal oscillator output. 1 KEY Password 24 8 write-only PASSWD Writing any other value in this field aborts the write operation. 0xA5 SMMR Supply Controller Supply Monitor Mode Register 0x00000004 32 read-write 0x00000000 SMTH Supply Monitor Threshold 0 4 read-write SMSMPL Supply Monitor Sampling Period 8 3 read-write SMD Supply Monitor disabled 0x0 CSM Continuous Supply Monitor 0x1 32SLCK Supply Monitor enabled one SLCK period every 32 SLCK periods 0x2 256SLCK Supply Monitor enabled one SLCK period every 256 SLCK periods 0x3 2048SLCK Supply Monitor enabled one SLCK period every 2,048 SLCK periods 0x4 SMRSTEN Supply Monitor Reset Enable 12 1 read-write NOT_ENABLE the core reset signal "vddcore_nreset" is not affected when a supply monitor detection occurs. 0 ENABLE the core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs. 1 SMIEN Supply Monitor Interrupt Enable 13 1 read-write NOT_ENABLE the SUPC interrupt signal is not affected when a supply monitor detection occurs. 0 ENABLE the SUPC interrupt signal is asserted when a supply monitor detection occurs. 1 MR Supply Controller Mode Register 0x00000008 32 read-write 0x00005A00 BODRSTEN Brownout Detector Reset Enable 12 1 read-write NOT_ENABLE the core reset signal "vddcore_nreset" is not affected when a brownout detection occurs. 0 ENABLE the core reset signal, vddcore_nreset is asserted when a brownout detection occurs. 1 BODDIS Brownout Detector Disable 13 1 read-write ENABLE the core brownout detector is enabled. 0 DISABLE the core brownout detector is disabled. 1 ONREG Voltage Regulator enable 14 1 read-write ONREG_UNUSED Internal voltage regulator is not used (external power supply is used) 0 ONREG_USED internal voltage regulator is used 1 OSCBYPASS Oscillator Bypass 20 1 read-write NO_EFFECT no effect. Clock selection depends on XTALSEL value. 0 BYPASS the 32-KHz XTAL oscillator is selected and is put in bypass mode. 1 KEY Password Key 24 8 read-write PASSWD Writing any other value in this field aborts the write operation. 0xA5 WUMR Supply Controller Wake-up Mode Register 0x0000000C 32 read-write 0x00000000 SMEN Supply Monitor Wake-up Enable 1 1 read-write NOT_ENABLE the supply monitor detection has no wake-up effect. 0 ENABLE the supply monitor detection forces the wake-up of the core power supply. 1 RTTEN Real Time Timer Wake-up Enable 2 1 read-write NOT_ENABLE the RTT alarm signal has no wake-up effect. 0 ENABLE the RTT alarm signal forces the wake-up of the core power supply. 1 RTCEN Real Time Clock Wake-up Enable 3 1 read-write NOT_ENABLE the RTC alarm signal has no wake-up effect. 0 ENABLE the RTC alarm signal forces the wake-up of the core power supply. 1 WKUPDBC Wake-up Inputs Debouncer Period 12 3 read-write IMMEDIATE Immediate, no debouncing, detected active at least on one Slow Clock edge. 0x0 3_SCLK WKUPx shall be in its active state for at least 3 SLCK periods 0x1 32_SCLK WKUPx shall be in its active state for at least 32 SLCK periods 0x2 512_SCLK WKUPx shall be in its active state for at least 512 SLCK periods 0x3 4096_SCLK WKUPx shall be in its active state for at least 4,096 SLCK periods 0x4 32768_SCLK WKUPx shall be in its active state for at least 32,768 SLCK periods 0x5 WUIR Supply Controller Wake-up Inputs Register 0x00000010 32 read-write 0x00000000 WKUPEN0 Wake-up Input Enable 0 0 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN1 Wake-up Input Enable 1 1 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN2 Wake-up Input Enable 2 2 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN3 Wake-up Input Enable 3 3 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN4 Wake-up Input Enable 4 4 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN5 Wake-up Input Enable 5 5 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN6 Wake-up Input Enable 6 6 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN7 Wake-up Input Enable 7 7 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN8 Wake-up Input Enable 8 8 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN9 Wake-up Input Enable 9 9 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN10 Wake-up Input Enable 10 10 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN11 Wake-up Input Enable 11 11 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN12 Wake-up Input Enable 12 12 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN13 Wake-up Input Enable 13 13 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN14 Wake-up Input Enable 14 14 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPEN15 Wake-up Input Enable 15 15 1 read-write DISABLE the corresponding wake-up input has no wake-up effect. 0 ENABLE the corresponding wake-up input forces the wake-up of the core power supply. 1 WKUPT0 Wake-up Input Type 0 16 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT1 Wake-up Input Type 1 17 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT2 Wake-up Input Type 2 18 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT3 Wake-up Input Type 3 19 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT4 Wake-up Input Type 4 20 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT5 Wake-up Input Type 5 21 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT6 Wake-up Input Type 6 22 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT7 Wake-up Input Type 7 23 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT8 Wake-up Input Type 8 24 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT9 Wake-up Input Type 9 25 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT10 Wake-up Input Type 10 26 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT11 Wake-up Input Type 11 27 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT12 Wake-up Input Type 12 28 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT13 Wake-up Input Type 13 29 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT14 Wake-up Input Type 14 30 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 WKUPT15 Wake-up Input Type 15 31 1 read-write HIGH_TO_LOW a high to low level transition for a period defined by WKUPDBC on the corresponding wake-up input forces the wake-up of the core power supply. 0 LOW_TO_HIGH a low to high level transition for a period defined by WKUPDBC on the correspond-ing wake-up input forces the wake-up of the core power supply. 1 SR Supply Controller Status Register 0x00000014 32 read-only 0x00000000 WKUPS WKUP Wake-up Status 1 1 read-only NO no wake-up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. 0 PRESENT at least one wake-up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. 1 SMWS Supply Monitor Detection Wake-up Status 2 1 read-only NO no wake-up due to a supply monitor detection has occurred since the last read of SUPC_SR. 0 PRESENT at least one wake-up due to a supply monitor detection has occurred since the last read of SUPC_SR. 1 BODRSTS Brownout Detector Reset Status 3 1 read-only NO no core brownout rising edge event has been detected since the last read of the SUPC_SR. 0 PRESENT at least one brownout output rising edge event has been detected since the last read of the SUPC_SR. 1 SMRSTS Supply Monitor Reset Status 4 1 read-only NO no supply monitor detection has generated a core reset since the last read of the SUPC_SR. 0 PRESENT at least one supply monitor detection has generated a core reset since the last read of the SUPC_SR. 1 SMS Supply Monitor Status 5 1 read-only NO no supply monitor detection since the last read of SUPC_SR. 0 PRESENT at least one supply monitor detection since the last read of SUPC_SR. 1 SMOS Supply Monitor Output Status 6 1 read-only HIGH the supply monitor detected VDDIO higher than its threshold at its last measurement. 0 LOW the supply monitor detected VDDIO lower than its threshold at its last measurement. 1 OSCSEL 32-kHz Oscillator Selection Status 7 1 read-only RC the slow clock, SLCK is generated by the embedded 32-kHz RC oscillator. 0 CRYST the slow clock, SLCK is generated by the 32-kHz crystal oscillator. 1 WKUPIS0 WKUP Input Status 0 16 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS1 WKUP Input Status 1 17 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS2 WKUP Input Status 2 18 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS3 WKUP Input Status 3 19 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS4 WKUP Input Status 4 20 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS5 WKUP Input Status 5 21 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS6 WKUP Input Status 6 22 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS7 WKUP Input Status 7 23 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS8 WKUP Input Status 8 24 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS9 WKUP Input Status 9 25 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS10 WKUP Input Status 10 26 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS11 WKUP Input Status 11 27 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS12 WKUP Input Status 12 28 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS13 WKUP Input Status 13 29 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS14 WKUP Input Status 14 30 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 WKUPIS15 WKUP Input Status 15 31 1 read-only DIS the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake-up event. 0 EN the corresponding wake-up input was active at the time the debouncer triggered a wake-up event. 1 RTT 6081H Real-time Timer SYSC RTT_ 0x400E1430 0 0x200 registers MR Mode Register 0x00000000 32 read-write 0x00008000 RTPRES Real-time Timer Prescaler Value 0 16 read-write ALMIEN Alarm Interrupt Enable 16 1 read-write RTTINCIEN Real-time Timer Increment Interrupt Enable 17 1 read-write RTTRST Real-time Timer Restart 18 1 read-write AR Alarm Register 0x00000004 32 read-write 0xFFFFFFFF ALMV Alarm Value 0 32 read-write VR Value Register 0x00000008 32 read-only 0x00000000 CRTV Current Real-time Value 0 32 read-only SR Status Register 0x0000000C 32 read-only 0x00000000 ALMS Real-time Alarm Status 0 1 read-only RTTINC Real-time Timer Increment 1 1 read-only WDT 6080F Watchdog Timer SYSC WDT_ 0x400E1450 0 0x200 registers CR Control Register 0x00000000 32 write-only WDRSTT Watchdog Restart 0 1 write-only KEY Password. 24 8 write-only PASSWD Writing any other value in this field aborts the write operation. 0xA5 MR Mode Register 0x00000004 32 read-write 0x3FFF2FFF WDV Watchdog Counter Value 0 12 read-write WDFIEN Watchdog Fault Interrupt Enable 12 1 read-write WDRSTEN Watchdog Reset Enable 13 1 read-write WDRPROC Watchdog Reset Processor 14 1 read-write WDDIS Watchdog Disable 15 1 read-write WDD Watchdog Delta Value 16 12 read-write WDDBGHLT Watchdog Debug Halt 28 1 read-write WDIDLEHLT Watchdog Idle Halt 29 1 read-write SR Status Register 0x00000008 32 read-only 0x00000000 WDUNF Watchdog Underflow 0 1 read-only WDERR Watchdog Error 1 1 read-only RTC 6056N Real-time Clock SYSC RTC_ 0x400E1460 0 0x200 registers CR Control Register 0x00000000 32 read-write 0x00000000 UPDTIM Update Request Time Register 0 1 read-write UPDCAL Update Request Calendar Register 1 1 read-write TIMEVSEL Time Event Selection 8 2 read-write MINUTE Minute change 0x0 HOUR Hour change 0x1 MIDNIGHT Every day at midnight 0x2 NOON Every day at noon 0x3 CALEVSEL Calendar Event Selection 16 2 read-write WEEK Week change (every Monday at time 00:00:00) 0x0 MONTH Month change (every 01 of each month at time 00:00:00) 0x1 YEAR Year change (every January 1 at time 00:00:00) 0x2 MR Mode Register 0x00000004 32 read-write 0x00000000 HRMOD 12-/24-hour Mode 0 1 read-write TIMR Time Register 0x00000008 32 read-write 0x00000000 SEC Current Second 0 7 read-write MIN Current Minute 8 7 read-write HOUR Current Hour 16 6 read-write AMPM Ante Meridiem Post Meridiem Indicator 22 1 read-write CALR Calendar Register 0x0000000C 32 read-write 0x01810720 CENT Current Century 0 7 read-write YEAR Current Year 8 8 read-write MONTH Current Month 16 5 read-write DAY Current Day in Current Week 21 3 read-write DATE Current Day in Current Month 24 6 read-write TIMALR Time Alarm Register 0x00000010 32 read-write 0x00000000 SEC Second Alarm 0 7 read-write SECEN Second Alarm Enable 7 1 read-write MIN Minute Alarm 8 7 read-write MINEN Minute Alarm Enable 15 1 read-write HOUR Hour Alarm 16 6 read-write AMPM AM/PM Indicator 22 1 read-write HOUREN Hour Alarm Enable 23 1 read-write CALALR Calendar Alarm Register 0x00000014 32 read-write 0x01010000 MONTH Month Alarm 16 5 read-write MTHEN Month Alarm Enable 23 1 read-write DATE Date Alarm 24 6 read-write DATEEN Date Alarm Enable 31 1 read-write SR Status Register 0x00000018 32 read-only 0x00000000 ACKUPD Acknowledge for Update 0 1 read-only FREERUN Time and calendar registers cannot be updated. 0 UPDATE Time and calendar registers can be updated. 1 ALARM Alarm Flag 1 1 read-only NO_ALARMEVENT No alarm matching condition occurred. 0 ALARMEVENT An alarm matching condition has occurred. 1 SEC Second Event 2 1 read-only NO_SECEVENT No second event has occurred since the last clear. 0 SECEVENT At least one second event has occurred since the last clear. 1 TIMEV Time Event 3 1 read-only NO_TIMEVENT No time event has occurred since the last clear. 0 TIMEVENT At least one time event has occurred since the last clear. 1 CALEV Calendar Event 4 1 read-only NO_CALEVENT No calendar event has occurred since the last clear. 0 CALEVENT At least one calendar event has occurred since the last clear. 1 SCCR Status Clear Command Register 0x0000001C 32 write-only ACKCLR Acknowledge Clear 0 1 write-only ALRCLR Alarm Clear 1 1 write-only SECCLR Second Clear 2 1 write-only TIMCLR Time Clear 3 1 write-only CALCLR Calendar Clear 4 1 write-only IER Interrupt Enable Register 0x00000020 32 write-only ACKEN Acknowledge Update Interrupt Enable 0 1 write-only ALREN Alarm Interrupt Enable 1 1 write-only SECEN Second Event Interrupt Enable 2 1 write-only TIMEN Time Event Interrupt Enable 3 1 write-only CALEN Calendar Event Interrupt Enable 4 1 write-only IDR Interrupt Disable Register 0x00000024 32 write-only ACKDIS Acknowledge Update Interrupt Disable 0 1 write-only ALRDIS Alarm Interrupt Disable 1 1 write-only SECDIS Second Event Interrupt Disable 2 1 write-only TIMDIS Time Event Interrupt Disable 3 1 write-only CALDIS Calendar Event Interrupt Disable 4 1 write-only IMR Interrupt Mask Register 0x00000028 32 read-only 0x00000000 ACK Acknowledge Update Interrupt Mask 0 1 read-only ALR Alarm Interrupt Mask 1 1 read-only SEC Second Event Interrupt Mask 2 1 read-only TIM Time Event Interrupt Mask 3 1 read-only CAL Calendar Event Interrupt Mask 4 1 read-only VER Valid Entry Register 0x0000002C 32 read-only 0x00000000 NVTIM Non-valid Time 0 1 read-only NVCAL Non-valid Calendar 1 1 read-only NVTIMALR Non-valid Time Alarm 2 1 read-only NVCALALR Non-valid Calendar Alarm 3 1 read-only GPBR 6378C General Purpose Backup Registers SYSC GPBR_ 0x400E1490 0 0x200 registers 8 4 0-7 GPBR[%s] General Purpose Backup Register 0x00000000 32 read-write GPBR_VALUE Value of GPBR x 0 32 read-write