Add some embedded stuff

This commit is contained in:
Artemis Tosini 2022-05-30 19:31:39 +00:00
parent 59147421f2
commit 5204c3f75e
Signed by: artemist
GPG key ID: EE5227935FE3FF18
15 changed files with 712 additions and 32 deletions

View file

@ -4,49 +4,17 @@
#include <arch/arm/boot/dts/am335x-boneblack.dts>
/ {
aliases {
sht3x = &sht3x;
ssd1306 = &ssd1306;
pms5003 = &pms5003;
s8 = &s8;
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
#address-cells = <0x01>;
#size-cells = <0x00>;
sht3x: sht3x@44 {
compatible = "sensirion,sht3x";
reg = <0x44>;
status = "okay";
};
ssd1306: ssd1306@3c {
compatible = "solomon,ssd1306fb-i2c";
reg = <0x3c>;
solomon,height = <48>;
solomon,width = <64>;
status = "okay";
};
};
&uart1 {
status = "okay";
pms5003: pms5003 {
compatible = "plantower,pms5003";
vcc-supply = <0xffffffff>;
status = "okay";
};
};
&uart2 {
status = "okay";
s8: s8 {
compatible = "senseair,sunrise-006-0-007";
status = "okay";
};
};

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@ -0,0 +1,8 @@
[target.riscv32imac-unknown-none-elf]
runner = "riscv64-unknown-elf-gdb -q -x gdb_init"
rustflags = [
"-C", "link-arg=-Thifive1-link.x",
]
[build]
target = "riscv32imac-unknown-none-elf"

216
rust/fe310-test/Cargo.lock generated Normal file
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@ -0,0 +1,216 @@
# This file is automatically @generated by Cargo.
# It is not intended for manual editing.
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@ -0,0 +1,18 @@
[package]
name = "fe310-test"
version = "0.1.0"
authors = ["Artemis Tosini <me@artem.ist>"]
edition = "2018"
[dependencies]
embedded-hal = "0.2.3"
e310x-hal = { version = "0.8.3", features = ["g002"] }
panic-halt = "0.2.0"
riscv = "0.5.3"
riscv-rt = "0.6.0"
[profile.release]
codegen-units = 1
debug = true
lto = true

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@ -0,0 +1,5 @@
#![no_std]
#![no_main]
use panic_halt as _;
use riscv_rt::entry;

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@ -0,0 +1,9 @@
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
runner = "gdb -q -x openocd.gdb"
rustflags = [
"-C", "link-arg=-Tlink.x",
]
[build]
target = "thumbv7em-none-eabihf"

1
rust/stm32f407-test/.gitignore vendored Normal file
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@ -0,0 +1 @@
itm.txt

303
rust/stm32f407-test/Cargo.lock generated Normal file
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@ -0,0 +1,303 @@
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@ -0,0 +1,28 @@
[package]
name = "stm32f407-test"
version = "0.1.0"
authors = ["Artemis Tosini <me@artem.ist>"]
edition = "2018"
[dependencies]
embedded-hal = "0.2"
nb = "0.1.2"
cortex-m = "0.6"
cortex-m-rt = "0.6"
cortex-m-semihosting = "0.3"
panic-semihosting = "0.5"
[dependencies.stm32f4xx-hal]
version = "0.8"
features = ["rt", "stm32f407"]
[[bin]]
name = "stm32f407-test"
test = false
bench = false
[profile.release]
codegen-units = 1
debug = true
lto = true

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@ -0,0 +1,21 @@
use std::env;
use std::fs::File;
use std::io::Write;
use std::path::PathBuf;
fn main() {
// Put `memory.x` in our output directory and ensure it's
// on the linker search path.
let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
File::create(out.join("memory.x"))
.unwrap()
.write_all(include_bytes!("memory.x"))
.unwrap();
println!("cargo:rustc-link-search={}", out.display());
// By default, Cargo will re-run a build script whenever
// any file in the project changes. By specifying `memory.x`
// here, we ensure the build script is only re-run when
// `memory.x` is changed.
println!("cargo:rerun-if-changed=memory.x");
}

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@ -0,0 +1,9 @@
MEMORY
{
/* NOTE K = KiBi = 1024 bytes */
FLASH : ORIGIN = 0x08000000, LENGTH = 1M
RAM : ORIGIN = 0x20000000, LENGTH = 128K
CCRAM : ORIGIN = 0x10000000, LENGTH = 64K
}
_stack_start = ORIGIN(RAM) + LENGTH(RAM);

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source [find interface/stlink-v2-1.cfg]
transport select hla_swd
# increase working area to 64KB
set WORKAREASIZE 0x10000
source [find target/stm32f4x.cfg]
reset_config srst_only

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target extended-remote :3333
# print demangled symbols
set print asm-demangle on
# set backtrace limit to not have infinite backtrace loops
set backtrace limit 32
# detect unhandled exceptions, hard faults and panics
# break DefaultHandler
# break HardFault
# break rust_begin_unwind
# *try* to stop at the user entry point (it might be gone due to inlining)
break main
# send captured ITM to the file itm.txt
# (the programmer's SWO pin on the STM32F4DISCOVERY is hard-wired to PB3. Make sure not to use it for a different purpose!)
# 168000000 is the core clock frequency
monitor tpiu config internal itm.txt uart off 168000000
# OR: make the microcontroller SWO (PB3) pin output compatible with UART (8N1)
# 8000000 is the frequency of the SWO pin
# monitor tpiu config external uart off 8000000 2000000
# # enable ITM port 1
monitor itm port 1 on
# Semihosting
monitor arm semihosting enable
load
# start the process but immediately halt the processor
stepi

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#![no_std]
#![no_main]
use panic_halt as _;
use cortex_m_rt::entry;
#[entry]
fn main() -> ! {
loop { }
}

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target extended-remote :4343
# print demangled symbols
set print asm-demangle on
# set backtrace limit to not have infinite backtrace loops
set backtrace limit 32
# detect unhandled exceptions, hard faults and panics
# break DefaultHandler
# break HardFault
# break rust_begin_unwind
# *try* to stop at the user entry point (it might be gone due to inlining)
break main
# send captured ITM to the file itm.txt
# (the programmer's SWO pin on the STM32F4DISCOVERY is hard-wired to PB3. Make sure not to use it for a different purpose!)
# 168000000 is the core clock frequency
monitor tpiu config internal itm.txt uart off 168000000
# OR: make the microcontroller SWO (PB3) pin output compatible with UART (8N1)
# 8000000 is the frequency of the SWO pin
# monitor tpiu config external uart off 8000000 2000000
# # enable ITM port 1
monitor itm port 1 on
# Semihosting
monitor arm semihosting enable
load
# start the process but immediately halt the processor
stepi