Ekaitz Zarraga 63beaa3dfe mescc: Add support for signed rotation. ... * module/mescc/compile.scm (expr->register)[rshift, assn-expr]: Add signed right-rotation support. * lib/arm-mes/arm.M1 (asr): Add instruction. * lib/x86-mes/x86.M1 (sar): Add instruction. * lib/x86_64-mes/x86_64.M1 (sar): Add instruction. * module/mescc/armv4/as.scm (armv4:r0>>r1-signed): New procedure. (armv4:instructions): Register it. * module/mescc/i386/as.scm (i386:r0>>r1-signed): New procedure. (i386:instructions): Register it. * module/mescc/riscv64/as.scm (riscv64:r0>>r1-signed): New procedure. (riscv64:instructions): Register it. * module/mescc/x86_64/as.scm (x86_64:r0>>r1-signed): New procedure. (x86_64:instructions): Register it. (		2023-11-05 09:45:31 +01:00
..
armv4	mescc: Add support for signed rotation.	2023-11-05 09:45:31 +01:00
i386	mescc: Add support for signed rotation.	2023-11-05 09:45:31 +01:00
riscv64	mescc: Add support for signed rotation.	2023-11-05 09:45:31 +01:00
x86_64	mescc: Add support for signed rotation.	2023-11-05 09:45:31 +01:00
as.scm	mescc: x86_64 support: Refactor to abstracted assembly, add x86_64.	2018-08-15 18:26:55 +02:00
bytevectors.scm	mescc: x86_64 support: Refactor to abstracted assembly, add x86_64.	2018-08-15 18:26:55 +02:00
compile.scm	mescc: Add support for signed rotation.	2023-11-05 09:45:31 +01:00
info.scm	mescc: Do not dump variables with extern storage.	2019-07-27 17:22:00 +02:00
M1.scm	riscv64: Port to word based mescc-tools.	2023-11-05 09:40:38 +01:00
mescc.scm	mescc: RISC-V64 code generation.	2023-11-05 09:40:37 +01:00
preprocess.scm	mescc: Remove duplicate include.	2023-08-27 10:05:33 +02:00