mes/lib/linux/riscv64-mes-m2/crt1.M1
Andrius Štikonas 16f4fc3263 riscv64: Port to word based mescc-tools.
* module/mescc/M1.scm (riscv:i-format, riscv:j-format, riscv:u-format):
New procedures for RISC-V instruction formats.
(info->M1): Use them to switch from !0xAB to M1
weird strings 'AB'.
* module/mescc/riscv64/as.scm,
lib/linux/riscv64-mes-m2/_exit.c
ib/linux/riscv64-mes-m2/_write.c,.
lib/linux/riscv64-mes-m2/crt1.M1,.
lib/linux/riscv64-mes-m2/syscall.c,.
lib/linux/riscv64-mes-mescc/_exit.c,.
lib/linux/riscv64-mes-mescc/_write.c,.
lib/linux/riscv64-mes-mescc/crt1.c,.
lib/linux/riscv64-mes-mescc/syscall-internal.c,.
lib/linux/riscv64-mes-mescc/syscall.c,.
lib/m2/riscv64/riscv64_defs.M1,.
lib/riscv64-mes-mescc/setjmp.c,.
lib/riscv64-mes/riscv64.M1: Switch to riscv64 word-based macros.
* lib/linux/open.c (open)[!SYS_open]: Add support using openat syscall.
* include/linux/riscv64/syscall.h (MAKESTRING, MAKESTRING2,
RISCV_SYSCALL): New macros.
2023-11-05 09:40:38 +01:00

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## Copyright (C) 2021 Andrius Štikonas
## Copyright (C) 2023 Janneke Nieuwenhuizen <janneke@gnu.org>
## Copyright © 2023 Andrius Štikonas <andrius@stikonas.eu>
##
## This file is part of stage0.
##
## stage0 is free software: you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation, either version 3 of the License, or
## (at your option) any later version.
##
## stage0 is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with stage0. If not, see <http://www.gnu.org/licenses/>.
:_start
rd_fp rs1_sp mv ; Protect stack pointer
; Prepare argv
rd_a0 rs1_fp !8 addi ; ARGV_address = FP + 8
rd_sp rs1_sp !-8 addi
rs1_sp rs2_a0 sd ; Put argv on the stack
; Prepare envp
rd_a0 rs1_fp mv ; Address we need to load from
rd_a0 rs1_a0 ld ; Get ARGC
rd_a0 rs1_a0 !2 addi ; OFFSET = ARGC + 2
rd_a0 rs1_a0 rs2_x3 slli ; OFFSET = OFFSET * WORDSIZE
rd_a0 rs1_fp rs2_a0 add ; ENVP_address = RSP + OFFSET
rd_sp rs1_sp !-8 addi
rs1_sp rs2_a0 sd ; Put envp on the stack
; Stack offset
rd_fp rs1_fp !8 addi
; Init libc
rd_ra $FUNCTION___init_io jal
; Call main function
rd_ra $FUNCTION_main jal
; Put return value on the stack so that _exit gets it
rd_sp rs1_sp !-16 addi
rs1_sp rs2_a0 sd
; Exit to kernel
rd_a0 rs1_sp ld
rd_a7 !93 addi ; Syscall for exit
ecall ; Exit with code in a0