Bootstrappable TCC needs some extra definitions that upstream TCC
obtains from `tccdefs.h` in its codebase, which is also injected in the
binary using a weird trick (see `c2str` in tcc's codebase).
* include/stdarg.h: Add definitions for variable length arguments.
At the moment tcc does not support assembler instructions
with C expression operands. As a workaround read values
directly from stack.
* lib/linux/riscv64-mes-tcc/_exit.c
* lib/linux/riscv64-mes-tcc/_write.c
* lib/linux/riscv64-mes-tcc/syscall.c
Adapted from -gcc but make assembly match tcc style assembly where the
offsets are received as an extra input argument:
sw a0, 9(t0)
Becomes:
sw a0, t0, 9
* lib/linux/riscv64-mes-tcc/_exit.c,
lib/linux/riscv64-mes-tcc/_write.c,
lib/linux/riscv64-mes-tcc/crt1.c,
lib/linux/riscv64-mes-tcc/exit-42.S,
lib/linux/riscv64-mes-tcc/hello-mes.S,
lib/linux/riscv64-mes-tcc/syscall-internal.c,
lib/linux/riscv64-mes-tcc/syscall.c: New files.
Flattens case structures as nyacc is giving consecutive cases as a
nested block like:
(case testA
(case testB
(case testC BODY)))
We convert to:
((case testA (expr-stmt))
(case testB (expr-stmt))
(case testC BODY))
And then treat them as independent cases. For the fallthrough we just
add a jump to each case's body right before its clause (each of the case
blocks is responsible of adding its own jump to its body):
// This doesn't have it because it's the first
CASE1:
testA
CASE1_BODY:
goto CASE2_BODY
CASE2:
testB
CASE2_BODY:
goto CASE3_BODY
CASE3:
testB
CASE3_BODY:
This enables complex fallthrough schemes comparing to what was done
before.
* module/mescc/compile.scm (ast->info)[switch]{flatten-cases}: New
variable.
(ast->info)[switch]{statements}: Use flatten-cases on it.
(switch->expr): Remove unneeded matchers and add jumps to body.
* build-aux/check-mescc.sh(xfail-tests): Remove
lib/tests/scaffold/66-local-char-array.c.
This test detects if the fallthrough in a switch statement falls to the
next case (good) or to the default case (bad).
* lib/tests/scaffold/44-switch-body-fallthrough-not-default.c: New file.
* build-aux/check-mescc.sh (mes_tests): Add it.
We detected the value in off64 in the test is not -1 as it should but 56
ones. This is because the rotation is applied as unsigned even with the
signed cast. This breaks many things in tcc.
* lib/tests/scaffold/50-compare-rotated-weird.c: New file.
* build-aux/check-mescc.sh (mes_tests): Add it.
This is a follow-up to commits
7a8a2fc517
mescc: x86_64 support: Refactor to abstracted assembly, add x86_64.
and
c9ba7a619b
mescc: Refactor variable declaration.
There was a debug "22" leaking in compile.scm. It should be a "0".
* module/mescc/compile.scm (init-local): Replace "22" with "0".
* lib/tests/scaffold/7v-struct-initialize-zeroes.c: New test.
* build-aux/check-mescc.sh (tcc_tests): Add it.
(xfail-tests): Remove lib/tests/scaffold/72-typedef-struct-def-local.c.
* PORTING (Setup environment): Use nyacc 1.00.2. Prefer git-minimal
over git to avoid dependencies on subversion and graphic libraries. Add
riscv64-linux example.
* lib/linux/riscv64-mes-gcc/crt1.c (_start): Replace manual initialization
of __stdin, __stdout, __stderr, and environ with __init_io ().
* lib/linux/riscv64-mes-mescc/crt1.c (_start): Likewise.
* kaem.riscv64: New file.
* lib/linux/riscv64-mes-m2/crt1.M1,
lib/m2/riscv64/ELF-riscv64.hex2,
lib/m2/riscv64/riscv64_defs.M1: New files, imported from M2Lib.c
* lib/linux/riscv64-mes-m2/_exit.c,
lib/linux/riscv64-mes-m2/_write.c,
lib/linux/riscv64-mes-m2/crt1.c,
lib/linux/riscv64-mes-m2/syscall.c: New files, adapted for M2-Planet
calling convention from ...
* lib/linux/riscv64-mes-mescc: ...here
* kaem.run: Move fcntl.h up. Include signal.h.
* build-aux/build.sh.in: Also allow kaem build for riscv64.
This is a follow-up to commit
79da3fc3e2
guix: mescc-tools: Update to 1.4.0
* guix/git/mes.scm (mescc-tools)[supported-systems]: Add riscv32-linux
and riscv64-linux.
* lib/linux/riscv64-mes-mescc/_exit.c,
lib/linux/riscv64-mes-mescc/_write.c,
lib/linux/riscv64-mes-mescc/crt1.c,
lib/linux/riscv64-mes-mescc/syscall-internal.c,
lib/linux/riscv64-mes-mescc/syscall.c: New files. These add support for
building for riscv64-mes-mescc and make it self-hosting.
* lib/riscv64-mes/riscv64.M1: New file. Add set of instruction macros
for RV64. These are all potentially needed by the code generation. I
have made no effort yet to minimize the list of instructions for mes+tcc
compile.
* include/stdarg.h: GCC on RISC-V always passes arguments in registers.
Implementing these macros without the use of built-ins would be very
involved. So use those for now to make printf etc work.
* lib/tests/scaffold/76-pointer-arithmetic.c (main): Use the right sizes
in the test for RISC-V architectures.
* lib/tests/scaffold/7k-for-each-elem.c (main): Same.
* lib/tests/scaffold/85-sizeof.c: Same.
* include/linux/syscall.h (_sys_call5): Declare 5-argument syscall needed
for SYS_renameat2, currently only used on RISC-V64.
* lib/linux/riscv64-mes-gcc/syscall.c (__sys_call5, _sys_call5):
Implement it.
* lib/linux/riscv64-mes-gcc/_exit.c,
lib/linux/riscv64-mes-gcc/_write.c,
lib/linux/riscv64-mes-gcc/crt1.c,
lib/linux/riscv64-mes-gcc/syscall-internal.c,
lib/linux/riscv64-mes-gcc/syscall.c: New files to make it possible
to compile mes for riscv64-mes-gcc.
* lib/riscv64-mes-gcc/setjmp.c: New file.
(setjmp, longjmp): Add dummy implementations. Implementing these for gcc
would be very involved, and does not seem necessary to get mescc to
work.
* configure (main): Classify "riscv64" as 64 bit, allow "redhat" OS
(somewhat tangential, but important for Fedora RISC-V), allow
"riscv32-linux-mes" and "riscv64-linux-mes" as system.
This instruction is used to compare two registers and set the flags
accordingly. In current architectures this is the same as r0-r1, but for
RISCV it will be different. RISC-V does not have condition flags so
(until a better solution) we are going to emulate them there.
* module/mescc/armv4/as.scm (armv4:instructions): Add r0-cmp-r1 as alias
of r0-r1.
* module/mescc/i386/as.scm: Same.
* module/mescc/x86_64/as.scm: Same.
* module/mescc/compile.scm (expr->register): Make use of the new
r0-cmp-r1 instruction.
