From bf5e8b245e9ca8e928b32bf1fa10d22a88781421 Mon Sep 17 00:00:00 2001 From: "W. J. van der Laan" Date: Sat, 3 Apr 2021 21:26:03 +0000 Subject: [PATCH] core: Add RISC-V architecture detection. * src/mes.c(mes_environment)[__riscv_xlen == 32]: Set architecture to riscv32. [__riscv_xlen == 64]: Set architecture to riscv64. xlen --- src/mes.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/mes.c b/src/mes.c index 86619286..69884f72 100644 --- a/src/mes.c +++ b/src/mes.c @@ -1,6 +1,7 @@ /* -*-comment-start: "//";comment-end:""-*- * GNU Mes --- Maxwell Equations of Software * Copyright © 2016,2017,2018,2019,2020,2021 Jan (janneke) Nieuwenhuizen + * Copyright © 2021 W. J. van der Laan * * This file is part of GNU Mes. * @@ -61,6 +62,10 @@ mes_environment (int argc, char **argv) arch = "arm"; #elif __x86_64__ arch = "x86_64"; +#elif __riscv_xlen == 32 + arch = "riscv32"; + #elif __riscv_xlen == 64 + arch = "riscv64"; #else #error arch not supported #endif